YB_TX_RX_APE_PRJ/Interface/interface_fapi_tasks.h
2025-03-01 22:48:00 -08:00

141 lines
4.5 KiB
C

/******************************************************************
* @file interface_fapi_tasks.h
* @brief: [file description]
* @author: guicheng.liu
* @Date 2022年1月17日
* COPYRIGHT NOTICE: (c) smartlogictech. All rights reserved.
* Change_date Owner Change_content
* 2022年1月17日 guicheng.liu create file
*****************************************************************/
#ifndef INTERFACE_FAPI_TASKS_H
#define INTERFACE_FAPI_TASKS_H
#include <type_define.h>
#include "phy_macro.h"
#define NR_FAPI_SSB_BUFFER_NUM 2
#define NR_FAPI_PDCCH_BUFFER_NUM 2
#define NR_FAPI_PDSCH_BUFFER_NUM 2
#define NR_FAPI_TXDATA_BUFFER_NUM 2
#define NR_FAPI_CSI_RS_BUFFER_NUM 2
#define NR_FAPI_DEOFDM_BUFFER_NUM 2
#define NR_FAPI_PUSCH_BUFFER_NUM 2
#define NR_FAPI_PUCCH_BUFFER_NUM 2
#define NR_FAPI_SRS_BUFFER_NUM 3
#define NR_FAPI_PRACH_BUFFER_NUM 3
typedef enum
{
TASK_STATUS_IDLE = 0,
TASK_STATUS_BUSY,
TASK_STATUS_FINISH
}task_status_e;
typedef enum
{
TASK_REG_STATE_IDLE,
TASK_REG_STATE_PEND,
TASK_REG_STATE_REG
}task_reg_state;
typedef struct phy_tasks_mgr_reg
{
//8个APE 0-7
task_reg_state task_reg_flag[8];//0:IDLE, 1:reserved, 2:reg
uint32_t task_del_flag[8];
}phy_tasks_mgr_reg_t;
typedef struct nr_tasks_inf
{
uint32_t have_cell_cfg_flag;//所有cell级参数的flag
uint32_t have_ssbCell_cfg_flag;
uint32_t deofdm_cellcfg_addr;
uint32_t prach_cellcfg_addr;
uint32_t ssb_cell_cfg_addr;
uint32_t dl_cell_cfg_addr;
uint32_t pucch_cellcfg_addr;
//dl
task_status_e status_dl_ssb_proc[NR_FAPI_SSB_BUFFER_NUM];
task_status_e status_dl_pdcch_proc[NR_FAPI_PDCCH_BUFFER_NUM];
task_status_e status_dl_pdsch_proc[NR_FAPI_PDSCH_BUFFER_NUM];
task_status_e status_dl_csirs_proc[NR_FAPI_CSI_RS_BUFFER_NUM];
uint32_t dl_ssb_cfg_addr[NR_FAPI_SSB_BUFFER_NUM];
uint32_t dl_pdcch_cfg_addr[NR_FAPI_PDCCH_BUFFER_NUM];
uint32_t dl_pdsch_cfg_addr[NR_FAPI_PDSCH_BUFFER_NUM];
uint32_t dl_pdsch_txdat_cfg_addr[NR_FAPI_PDSCH_BUFFER_NUM];
uint32_t dl_csirs_cfg_addr[NR_FAPI_CSI_RS_BUFFER_NUM];
//ul
//uint32_t have_ul_deofdm_proc[NR_FAPI_DEOFDM_BUFFER_NUM];
uint32_t have_ul_pusch_proc[NR_FAPI_PUSCH_BUFFER_NUM];
uint32_t have_ul_pucchf01_proc[NR_FAPI_PUCCH_BUFFER_NUM];
uint32_t have_ul_pucchf234_proc[NR_FAPI_PUCCH_BUFFER_NUM];
uint32_t have_ul_srs_proc[NR_FAPI_SRS_BUFFER_NUM];
uint32_t have_ul_prach_proc[NR_FAPI_PRACH_BUFFER_NUM];
uint32_t ul_deofdmcfg_addr[NR_FAPI_DEOFDM_BUFFER_NUM];
uint32_t ul_puschcfg_addr[NR_FAPI_PUSCH_BUFFER_NUM];
uint32_t ul_pucchcfg_addr[NR_FAPI_PUCCH_BUFFER_NUM];
uint32_t ul_srscfg_addr[NR_FAPI_SRS_BUFFER_NUM];
uint32_t ul_prachcfg_addr[NR_FAPI_PRACH_BUFFER_NUM];
uint32_t harq_info_addr;//sm
uint32_t sch_cb_info_addr;//sm
uint32_t uci_cb_info_addr;//sm
uint32_t ssb_remapping_tab_addr;//sm
uint32_t pdcch_remapping_tab_addr;//sm
uint32_t csirs_remapping_tab_addr;//sm
uint32_t pusch_scramble_buffer_addr;//sm
uint32_t deofdm_to_srs_msg_addr;//sm
uint32_t nr_rx_freq_odd_slot_addr;//sm
uint32_t nr_rx_freq_even_slot_addr;//sm
uint32_t nr_cell_rx_ddr_addr;//ddr
uint32_t nr_cell_even_f7_tx_addr;//NR cell TX 偶时隙的前7个符号,sm
uint32_t nr_cell_even_b7_tx_addr;//NR cell TX 偶时隙的后7个符号,sm
uint32_t nr_cell_odd_f7_tx_addr;//NR cell TX 奇时隙的前7个符号,sm
uint32_t nr_cell_odd_b7_tx_addr;//NR cell TX 奇时隙的后7个符号,sm
uint32_t nr_cell_even_tx_compress_factor;
uint32_t nr_cell_odd_tx_compress_factor;
}nr_tasks_inf_t;
typedef struct phy_com_param
{
uint16_t phy_cell_id;
uint8_t cell_index;
uint8_t frame_type; //0:FDD, 1:TDD
uint8_t slot_format;//0-7D2U,1-1D3U
uint8_t num_tx_ant;//2T/4T
uint8_t num_rx_ant;//2R/4R
uint8_t tdd_period;
uint8_t scs;
uint8_t rssi_meas;//0:no report, 1:dBm, 2:dbFs
uint8_t rsrp_meas;//0:no report, 1:dBm, 2:dbFs
uint8_t pad;
uint16_t dl_bandwidth;
uint16_t ul_bandwidth;
uint32_t dl_freq;
uint32_t ul_freq;
uint32_t t_advance;//cpri
uint32_t r_delay;//cpri
}phy_com_param_t;
#endif