124 lines
4.9 KiB
C
124 lines
4.9 KiB
C
// +FHDR------------------------------------------------------------
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// Copyright (c) 2022 SmartLogic.
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// ALL RIGHTS RESERVED
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// -----------------------------------------------------------------
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// Filename : ucp_utility.h
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// Author : xianfeng.du
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// Created On : 2022-06-25
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// Last Modified :
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// -----------------------------------------------------------------
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// Description:
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//
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//
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// -FHDR------------------------------------------------------------
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#ifndef __UCP_UTILITY_H__
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#define __UCP_UTILITY_H__
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#include <string.h>
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#include "typedef.h"
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#include "ucps2-intrin.h"
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#include "mem_sections.h"
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#include "spinlock.h"
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#define do_write(a,v) __ucps2_store_ext_mem((void *)(a), (uint32_t)(v), f_W)
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#define do_write_byte(a,v) __ucps2_store_ext_mem((void *)(a), (uint8_t)(v), f_B)
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#define do_write_short(a,v) __ucps2_store_ext_mem((void *)(a), (uint16_t)(v), f_S)
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#define do_read(a) __ucps2_load_ext_mem((void *)(a), f_W)
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#define do_read_byte(a) __ucps2_load_ext_mem((void *)(a), f_B)
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#define do_read_short(a) __ucps2_load_ext_mem((void *)(a), f_S)
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#define do_read_volatile(a) __ucps2_load_ext_mem_v((void *)(a), f_W)
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#define do_read_volatile_byte(a) __ucps2_load_ext_mem_v((void *)(a), f_B)
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#define do_read_volatile_short(a) __ucps2_load_ext_mem_v((void *)(a), f_S)
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#define memcpy_ucp(d,s,l) memcpy_ext((void *__restrict)(d), (const void *__restrict)(s), (l))
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#define memset_ucp(d,v,l) memset_ext((void *)(d), (uint32_t)(v), (l))
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#define memcmp_ucp(s1,s2,l) memcmp((const void *)(s1), (const void *)(s2), (l))
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//vector copy,sm address must align 64 bytes
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#define memcpy_ucp_dm2sm(d,s,l) vmemcpy_dm2sm((void *__restrict)(d), (const void *__restrict)(s), (l))
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#define memcpy_ucp_sm2dm(d,s,l) vmemcpy_sm2dm((void *__restrict)(d), (const void *__restrict)(s), (l))
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#define sizeof_aligned_4bytes(a) (((sizeof(a) + 3) >> 2) << 2)//aligned 4 bytes
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#define sizeof_aligned_64bytes(a) (((sizeof(a) + 63) >> 6) << 6)
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#define spin_lock_init(x) smart_spinlock_init(x)
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#define spin_lock(x) smart_spinlock_irq(x)//smart_spinlock(x)
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#define spin_unlock(x) smart_spinunlock_irqrestore(x)//smart_spinunlock(x)
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typedef enum eUcpSpinlockType {
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LOCK_UL_TX_ALLOC = 1,
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LOCK_UL_TX_PUT,
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LOCK_DL_RX_GET,
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LOCK_DL_RX_FREE,
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LOCK_BUILD_CELL,
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} UcpSpinlockType_e;
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typedef enum eDdrSpinlockType {
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LOCK_DDR_STC_CTW = 0,
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LOCK_DDR_CTC,
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LOCK_DDR_BUILD_CELL,
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} DdrSpinlockType_e;
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// ALWAYS_INLINE int32_t get_core_id();
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int32_t isPowerOf2(uint32_t n);
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void ucp_spinlock_init();
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void ucp_nop(uint32_t cycleCnt);
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#define DBG_DDR_PALLADIUM
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#define DBG_DDR_ADDR_BASE (0xB7E00000) //0xA8000000
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#define DBG_DDR_IDX_COMMON_BASE (0)
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#define DBG_DDR_IDX_OSP_BASE (2048*1)
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#define DBG_DDR_IDX_MSG_BASE (2048*2)
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#define DBG_DDR_IDX_DRV_BASE (2048*3)
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#define DBG_DDR_IDX_OSP2_BASE (2048*11) // 0xB7E16000
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#define DBG_DDR_IDX_ERR_BASE (2048*18)
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#define DBG_DDR_IDX_CPRI_BASE (2048*20)
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#define DBG_DDR_IDX_ECPRI_BASE (2048*24) // 0xB7E30000
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#define DBG_DDR_IRQ_ADDR_BASE (0xB7FC0000)
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#define DBG_DDR_IRQ_LEN (0x1000)
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#define DBG_DDR_OS_ADDR_BASE (0xB7FCD000)
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#define DBG_DDR_OS_LEN (0x100) //(0x400)
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#define DBG_DDR_OS_NO_IDLE_BASE (0xB7FCD800)
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#define DBG_DDR_OS_NO_IDLE_LEN (0x100)
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#define DBG_DDR_HW_ADDR_BASE (0xB7FD0400)
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#define DBG_DDR_HW_LEN (0x200)
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#define DBG_DDR_SPIN_ADDR_BASE (0xB7FD1400)
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#define DBG_DDR_SPIN_LEN (0x80)
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#define DBG_DDR_OSP_HW_BASE (476544) // 0xB7FD1600
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#define DBG_DDR_OSP_HW_LEN (0x30) // 48
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#define DBG_DDR_COMMON_IDX(core_id,x) (DBG_DDR_IDX_COMMON_BASE + (core_id) * 128 + (x))
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#define DBG_DDR_MSG_IDX(queue_no,x) (DBG_DDR_IDX_MSG_BASE + (queue_no) * 192 + (x))
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#define DBG_DDR_ERR_IDX(core_id,x) (DBG_DDR_IDX_ERR_BASE + (core_id)*128 + (x))
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#define DBG_DDR_ECPRI_IDX(ecs_id, x) (DBG_DDR_IDX_ECPRI_BASE + (ecs_id) * 1024 + (x))
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#define OSP_DEBUG_HW_POT(core_id, idx) (DBG_DDR_OSP_HW_BASE + ((core_id)*DBG_DDR_OSP_HW_LEN) + idx)
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#define UCP_OSP_DBG_HW_CNT_ENABLE
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#ifdef DBG_DDR_PALLADIUM
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void pld_debug_write(uint32_t idx, uint32_t value);
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void pld_debug_write_splice_short(uint32_t idx, uint16_t hi, uint16_t lo);
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void pld_debug_write_splice_byte(uint32_t idx, uint8_t hi0, uint8_t hi1, uint8_t lo0, uint8_t lo1);
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#define debug_write(a, b) pld_debug_write((uint32_t)(a), (uint32_t)(b))
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#define debug_write_splice_short(a, b, c) pld_debug_write_splice_short((a), (b), (c))
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#define debug_write_splice_byte(a, b, c, d, e) pld_debug_write_splice_byte((a), (b), (c), (d), (e))
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#else
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#define debug_write(a, b)
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#define debug_write_splice_short(a, b, c)
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#define debug_write_splice_byte(a, b, c, d, e)
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#endif
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//#define ATOMIC_IMPLEMENTATION
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#define atomic_load(object) __ucps2_atomicld((void *)object, f_W)
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#define atomic_store(object, operand) __ucps2_atomicst((void *)object, operand, f_W)
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ALWAYS_INLINE int32_t atomic_fetch_add(void* object, int32_t operand);
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#endif
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