47 lines
2.2 KiB
C
47 lines
2.2 KiB
C
#ifndef TEST_FUNC_H
|
|
#define TEST_FUNC_H
|
|
#ifdef IDE_TEST
|
|
#include "type_define.h"
|
|
#include "drv_ape.h"
|
|
|
|
|
|
|
|
#define RECEIVER_IDE_BASE_ADDR ((uint32_t)&g_deofdm_test_file)
|
|
|
|
#define RECEIVER_IDE_CONFIG_DM0_ADDR (RECEIVER_IDE_BASE_ADDR)
|
|
#define RECEIVER_IDE_CONFIG_DM0_LEN (14912)
|
|
#define RECEIVER_IDE_CONFIG_DM1_ADDR (RECEIVER_IDE_CONFIG_DM0_ADDR + RECEIVER_IDE_CONFIG_DM0_LEN)
|
|
#define RECEIVER_IDE_CONFIG_DM1_LEN (480)
|
|
#define RECEIVER_IDE_CONFIG_DM2_ADDR (RECEIVER_IDE_CONFIG_DM1_ADDR + RECEIVER_IDE_CONFIG_DM1_LEN)
|
|
#define RECEIVER_IDE_CONFIG_DM2_LEN (54128)
|
|
#define RECEIVER_IDE_CONFIG_DM3_ADDR (RECEIVER_IDE_CONFIG_DM2_ADDR + RECEIVER_IDE_CONFIG_DM2_LEN)
|
|
#define RECEIVER_IDE_CONFIG_DM3_LEN (8192)
|
|
#define RECEIVER_IDE_TIME_DATA_ADDR (RECEIVER_IDE_CONFIG_DM3_ADDR + RECEIVER_IDE_CONFIG_DM3_LEN)
|
|
#define RECEIVER_IDE_TIME_DATA_LEN (61440*4)
|
|
#define RECEIVER_IDE_EQUIN_QUAN_ADDR (RECEIVER_IDE_TIME_DATA_ADDR + RECEIVER_IDE_TIME_DATA_LEN)
|
|
#define RECEIVER_IDE_EQUIN_QUAN_LEN (57344*4)
|
|
#define RECEIVER_IDE_CH_EST_1_QUAN_ADDR (RECEIVER_IDE_EQUIN_QUAN_ADDR + RECEIVER_IDE_EQUIN_QUAN_LEN)
|
|
#define RECEIVER_IDE_CH_EST_1_QUAN_LEN (4096*4)
|
|
#define RECEIVER_IDE_EQUOUT_QUAN_ZP_ADDR (RECEIVER_IDE_EQUIN_QUAN_ADDR + RECEIVER_IDE_EQUIN_QUAN_LEN)
|
|
#define RECEIVER_IDE_EQUOUT_QUAN_ZP_LEN (57344*4)
|
|
|
|
|
|
#define TRANSMITTER_IDE_BASE_ADDR ((uint32_t)g_deofdm_test_file)
|
|
|
|
#define TRANSMITTER_IDE_CONFIG_DM0_ADDR (TRANSMITTER_IDE_BASE_ADDR)
|
|
#define TRANSMITTER_IDE_CONFIG_DM0_LEN (0x0)
|
|
#define TRANSMITTER_IDE_CONFIG_DM1_ADDR (TRANSMITTER_IDE_CONFIG_DM0_ADDR + TRANSMITTER_IDE_CONFIG_DM0_LEN)
|
|
#define TRANSMITTER_IDE_CONFIG_DM1_LEN (0x5660)
|
|
#define TRANSMITTER_IDE_CONFIG_DM2_ADDR (TRANSMITTER_IDE_CONFIG_DM1_ADDR + TRANSMITTER_IDE_CONFIG_DM1_LEN)
|
|
#define TRANSMITTER_IDE_CONFIG_DM2_LEN (0x0)
|
|
#define TRANSMITTER_IDE_CONFIG_DM3_ADDR (TRANSMITTER_IDE_CONFIG_DM2_ADDR + TRANSMITTER_IDE_CONFIG_DM2_LEN)
|
|
#define TRANSMITTER_IDE_CONFIG_DM3_LEN (0x0)//
|
|
|
|
#define TRANSMITTER_IDE_SRC_BIT_ADDR (TRANSMITTER_IDE_CONFIG_DM3_ADDR + TRANSMITTER_IDE_CONFIG_DM3_LEN)
|
|
#define TRANSMITTER_IDE_SRC_BIT_LEN (0x3E90)//bit/8
|
|
|
|
|
|
extern __VIRT_SM uint32_t g_deofdm_test_file[];
|
|
#endif
|
|
#endif
|