193 lines
13 KiB
C
193 lines
13 KiB
C
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/*********************************************************************
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*
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* Filename: ucp_js_subcrg.h
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*
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* Created: 2021-11-11 09:34:35 AM
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* Last Modified: 2022-06-21 02:57:28 PM
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* Author: LiPin , lip2014@ia.ac.cn
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* Organization: Beijing Smart Logic Technology Co., Ltd.
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*
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* Description:
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*
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*
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********************************************************************/
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#ifndef __JS_JECS_SUBCRG__
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#define __JS_JECS_SUBCRG__
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//The JESD And SRIO SUBCRG Base Addr
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#define JS_CRG_BASE 0x05F10000
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//The ECPRI And SRIO SUBCRG Base Addr
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#define JECS_CRG_BASE 0x08430000
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//The JESD LVDS Base Addr
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#define JESD_LVDS_BASE 0x05F20000
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//--------------------------------------JS SYSTEM-------------------------------//
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//JESD And SRIO SubCtrl Reg Addr
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#define JS_CRG_CLK_SEL (JS_CRG_BASE + 4*0) //RW
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#define JS_CRG_DPLL0_CTRL_0 (JS_CRG_BASE + 4*1) //RW
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#define JS_CRG_DPLL0_CTRL_1 (JS_CRG_BASE + 4*2) //RW
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#define JS_CRG_DPLL1_CTRL_0 (JS_CRG_BASE + 4*3) //RW
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#define JS_CRG_DPLL1_CTRL_1 (JS_CRG_BASE + 4*4) //RW
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#define JS_CRG_SAM0_CLK_CTRL (JS_CRG_BASE + 4*5) //RW
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#define JS_CRG_SAM1_CLK_CTRL (JS_CRG_BASE + 4*6) //RW
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#define JS_CRG_SAM2_CLK_CTRL (JS_CRG_BASE + 4*7) //RW
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#define JS_CRG_CHA0_CLK_CTRL (JS_CRG_BASE + 4*8) //RW
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#define JS_CRG_CHA1_CLK_CTRL (JS_CRG_BASE + 4*9) //RW
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#define JS_CRG_CHA2_CLK_CTRL (JS_CRG_BASE + 4*10) //RW
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#define JS_CRG_SAM3_CLK_CTRL (JS_CRG_BASE + 4*11) //RW
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#define JS_CRG_DPLL_PMA_CTRL (JS_CRG_BASE + 4*12) //RW
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#define JS_CRG_DPLL_CLK_CTRL (JS_CRG_BASE + 4*13) //RW
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#define JS_CRG_JESD0_TIME_CTRL (JS_CRG_BASE + 4*14) //RW
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#define JS_CRG_JESD1_TIME_CTRL (JS_CRG_BASE + 4*15) //RW
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#define JS_CRG_JESD2_TIME_CTRL (JS_CRG_BASE + 4*16) //RW
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#define JS_CRG_JESD3_TIME_CTRL (JS_CRG_BASE + 4*17) //RW
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#define JS_CRG_JESD4_TIME_CTRL (JS_CRG_BASE + 4*18) //RW
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#define JS_CRG_JESD5_TIME_CTRL (JS_CRG_BASE + 4*19) //RW
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#define JS_CRG_JESD6_TIME_CTRL (JS_CRG_BASE + 4*20) //RW
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#define JS_CRG_JESD7_TIME_CTRL (JS_CRG_BASE + 4*21) //RW
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#define JS_CRG_JESD8_TIME_CTRL (JS_CRG_BASE + 4*22) //RW
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#define JS_CRG_JESD9_TIME_CTRL (JS_CRG_BASE + 4*23) //RW
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#define JS_CRG_JESD10_TIME_CTRL (JS_CRG_BASE + 4*24) //RW
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#define JS_CRG_JESD11_TIME_CTRL (JS_CRG_BASE + 4*25) //RW
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#define JS_CRG_DPLL0_DSKEW_CTRL (JS_CRG_BASE + 4*26) //RO
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#define JS_CRG_DPLL1_DSKEW_CTRL (JS_CRG_BASE + 4*27) //RO
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#define JS_CRG_PHY_TX_RSTN_JS_CTRL_0 (JS_CRG_BASE + 4*28) //RW
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#define JS_CRG_PHY_TX_RSTN_JS_CTRL_1 (JS_CRG_BASE + 4*29) //RW
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#define JS_CRG_PHY_TX_RSTN_JS_CTRL_2 (JS_CRG_BASE + 4*30) //RW
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#define JS_CRG_PHY_TX_RSTN_JS_CTRL_3 (JS_CRG_BASE + 4*31) //RW
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#define JS_CRG_PHY_RX_RSTN_JS_CTRL_0 (JS_CRG_BASE + 4*32) //RW
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#define JS_CRG_PHY_RX_RSTN_JS_CTRL_1 (JS_CRG_BASE + 4*33) //RW
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#define JS_CRG_PHY_RX_RSTN_JS_CTRL_2 (JS_CRG_BASE + 4*34) //RW
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#define JS_CRG_PHY_RX_RSTN_JS_CTRL_3 (JS_CRG_BASE + 4*35) //RW
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#define JS_CRG_CHA3_CLK_CTRL (JS_CRG_BASE + 4*36) //RW
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#define JS_CRG_SAM_CHA6_RST_CTRL (JS_CRG_BASE + 4*37) //RW
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#define JS_CRG_SAM_CHA7_RST_CTRL (JS_CRG_BASE + 4*38) //RW
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#define JS_CRG_PHY_TX_RSTN_JECS_CTRL_3 (JS_CRG_BASE + 4*39) //RW
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#define JS_CRG_RFC_TMR_CLK_CTRL (JS_CRG_BASE + 4*40) //RW
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#define JS_CRG_RFC_TMR_RST_CTRL (JS_CRG_BASE + 4*41) //RW
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#define JS_CRG_PHY_RX_RSTN_JECS_CTRL_2 (JS_CRG_BASE + 4*42) //RW
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#define JS_CRG_PHY_RX_RSTN_JECS_CTRL_3 (JS_CRG_BASE + 4*43) //RW
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#define JS_CRG_PHY_RX_RST_JS_CTRL_0 (JS_CRG_BASE + 4*46) //RW
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#define JS_CRG_PHY_RX_RST_JS_CTRL_1 (JS_CRG_BASE + 4*47) //RW
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#define JS_CRG_PHY_RX_RST_JS_CTRL_2 (JS_CRG_BASE + 4*48) //RW
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#define JS_CRG_PHY_RX_RST_JS_CTRL_3 (JS_CRG_BASE + 4*49) //RW
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#define JS_CRG_PHY_RX_RST_JECS_CTRL_0 (JS_CRG_BASE + 4*50) //RW
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#define JS_CRG_PHY_RX_RST_JECS_CTRL_1 (JS_CRG_BASE + 4*51) //RW
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#define JS_CRG_PHY_RX_RST_JECS_CTRL_2 (JS_CRG_BASE + 4*52) //RW
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#define JS_CRG_PHY_RX_RST_JECS_CTRL_3 (JS_CRG_BASE + 4*53) //RW
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#define JS_CRG_PHY_EQ_RSTN_JS_CTRL_0 (JS_CRG_BASE + 4*54) //RW
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#define JS_CRG_PHY_EQ_RSTN_JS_CTRL_1 (JS_CRG_BASE + 4*55) //RW
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#define JS_CRG_PHY_EQ_RSTN_JS_CTRL_2 (JS_CRG_BASE + 4*56) //RW
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#define JS_CRG_PHY_EQ_RSTN_JS_CTRL_3 (JS_CRG_BASE + 4*57) //RW
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#define JS_CRG_PHY_EQ_RSTN_JECS_CTRL_0 (JS_CRG_BASE + 4*58) //RW
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#define JS_CRG_PHY_EQ_RSTN_JECS_CTRL_1 (JS_CRG_BASE + 4*59) //RW
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#define JS_CRG_PHY_EQ_RSTN_JECS_CTRL_2 (JS_CRG_BASE + 4*60) //RW
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#define JS_CRG_PHY_EQ_RSTN_JECS_CTRL_3 (JS_CRG_BASE + 4*61) //RW
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#define JS_CRG_PHY_PWR_ON_RST_JS_CTRL (JS_CRG_BASE + 4*62) //RW
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#define JS_CRG_PHY_PWR_ON_RST_JECS_CTRL (JS_CRG_BASE + 4*63) //RW
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#define JS_CRG_SRIO_PWR_ON_RST_JS_CTRL (JS_CRG_BASE + 4*64) //RW
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#define JS_CRG_SRIO_PWR_ON_RST_JECS_CTRL (JS_CRG_BASE + 4*65) //RW
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#define JS_CRG_SAM_CHA0_RST_CTRL (JS_CRG_BASE + 4*66) //RW
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#define JS_CRG_SAM_CHA1_RST_CTRL (JS_CRG_BASE + 4*67) //RW
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#define JS_CRG_SAM_CHA2_RST_CTRL (JS_CRG_BASE + 4*68) //RW
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#define JS_CRG_SAM_CHA3_RST_CTRL (JS_CRG_BASE + 4*69) //RW
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#define JS_CRG_SAM_CHA4_RST_CTRL (JS_CRG_BASE + 4*70) //RW
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#define JS_CRG_SAM_CHA5_RST_CTRL (JS_CRG_BASE + 4*71) //RW
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#define JS_CRG_TMR_EN_SAM_CLK_SEL (JS_CRG_BASE + 4*72) //RW
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#define JS_CRG_JESD_CLK_CFG (JS_CRG_BASE + 4*73) //RW
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#define JS_CRG_SYSREF_CFG (JS_CRG_BASE + 4*74) //RW
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//--------------------------------------JECS SYSTEM-------------------------------//
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//JESD ECPRI CPRI SRIO Subcrg Reg Addr
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#define JECS_CRG_PLL_CTL_REG0 (JECS_CRG_BASE + 4*0)
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#define JECS_CRG_PLL_CTL_REG1 (JECS_CRG_BASE + 4*1)
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#define JECS_CRG_PLL_CTL_REG2 (JECS_CRG_BASE + 4*2)
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#define JECS_CRG_PLL_CTL_REG3 (JECS_CRG_BASE + 4*3)
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#define JECS_CRG_PLL_CTL_REG4 (JECS_CRG_BASE + 4*4)
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#define JECS_CRG_PLLSEL (JECS_CRG_BASE + 4*5)
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#define JECS_CRG_CLK_CTRL0 (JECS_CRG_BASE + 4*6)
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#define JECS_CRG_CLK_CTRL1 (JECS_CRG_BASE + 4*7)
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#define JECS_CRG_CLK_CTRL2 (JECS_CRG_BASE + 4*8)
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#define JECS_CRG_CLK_CTRL3 (JECS_CRG_BASE + 4*9)
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#define JECS_CRG_CLK_CTRL4 (JECS_CRG_BASE + 4*10)
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#define JECS_CRG_CLK_CTRL5 (JECS_CRG_BASE + 4*11)
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#define ECPRI_ACLK_CFG_REG (JECS_CRG_BASE + 4*11)
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#define JECS_CRG_CLK_CTRL6 (JECS_CRG_BASE + 4*12)
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#define JECS_CRG_CLK_CTRL7 (JECS_CRG_BASE + 4*13)
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#define JECS_CRG_CLK_CTRL8 (JECS_CRG_BASE + 4*14)
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#define JECS_CRG_CLK_CTRL9 (JECS_CRG_BASE + 4*15)
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#define JECS_CRG_CLK_CTRL10 (JECS_CRG_BASE + 4*16)
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#define JECS_CRG_CLK_CTRL11 (JECS_CRG_BASE + 4*17)
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#define JECS_CRG_PLL0_LOCK_CTRL (JECS_CRG_BASE + 4*18)
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#define JECS_CRG_MANTICORE0_RST_CTRL (JECS_CRG_BASE + 4*19)
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#define JECS_CRG_MANTICORE1_RST_CTRL (JECS_CRG_BASE + 4*20)
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#define JECS_CRG_MANTICORE2_RST_CTRL (JECS_CRG_BASE + 4*21)
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#define JECS_CRG_MANTICORE3_RST_CTRL (JECS_CRG_BASE + 4*22)
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#define JECS_CRG_MANTICORE4_RST_CTRL (JECS_CRG_BASE + 4*23)
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#define JECS_CRG_MANTICORE5_RST_CTRL (JECS_CRG_BASE + 4*59)
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#define JECS_CRG_MANTICORE6_RST_CTRL (JECS_CRG_BASE + 4*60)
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#define JECS_CRG_MANTICORE7_RST_CTRL (JECS_CRG_BASE + 4*63)
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#define JECS_CRG_MANTICORE8_RST_CTRL (JECS_CRG_BASE + 4*64)
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#define JECS_CRG_PMA0_RST_CTRL (JECS_CRG_BASE + 4*24)
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#define JECS_CRG_PMA1_RST_CTRL (JECS_CRG_BASE + 4*25)
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#define JECS_CRG_PMA2_RST_CTRL (JECS_CRG_BASE + 4*26)
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#define JECS_CRG_PMA3_RST_CTRL (JECS_CRG_BASE + 4*27)
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#define JECS_CRG_PMA4_RST_CTRL (JECS_CRG_BASE + 4*28)
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#define JECS_CRG_PMA5_RST_CTRL (JECS_CRG_BASE + 4*29)
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#define JECS_CRG_PMA6_RST_CTRL (JECS_CRG_BASE + 4*30)
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#define JECS_CRG_PMA7_RST_CTRL (JECS_CRG_BASE + 4*31)
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#define JECS_CRG_PMA8_RST_CTRL (JECS_CRG_BASE + 4*32)
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#define JECS_CRG_PMA9_RST_CTRL (JECS_CRG_BASE + 4*33)
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#define JECS_CRG_PMA10_RST_CTRL (JECS_CRG_BASE + 4*34)
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#define JECS_CRG_PMA11_RST_CTRL (JECS_CRG_BASE + 4*35)
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#define JECS_CRG_PMA12_RST_CTRL (JECS_CRG_BASE + 4*36)
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#define JECS_CRG_PMA13_RST_CTRL (JECS_CRG_BASE + 4*37)
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#define JECS_CRG_PMA14_RST_CTRL (JECS_CRG_BASE + 4*38)
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#define JECS_CRG_PMA15_RST_CTRL (JECS_CRG_BASE + 4*39)
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#define JECS_CRG_PMA16_RST_CTRL (JECS_CRG_BASE + 4*40)
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#define JECS_CRG_PMA17_RST_CTRL (JECS_CRG_BASE + 4*41)
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#define ECPRI_RST_CFG_REG (JECS_CRG_BASE + 4*41)
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#define JECS_CRG_SRIO_ULI_RST_CTRL (JECS_CRG_BASE + 4*43)
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#define JECS_CRG_STC_RST_CTRL (JECS_CRG_BASE + 4*43)
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#define JECS_CRG_SRIO_PWR_ON_RST_CTRL (JECS_CRG_BASE + 4*44)
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#define JECS_CRG_CPRI0_RST_CTRL (JECS_CRG_BASE + 4*45)
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#define JECS_CRG_CPRI1_RST_CTRL (JECS_CRG_BASE + 4*46)
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#define JECS_CRG_CPRI2_RST_CTRL (JECS_CRG_BASE + 4*47)
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#define JECS_CRG_CPRI3_RST_CTRL (JECS_CRG_BASE + 4*48)
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#define JECS_CRG_CPRI4_RST_CTRL (JECS_CRG_BASE + 4*49)
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#define JECS_CRG_CPRI5_RST_CTRL (JECS_CRG_BASE + 4*50)
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#define JECS_CRG_CPRI6_RST_CTRL (JECS_CRG_BASE + 4*51)
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#define JECS_CRG_CPRI_CDR_CLK_CTRL (JECS_CRG_BASE + 4*52)
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#define JECS_CRG_CPRI_ALT_CLK_CTRL (JECS_CRG_BASE + 4*53)
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#define JECS_CRG_CPRI_CORE_CLK_CTRL (JECS_CRG_BASE + 4*54)
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#define JECS_CRG_CPRI_PCS_CORE_CLK_CTRL (JECS_CRG_BASE + 4*55)
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#define JECS_CRG_CPRI0_CLK_CTRL (JECS_CRG_BASE + 4*56)
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#define JECS_CRG_CPRI1_CLK_CTRL (JECS_CRG_BASE + 4*57)
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#define JECS_CRG_CPRI2_CLK_CTRL (JECS_CRG_BASE + 4*58)
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#define SYNCE_OUT_CLK_SEL (JECS_CRG_BASE + 4*61)
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#define JECS_CRG_ECPRI_CPRI_RST (JECS_CRG_BASE + 4*62)
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//------------------------------------JESD LVDS--------------------------------//
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//JESD LVDS Reg Addr
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#define JS_CTRL_LVDS_BIAS_EN (JESD_LVDS_BASE + 4*1) //RW
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#define JS_CTRL_LVDS_VBIAS_SEL (JESD_LVDS_BASE + 4*2) //RW
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#define JS_CTRL_LVDS_PULLDN (JESD_LVDS_BASE + 4*3) //RW
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#define JS_CTRL_LVDS_SCHMITT_EN (JESD_LVDS_BASE + 4*4) //RW
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#define JS_CTRL_LVDS_RTERM_EN (JESD_LVDS_BASE + 4*5) //RW
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#define JS_CTRL_LVDS_RTERM_VAL_0 (JESD_LVDS_BASE + 4*6) //RW
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#define JS_CTRL_LVDS_RTERM_VAL_1 (JESD_LVDS_BASE + 4*7) //RW
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#define JS_CTRL_LVDS_RTERM_VAL_2 (JESD_LVDS_BASE + 4*8) //RW
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#define JS_CTRL_LVDS_RTERM_VAL_3 (JESD_LVDS_BASE + 4*9) //RW
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#define JS_CTRL_LVDS_RXCM_EN (JESD_LVDS_BASE + 4*10) //RW
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#define JS_CTRL_LVDS_RXEN (JESD_LVDS_BASE + 4*11) //RW
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#define JS_CTRL_LVDS_TXDRV_0 (JESD_LVDS_BASE + 4*12) //RW
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#define JS_CTRL_LVDS_TXDRV_1 (JESD_LVDS_BASE + 4*13) //RW
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#define JS_CTRL_LVDS_TXDRV_2 (JESD_LVDS_BASE + 4*14) //RW
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#define JS_CTRL_LVDS_TXDRV_3 (JESD_LVDS_BASE + 4*15) //RW
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#define JS_CTRL_LVDS_TXEN (JESD_LVDS_BASE + 4*16) //RW
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#define JS_CTRL_LVDS_TX_CM (JESD_LVDS_BASE + 4*17) //RW
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#define JS_CTRL_LVDS_PMUX_MODE (JESD_LVDS_BASE + 4*18) //RW
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#endif
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