chore: ➕ 手动添加依赖

driver/rfic/build.sh

@@ -0,0 +1,12 @@
+set -e
+
+# git submodule init
+# git submodule update --remote --merge --recursive
+
+# git clean -dxf
+# git fetch
+# git checkout DEV
+# git pull
+
+make clr
+make all

driver/rfic/makefile

@@ -0,0 +1,17 @@
+all:
+	rm -rf ./rf/ucp
+	rm -rf ./ucp/*.a
+	mkdir -p ./rf/ucp
+	mkdir -p ./rf/ucp/inc
+	make -C ./ucp
+	cp ./ucp/base/inc/ucp_param.h ./ucp/base/inc/ucp_jesd_gpio.h ./ucp/base/inc/ucp_reg_io.h ./rf/api/inc
+	cp ./ucp/api/inc/ucp_api_jesd.h ./rf/ucp/inc
+	cp ./ucp/libjesd.a ./rf/ucp/
+	make -C ./rf
+
+clean:
+	make -C ./rf clean
+
+clr:
+	make -C ./rf clr
+	make -C ./ucp clean

driver/rfic/rf/adrv9025/c_src/app/example/adi_ad9528Lib.c

@@ -0,0 +1,165 @@
+//******************** (C) COPYRIGHT 2022 SmartLogic*******************************
+// FileName           : ucp_api_clockGen.c
+// Author             : Boheng Lin bhlin919@126.com
+// Date First Issued  : 2023-03-04 02:37:50 PM
+// Last Modified      : 
+// Description        :
+// ------------------------------------------------------------
+// Modification History:
+// Version    Date       Author    Modification Description
+//
+//**********************************************************************************
+
+#include <stdint.h>
+#include <time.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include "adi_ad9528.h"
+#include "adi_ad9528_hal.h"
+#include "adi_ad9528_utilities.h"
+#include "adi_commonLib.h"
+#include "ucp_jesd_gpio.h"
+#include "ucp_rfic_gpio.h"
+
+#define                    AD9528_CHIP_ID  0x003
+
+static adi_ad9528_Init_t   ad9528InitInst;
+static adi_ad9528_Device_t ad9528Device;
+static int32_t             recoveryAct = ADI_COMMON_ACT_ERR_RESET_FULL;
+
+static adi_ad9528_ClockFrequencySettings_t clockFrequencies = {
+    122880000, //uint32_t vcxoFrequency_Hz;
+    30720000,   //uint32_t refAFrequency_Hz;
+    //uint32_t outputClock_Hz[ADI_AD9528_NUM_OUTPUT_CHANNELS];
+    {
+		122880000,       // channels 0   ADRV9026 DEVCLK 122.88M
+		960000,          // channels 1   ADRV9026 SYSREF 7.68M
+		960000,          // channels 2   UCP_TX   SYSREF 7.68M
+		122880000,       // channels 3   UCP_TX   DEVCLK 122.88M
+		0,               // channels 4
+		960000,          // channels 5   UCP_RX0  SYSREF 7.68M
+		122880000,       // channels 6   UCP_RX0  DEVCLK 122.88M
+		122880000,       // channels 7   UCP      SYSDEV 122.88M
+		960000,          // channels 8   UCP_RX1  SYSREF 7.68M
+		122880000,       // channels 9   UCP_RX1  DEVCLK 122.88M
+		0,               // channels 10            
+		0,               // channels 11
+		0,               // channels 12
+		0                // channels 13
+	},
+    //adi_ad9528_OutSourceSel_e outSource[ADI_AD9528_NUM_OUTPUT_CHANNELS];
+    {
+		ADI_AD9528_CHANNEL_DIV, // channels 0   ADRV9026 DEVCLK 122.88M
+		ADI_AD9528_SYSREF,      // channels 1   ADRV9026 SYSREF 7.68M
+		ADI_AD9528_SYSREF,      // channels 2   UCP_TX   SYSREF 7.68M
+		ADI_AD9528_CHANNEL_DIV, // channels 3   UCP_TX   DEVCLK 122.88M
+		ADI_AD9528_CHANNEL_DIV, // channels 4
+		ADI_AD9528_SYSREF,      // channels 5   UCP_RX0  SYSREF 7.68M
+		ADI_AD9528_CHANNEL_DIV, // channels 6   UCP_RX0  DEVCLK 122.88M
+		ADI_AD9528_CHANNEL_DIV, // channels 7   UCP      SYSDEV 122.88M
+		ADI_AD9528_SYSREF,      // channels 8   UCP_RX1  SYSREF 7.68M
+		ADI_AD9528_CHANNEL_DIV, // channels 9   UCP_RX1  DEVCLK 122.88M
+		ADI_AD9528_CHANNEL_DIV, // channels 10 
+		ADI_AD9528_CHANNEL_DIV, // channels 11
+		ADI_AD9528_CHANNEL_DIV, // channels 12
+		ADI_AD9528_CHANNEL_DIV  // channels 13
+	}
+};
+
+void ucp_api_ad9528_Reset(void)
+{
+    ucp_jesd_gpioSet(GPIO_INDEX_9528RESET, 0);
+    sleep(1);
+    ucp_jesd_gpioSet(GPIO_INDEX_9528RESET, 1);
+
+    memset(&ad9528Device, 0, sizeof(adi_ad9528_Device_t));
+    memset(&ad9528InitInst, 0, sizeof(adi_ad9528_Init_t));
+ 
+    return;
+}
+
+int32_t ucp_api_ad9528_Init(void)
+{
+    int32_t              ret;
+    int32_t              error = ADI_COMMON_HAL_OK;
+    uint8_t              reg;
+    adi_ad9528_Device_t *ad9528Dev = NULL;
+    adi_ad9528_Init_t   *ad9528Init = NULL;
+	adi_hal_Cfg_t       *devCfg = NULL;
+	
+	/* Board Level */
+    ad9528Dev = (adi_ad9528_Device_t*)&ad9528Device;
+	ad9528Init = (adi_ad9528_Init_t*)&ad9528InitInst;
+    
+	/* create hal layer for this motherboard daya: SPI_CHIP_SELECT_1 for ad9528*/
+	ad9528Dev->common.devHalInfo = NULL;
+	ad9528Dev->common.devHalInfo = hal_DevHalCfgCreate((ADI_HAL_INTERFACE_SPI | \
+                	                                      ADI_HAL_INTERFACE_LOG | \
+                	                                      ADI_HAL_INTERFACE_HWRESET | \
+                	                                      ADI_HAL_INTERFACE_TIMER),
+                	                                      SPI_CHIP_SELECT_1, "ad9528.txt"); 
+	if (ad9528Dev->common.devHalInfo == NULL)
+	{
+		printf("ERROR: %s:%u has failed.\n",
+			   __func__,
+			   __LINE__);
+		return ADI_HAL_SPI_FAIL;
+	}
+    
+    ad9528Dev->common.error.logEnable = ADI_ENABLE;
+	devCfg = (adi_hal_Cfg_t *)ad9528Dev->common.devHalInfo;
+	strcpy(devCfg->typeName, "ad9528Dev");
+	error = adi_hal_PlatformSetup(ad9528Dev->common.devHalInfo,
+								  (adi_hal_Platforms_e)ADI_UCP2_PLATFORM);
+	if (error != ADI_HAL_OK)
+	{
+		printf("ERROR: %s:%u has failed.\n",
+			   __func__,
+			   __LINE__);
+		return ADI_HAL_SPI_FAIL;
+	}
+    
+	adi_ad9528_HwOpen(ad9528Dev);
+	adi_ad9528_SpiCfgSet(ad9528Dev, &ad9528Init->spiSettings);
+	
+	if ((recoveryAct = adi_ad9528_InitStructConfig(ad9528Dev,
+                                              &clockFrequencies,
+                                              ad9528Init)) < 0)
+    {
+        return recoveryAct;
+    }
+
+	ret = adi_ad9528_Initialize(ad9528Dev, ad9528Init);
+	
+	adi_ad9528_SpiByteRead(ad9528Dev, AD9528_CHIP_ID, &reg);
+	printf("AD9528 ID:         0x%02X\n", reg);
+
+    reg = 0;
+    while (!(reg & 0x3)) {
+	    adi_ad9528_PllLockStatusGet(ad9528Dev, &reg);
+	    sleep(1);
+	}
+	
+	printf("AD9528 LockStatus: 0x%02X\n", reg);
+
+    return ret;
+}
+
+uint8_t ucp_api_ad9528_LockStatus(void)
+{
+    uint8_t data;
+
+	data = 0;
+    adi_ad9528_PllLockStatusGet((adi_ad9528_Device_t*)&ad9528Device, &data);
+	printf("status = %x\n", data);
+
+	return data;
+}
+
+void ucp_api_ad9528_OnePluse(uint8_t enable)
+{
+    adi_ad9528_SysrefRequest((adi_ad9528_Device_t*)&ad9528Device, enable);
+    return;
+}
+
+

driver/rfic/rf/adrv9025/c_src/app/example/adi_ad9528Lib.h

@@ -0,0 +1,34 @@
+//******************** (C) COPYRIGHT 2022 SmartLogic*******************************
+// FileName           : adi_ad9528.h
+// Author             : Boheng Lin bhlin919@126.com
+// Date First Issued  : 2023-09-08 02:37:50 PM
+// Last Modified      : 
+// Description        :
+// ------------------------------------------------------------
+// Modification History:
+// Version    Date       Author    Modification Description
+//
+//**********************************************************************************
+
+#ifndef ADI_AD9528_LIB_H_
+#define ADI_AD9528_LIB_H_
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void ucp_api_ad9528_Reset(void);
+extern int32_t ucp_api_ad9528_Init(void);
+extern uint8_t ucp_api_ad9528_LockStatus(void);
+extern void ucp_api_ad9528_OnePluse(uint8_t enable);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef ADI_JESD_H_ */
+

driver/rfic/rf/adrv9025/c_src/app/example/adi_adrv9025Lib.h

@@ -0,0 +1,45 @@
+//******************** (C) COPYRIGHT 2022 SmartLogic*******************************
+// FileName           : adi_adrv9025.h
+// Author             : Boheng Lin bhlin919@126.com
+// Date First Issued  : 2023-09-08 02:37:50 PM
+// Last Modified      : 
+// Description        :
+// ------------------------------------------------------------
+// Modification History:
+// Version    Date       Author    Modification Description
+//
+//**********************************************************************************
+
+#ifndef ADI_ADRV9025_LIB_H_
+#define ADI_ADRV9025_LIB_H_
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include "../../api/inc/ucp_api_rfic.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void adrv9025_setup_platform(void *adiInit, void *adiPostMcsStru);
+extern void ucp_api_adrv9025_Reset(void);
+extern int32_t adrv9025_init(uint64_t txLo, uint64_t rxLo, uint16_t initAtt, uint16_t initGain, 
+                             uint64_t auxLo, uint16_t enOrx,
+                             ucp_rfic_calPara_t calPara);
+extern int32_t ad9025_MGC_Cfg(uint8_t en);
+extern int32_t ad9025_Gain_Set(double gain_db);
+extern double ad9025_Gain_Get(void);
+extern int32_t ad9025_Att_Set(uint8_t att_db);
+extern uint8_t ad9025_Att_Get(void);
+
+extern int32_t adrv9025_tone (bool set);
+extern uint32_t adrv9026_getLockStatus (void);
+extern int16_t adrv9026_getTemperature (void);
+extern void ad9025_rssi(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef ADI_ADRV9025_LIB_H */

driver/rfic/rf/adrv9025/c_src/app/example/adi_commonLib.h

@@ -0,0 +1,32 @@
+//******************** (C) COPYRIGHT 2022 SmartLogic*******************************
+// FileName           : adi_commonLib.h
+// Author             : boheng.lin@smartlogictech.com
+// Date First Issued  : 2023-07-18 17:52:50 PM
+// Last Modified      : 
+// Description        :
+// ------------------------------------------------------------
+// Modification History:
+// Version    Date       Author    Modification Description
+//
+//**********************************************************************************
+
+#ifndef ADI_COMMON_LIB_H_
+#define ADI_COMMON_LIB_H_
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void* hal_DevHalCfgCreate(uint32_t interfaceMask, uint8_t spiChipSelect, const char* logFilename);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef ADI_COMMON_LIB_H_ */

driver/rfic/rf/adrv9025/c_src/app/example/initdata.h

@@ -0,0 +1,50 @@
+/**
+* \file initdata.h
+* \brief Contains extern declarations for adrv9025 data structures initializations
+*
+* ADRV9025 API Version: 6.4.0.14
+*
+*/
+
+/**
+* Copyright 2015 - 2018 Analog Devices Inc.
+* Released under the adrv9025 API license, for more information
+* see the "LICENSE.txt" file in this zip file.
+*/
+#ifndef INITDATA_H_
+#define INITDATA_H_
+
+#include "adi_adrv9025.h"
+#include "adi_adrv9025_utilities.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+    extern adi_adrv9025_ApiVersion_t    initStructApiVersion;
+    extern adi_adrv9025_ArmVersion_t    initStructArmVersion;
+    extern adi_adrv9025_StreamVersion_t initStructStreamVersion;
+    extern adi_adrv9025_Init_t          deviceInitInst_122_88M_4_9152G;
+    extern adi_adrv9025_PostMcsInit_t   devicePostMcsInitInst_122_88M_4_9152G;
+    extern adi_adrv9025_Init_t          deviceInitInst_61_44M_4_9152G_FDD2ANT;
+    extern adi_adrv9025_PostMcsInit_t   devicePostMcsInitInst_61_44M_4_9152G_FDD2ANT;
+    extern adi_adrv9025_Init_t          deviceInitInst_61_44M_4_9152G_FDD4ANT;
+    extern adi_adrv9025_PostMcsInit_t   devicePostMcsInitInst_61_44M_4_9152G_FDD4ANT;
+    extern adi_adrv9025_Init_t          deviceInitInst_245_76M_9_8304G;
+    extern adi_adrv9025_PostMcsInit_t   devicePostMcsInitInst_245_76M_9_8304G;
+    extern adi_adrv9025_Init_t          deviceInitInst_122_88M_9_8304G;
+    extern adi_adrv9025_PostMcsInit_t   devicePostMcsInitInst_122_88M_9_8304G;
+    extern adi_adrv9025_Init_t          deviceInitInst_122_88M_9_8304G_ORX;
+    extern adi_adrv9025_PostMcsInit_t   devicePostMcsInitInst_122_88M_9_8304G_ORX;
+	extern adi_adrv9025_Init_t          deviceInitInst_240M;
+    extern adi_adrv9025_PostMcsInit_t   devicePostMcsInitInst_240M;
+    extern adi_adrv9025_Init_t          deviceInitInst_122_88M_8_11008G;
+    extern adi_adrv9025_PostMcsInit_t   devicePostMcsInitInst_122_88M_8_11008G;
+	extern adi_adrv9025_Init_t          deviceInitInst_122_88M_4_9152G_FDD2ANT;
+    extern adi_adrv9025_PostMcsInit_t   devicePostMcsInitInst_122_88M_4_9152G_FDD2ANT;
+    
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef INITDATA_H_ */

driver/rfic/rf/adrv9025/c_src/app/makefile

@@ -0,0 +1,34 @@
+LIB_ADI_APP = libadi_app.a
+CC = aarch64-linux-gnu-gcc
+C_SRC_ROOT = ..
+
+ARFLAGS = -rv
+CFLAGS =  -Wall -shared \
+				-I./example \
+				-I$(C_SRC_ROOT)/devices/ad9528/public/include \
+				-I$(C_SRC_ROOT)/devices/adrv9025/public/include \
+				-I$(C_SRC_ROOT)/common \
+				-I$(C_SRC_ROOT)/common/adi_error \
+				-I$(C_SRC_ROOT)/common/adi_hal \
+				-I$(C_SRC_ROOT)/common/adi_logging \
+				-I$(C_SRC_ROOT)/platforms \
+				-I$(C_SRC_ROOT)/platforms/ucp2 \
+				-I../../../ucp/inc \
+				-I../../../api/inc \
+				-Werror
+
+EXT = c
+
+SRC = $(wildcard ./example/*.$(EXT))
+OBJS = $(SRC:.$(EXT)=.o)
+
+all: $(LIB_ADI_APP)
+.$(EXT).o:
+	$(CC) $(CFLAGS) -o $@ -c $<
+
+$(LIB_ADI_APP): $(OBJS)
+	ar $(ARFLAGS) $(LIB_ADI_APP) $(OBJS)
+
+clean:
+	rm -rf ./example/*.o
+	rm -rf *.a

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/ad9528/include/adi_ad9528_daughter_board.h

@@ -0,0 +1,50 @@
+/**
+ * \file adi_ad9528_daughter_board.h
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADI_AD9528_DAUGHTER_BOARD_H_
+#define _ADI_AD9528_DAUGHTER_BOARD_H_
+
+#include "adi_ad9528.h"
+#include "adi_motherboard_trx.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/****************************************************************************
+* Runtime functions
+****************************************************************************
+*/
+
+    
+/**
+* \brief Performing selected task to initialize the daughterboard.
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param trxDaughterboard a pointer to generic daughterboard structure.
+* \param actionFlags a selected task of initialization.
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_clock9528Board_Dispatch(adi_daughterboard_trx_t *trxDaughterboard, adrvtrx_board_action_e actionFlags);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/ad9528/src/adi_adr9528_daughter_board.c

@@ -0,0 +1,73 @@
+/**
+ * \file adi_ad9528_daughter_board.c
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include "adi_ad9528.h"
+#include "adi_ad9528_utilities.h"
+#include "adi_motherboard_trx.h"
+
+
+/****************************************************************************
+* Local functions
+****************************************************************************/
+
+int32_t adi_clock9528Board_Dispatch(adi_daughterboard_trx_t *trxDaughterboard, adrvtrx_board_action_e actionFlags)
+{
+    int32_t recoveryAction = ADI_COMMON_HAL_OK;
+    adi_common_Device_t *commonDev = NULL;
+    
+    /* Clock 9528 device allocation */
+    if (actionFlags == TRX_BOARD_ACTION_DEVICE_ALLOC) 
+    {
+        trxDaughterboard->clockDevice = (uintptr_t) calloc(1, sizeof(adi_ad9528_Device_t));
+        if (trxDaughterboard->clockDevice == 0)
+        {
+            return (ADI_COMMON_HAL_GEN_SW);
+        }
+    
+        /* Assigning Abstract pointers */
+        trxDaughterboard->clockAbstractDev.commonAbstractDevice = (adi_common_Device_t *) trxDaughterboard->clockDevice;
+        trxDaughterboard->clockAbstractDev.clockAbstractDevice = trxDaughterboard->clockDevice;
+                
+        return (ADI_COMMON_HAL_OK);
+    }
+    
+    /* HW Open */
+    if (actionFlags == TRX_BOARD_ACTION_DEVICE_HWOPEN) 
+    {
+        commonDev = trxDaughterboard->clockAbstractDev.commonAbstractDevice;
+        if ((recoveryAction = adi_ad9528_HwOpen((adi_ad9528_Device_t *) trxDaughterboard->clockDevice)) != (int32_t)ADI_HAL_OK)
+        {
+            printf("Clock HwOpen failed. %s \n", commonDev->error.errormessage);
+            return recoveryAction;
+        }
+        commonDev->error.logEnable = ADI_ENABLE;
+        
+        return (ADI_COMMON_HAL_OK);
+    }
+    
+    /* HW Close */
+    if (actionFlags == TRX_BOARD_ACTION_DEVICE_HWCLOSE) 
+    {
+        commonDev = trxDaughterboard->clockAbstractDev.commonAbstractDevice;
+        if ((recoveryAction = adi_ad9528_HwClose((adi_ad9528_Device_t *) trxDaughterboard->clockDevice)) != (int32_t)ADI_HAL_OK)
+        {
+            return recoveryAction;
+        }
+        adi_hal_DevHalCfgFree(commonDev->devHalInfo);
+        
+        return (ADI_COMMON_HAL_OK);
+    }
+    
+    return (recoveryAction);
+}

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/adi_daughterboard_trx_dev.c

@@ -0,0 +1,593 @@
+/**
+ * \file adi_board_trx_dev.c
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#include "adi_daughterboard_trx_dev.h"
+#include <stdlib.h>
+#include <string.h>
+
+extern int32_t adi_adrv9025Board_Dispatch(adi_daughterboard_trx_t* trxDaughterboard,
+                                          adrvtrx_board_action_e   actionFlags);
+
+extern int32_t adi_adrv9010Board_Dispatch(adi_daughterboard_trx_t* trxDaughterboard,
+                                          adrvtrx_board_action_e   actionFlags);
+
+extern int32_t adi_fpga9025Board_Dispatch(adi_daughterboard_trx_t* trxDaughterboard,
+                                          adrvtrx_board_action_e   actionFlags);
+
+extern int32_t adi_fpga9010Board_Dispatch(adi_daughterboard_trx_t* trxDaughterboard,
+                                          adrvtrx_board_action_e   actionFlags);
+
+extern int32_t adi_clock9528Board_Dispatch(adi_daughterboard_trx_t* trxDaughterboard,
+                                           adrvtrx_board_action_e   actionFlags);
+
+int32_t adi_daughterboard_Create(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t recoveryAction = ADI_COMMON_HAL_OK;
+    if (trxDaughterboard == NULL)
+    {
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+
+    // Memory allocation for clock device.
+    trxDaughterboard->ClockDispatch = adi_clock9528Board_Dispatch;
+    recoveryAction                  = trxDaughterboard->ClockDispatch(trxDaughterboard,
+                                                                      TRX_BOARD_ACTION_DEVICE_ALLOC);
+    if (recoveryAction != ADI_COMMON_HAL_OK)
+    {
+        if (trxDaughterboard->clockDevice)
+        {
+            free((void *)trxDaughterboard->clockDevice);
+        }
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+
+#if !defined(ADRV9025) && !defined(ADRV9010)
+    if ((trxDaughterboard->daughterCardId >= ADI_BOARD_9025_MIN) && (trxDaughterboard->daughterCardId <= ADI_BOARD_9025_MAX))
+    {
+        trxDaughterboard->BoardDispatch = adi_adrv9025Board_Dispatch;
+    }
+    else if ((trxDaughterboard->daughterCardId >= ADI_BOARD_9010_MIN) && (trxDaughterboard->daughterCardId <= ADI_BOARD_9010_MAX))
+    {
+        trxDaughterboard->BoardDispatch = adi_adrv9010Board_Dispatch;
+    }
+
+    /* Set up FPGA Device Dispatch pointer */
+    if (trxDaughterboard->motherboardId == ADI_ADS9_PLATFORM)
+    {
+        trxDaughterboard->FpgaDispatch = adi_fpga9025Board_Dispatch;
+    }
+    else if (trxDaughterboard->motherboardId == ADI_ADS8_PLATFORM)
+    {
+        trxDaughterboard->FpgaDispatch = adi_fpga9010Board_Dispatch;
+    }
+        
+    else
+    {
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+#elif defined(ADRV9025)
+    if ((trxDaughterboard->daughterCardId >= ADI_BOARD_9025_MIN) && (trxDaughterboard->daughterCardId <= ADI_BOARD_9025_MAX))
+    {
+        trxDaughterboard->BoardDispatch = adi_adrv9025Board_Dispatch;
+    }
+
+    /* Set up FPGA Device Dispatch pointer */
+    if (trxDaughterboard->motherboardId == ADI_ADS9_PLATFORM)
+    {
+        trxDaughterboard->FpgaDispatch = adi_fpga9025Board_Dispatch;
+    }
+    else if (trxDaughterboard->motherboardId == ADI_ADS8_PLATFORM)
+    {
+        trxDaughterboard->FpgaDispatch = adi_fpga9010Board_Dispatch;
+    }
+        
+    else
+    {
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+#elif defined(ADRV9010)
+    if ((trxDaughterboard->daughterCardId >= ADI_BOARD_9010_MIN) && (trxDaughterboard->daughterCardId <= ADI_BOARD_9010_MAX))
+    {
+        trxDaughterboard->BoardDispatch = adi_adrv9010Board_Dispatch;
+    }
+    /* Set up FPGA Device Dispatch pointer */
+    if (trxDaughterboard->motherboardId == ADI_ADS8_PLATFORM)
+    {
+        trxDaughterboard->FpgaDispatch = adi_fpga9010Board_Dispatch;
+    }
+        
+    else
+    {
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+#endif
+
+    // Memory allocation for board device.
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_DEVICE_ALLOC);
+    if (recoveryAction != ADI_COMMON_HAL_OK)
+    {
+        if (trxDaughterboard->clockDevice)
+        {
+            free((void *)trxDaughterboard->clockDevice);
+        }
+
+        if (trxDaughterboard->trxDevice)
+        {
+            free((void *)trxDaughterboard->trxDevice);
+        }
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+
+    /* Memory allocation for FPGA device. FPGA is platform dependent */
+    recoveryAction = trxDaughterboard->FpgaDispatch(trxDaughterboard,
+                                                    TRX_BOARD_ACTION_DEVICE_ALLOC);
+    if ((recoveryAction != ADI_COMMON_HAL_OK) || (trxDaughterboard->fpgaDevice == 0))
+    {
+        if (trxDaughterboard->clockDevice)
+        {
+            free((void *)trxDaughterboard->clockDevice);
+        }
+        if (trxDaughterboard->trxDevice)
+        {
+            free((void *)trxDaughterboard->trxDevice);
+        }
+        if (trxDaughterboard->fpgaDevice)
+        {
+            free((void *)trxDaughterboard->fpgaDevice);
+        }
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+
+    return (ADI_COMMON_HAL_OK);
+}
+
+int32_t adi_daughterboard_Init(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t              recoveryAction = ADI_HAL_OK;
+    adi_common_Device_t* commonDev;
+
+    /* Check if function pointer is populated */
+    if (adi_hal_DevHalCfgCreate == NULL)
+    {
+        /* TODO: add an error structure to the board level*/
+        printf("NULL Hal layer function pointer");
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    /* Initializing Clock common structure */
+    commonDev             = trxDaughterboard->clockAbstractDev.commonAbstractDevice;
+    commonDev->devHalInfo = adi_hal_DevHalCfgCreate((ADI_HAL_INTERFACE_SPI | ADI_HAL_INTERFACE_LOG | ADI_HAL_INTERFACE_HWRESET | ADI_HAL_INTERFACE_TIMER),
+                                                    1,
+                                                    "ad9528.txt");
+    if (commonDev->devHalInfo == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    /* Initializing Board common structure */
+    if (((trxDaughterboard->daughterCardId >= ADI_BOARD_9025_MIN) && (trxDaughterboard->daughterCardId <= ADI_BOARD_9025_MAX)) ||
+        ((trxDaughterboard->daughterCardId >= ADI_BOARD_9010_MIN) && (trxDaughterboard->daughterCardId <= ADI_BOARD_9010_MAX)))
+    {
+        commonDev             = trxDaughterboard->trxAbstractDev.commonAbstractDevice;
+        commonDev->devHalInfo = adi_hal_DevHalCfgCreate((ADI_HAL_INTERFACE_SPI | ADI_HAL_INTERFACE_LOG | ADI_HAL_INTERFACE_HWRESET | ADI_HAL_INTERFACE_TIMER),
+                                                        0,
+                                                        "adrvTrxLog.txt");
+        if (commonDev->devHalInfo == NULL)
+        {
+            return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+        }
+    }
+
+    /* Initializing FPGA common structure */
+    commonDev             = trxDaughterboard->fpgaAbstractDev.commonAbstractDevice;
+    commonDev->devHalInfo = adi_hal_DevHalCfgCreate((ADI_HAL_INTERFACE_BBICCTRL | ADI_HAL_INTERFACE_LOG | ADI_HAL_INTERFACE_I2C | ADI_HAL_INTERFACE_TIMER),
+                                                    0,
+                                                    "fpgaLog.txt");
+    if (commonDev->devHalInfo == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+
+    /***** Open hardware for the different devices *****/
+    commonDev = trxDaughterboard->fpgaAbstractDev.commonAbstractDevice;
+    if ((recoveryAction = adi_hal_HwOpen(commonDev->devHalInfo)) != (int32_t)ADI_HAL_OK)
+    {
+        printf("Board FPGA HwOpen failed. %s \n",
+               commonDev->error.errormessage);
+        return recoveryAction;
+    }
+    commonDev->error.logEnable = ADI_ENABLE;
+
+    /* Open Clock device */
+    recoveryAction = trxDaughterboard->ClockDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_DEVICE_HWOPEN);
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("Clock Device HwOpen failed.\n");
+        return recoveryAction;
+    }
+
+    /* Open Board device */
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_DEVICE_HWOPEN);
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("TRX HwOpen failed.\n");
+        return recoveryAction;
+    }
+
+
+    return (recoveryAction);
+}
+
+static int32_t trx_board_Clear(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t              recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+    adi_common_Device_t* commonDev;
+
+    ADI_NULL_DEVICE_PTR_RETURN(trxDaughterboard);
+
+    /* Check if function pointer is populated */
+    if (adi_hal_DevHalCfgFree == NULL)
+    {
+        /* TODO: add an error structure to the board level*/
+        printf("NULL Hal layer function pointer");
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    /* If HW devices have been allocated, clear & free.
+     * Otherwise, skip. */
+    if ((void *)trxDaughterboard->fpgaDevice != NULL)
+    {
+        /* Close FPGA device */
+        commonDev = trxDaughterboard->fpgaAbstractDev.commonAbstractDevice;
+        if ((recoveryAction = adi_hal_HwClose(commonDev->devHalInfo)) != (int32_t)ADI_HAL_OK)
+        {
+            return recoveryAction;
+        }
+        adi_hal_DevHalCfgFree(commonDev->devHalInfo);
+    }
+
+    if ((void *)trxDaughterboard->clockDevice != NULL)
+    {
+        /* Close Clock device */
+        recoveryAction = trxDaughterboard->ClockDispatch(trxDaughterboard,
+                                                         TRX_BOARD_ACTION_DEVICE_HWCLOSE);
+        if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+        {
+            printf("Clock Device HwClose failed\n");
+            return recoveryAction;
+        }
+    }
+
+    if ((void *)trxDaughterboard->BoardDispatch != NULL)
+    {
+        recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                         TRX_BOARD_ACTION_DEVICE_HWCLOSE);
+        if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+        {
+            printf("TRX HwClose failed\n");
+            return recoveryAction;
+        }
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_Destroy(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if (trxDaughterboard == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    /* Need to bring down devices and free the common devices contain insides device structures. */
+    if ((recoveryAction = trx_board_Clear(trxDaughterboard)) != ADI_COMMON_ACT_NO_ACTION)
+    {
+        return recoveryAction;
+    }
+
+    /* Now free the device structures */
+    if ((void *)trxDaughterboard->trxDevice != NULL)
+    {
+        if ((trxDaughterboard->boardAttribute & TRX_DAUGHTERBOARD_ATTRIBUTE_PREALLOCATE_TRX_DEVICE) == 0)
+        {
+            free((void *)trxDaughterboard->trxDevice);
+        }
+
+        trxDaughterboard->trxDevice = (uintptr_t)NULL;
+    }
+
+    if ((void *)trxDaughterboard->fpgaDevice != NULL)
+    {
+        free((void *)trxDaughterboard->fpgaDevice);
+        trxDaughterboard->fpgaDevice = (uintptr_t)NULL;
+    }
+
+    if ((void *)trxDaughterboard->clockDevice != NULL)
+    {
+        free((void *)trxDaughterboard->clockDevice);
+        trxDaughterboard->clockDevice = (uintptr_t)NULL;
+    }
+
+    /* Now free the daughterboard common device */
+    if (adi_hal_DevHalCfgFree)
+    {
+        adi_hal_DevHalCfgFree((void *)trxDaughterboard->common.devHalInfo);
+    }
+
+    /* Clean up specific data */
+    trxDaughterboard->boardAttribute       = 0;
+    trxDaughterboard->initializedStatus    = 0;
+    trxDaughterboard->daughterCardName[0]  = '\0';
+    trxDaughterboard->daughterCardStrId[0] = '\0';
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_Program(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if (trxDaughterboard == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    /* Execute Program Phase 1 */
+    recoveryAction = trxDaughterboard->BoardProgramPhase1(trxDaughterboard);
+
+    if (recoveryAction != ADI_COMMON_ACT_NO_ACTION)
+    {
+        return recoveryAction;
+    }
+
+    /* Execute Program Phase 2 */
+    recoveryAction = trxDaughterboard->BoardProgramPhase2(trxDaughterboard);
+
+    if (recoveryAction != ADI_COMMON_ACT_NO_ACTION)
+    {
+        return recoveryAction;
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_ClockConfig(adi_daughterboard_trx_t* trxDaughterboard,
+                                      uintptr_t                clockInit,
+                                      uint32_t                 deviceClock_kHz,
+                                      uint32_t                 vcxoFreq_kHz,
+                                      uint32_t                 refAFreq_kHz,
+                                      uint32_t                 fpgaClock_kHz)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if ((trxDaughterboard == NULL) || (trxDaughterboard->BoardDispatch == NULL))
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    if (clockInit == 0)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    if ((trxDaughterboard->daughterCardId <= ADI_BOARD_BLANK_EEPROM))
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    trxDaughterboard->parameterBucket[0] = deviceClock_kHz;
+    trxDaughterboard->parameterBucket[1] = vcxoFreq_kHz;
+    trxDaughterboard->parameterBucket[2] = refAFreq_kHz;
+    trxDaughterboard->parameterBucket[3] = fpgaClock_kHz;
+
+    /* Replace Clock Init if differeent */
+    if (trxDaughterboard->clockInit != clockInit)
+    {
+        trxDaughterboard->clockInit = clockInit;
+    }
+
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_CLOCK_CONFIG);
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("TRX Clock Config failed.\n");
+        return recoveryAction;
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_JesdBringup(adi_daughterboard_trx_t* trxDaughterboard,
+                                      uint32_t                 txLinkSel,
+                                      uint32_t                 rxLinkSel)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if ((trxDaughterboard == NULL) || (trxDaughterboard->BoardDispatch == NULL))
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    trxDaughterboard->parameterBucket[0] = txLinkSel;
+    trxDaughterboard->parameterBucket[1] = rxLinkSel;
+
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_DEVICE_JESD_BRINGUP);
+
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("TRX Jesd Bringup failed.\n");
+        return recoveryAction;
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_JesdTxBringup(adi_daughterboard_trx_t* trxDaughterboard,
+                                        uint32_t                 txLinkSel)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if ((trxDaughterboard == NULL) || (trxDaughterboard->BoardDispatch == NULL))
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    trxDaughterboard->parameterBucket[0] = txLinkSel;
+
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_DEVICE_JESD_TX_BRINGUP);
+
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("TRX Jesd Tx Bringup failed.\n");
+        return recoveryAction;
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_JesdRxBringup(adi_daughterboard_trx_t* trxDaughterboard,
+                                        uint32_t                 rxLinkSel)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if ((trxDaughterboard == NULL) || (trxDaughterboard->BoardDispatch == NULL))
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    trxDaughterboard->parameterBucket[0] = rxLinkSel;
+
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_DEVICE_JESD_RX_BRINGUP);
+
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("TRX Jesd Rx Bringup failed.\n");
+        return recoveryAction;
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_Ad9528Init(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if ((trxDaughterboard == NULL) || (trxDaughterboard->BoardDispatch == NULL))
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard, TRX_BOARD_ACTION_DEVICE_AD9528_INIT);
+
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("Ad9528 Init has failed.\n");
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_FpgaInit(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if ((trxDaughterboard == NULL) || (trxDaughterboard->BoardDispatch == NULL))
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard, TRX_BOARD_ACTION__FPGA__INIT);
+
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("Ad9528Init has failed.\n");
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_ProgramPhase1(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if ((trxDaughterboard == NULL) || (trxDaughterboard->BoardDispatch == NULL) || (trxDaughterboard->FpgaDispatch == NULL))
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+
+
+    /* Execute Daughterboard Phase 1*/
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_PHASE_1);
+
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("TRX Phase 1 failed.\n");
+        return recoveryAction;
+    }
+
+
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_ProgramPhase2(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if ((trxDaughterboard == NULL) || (trxDaughterboard->BoardDispatch == NULL))
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_PHASE_2);
+
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("TRX Phase 2 failed.\n");
+        return recoveryAction;
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_daughterboard_DataInterfaceReset(adi_daughterboard_trx_t* trxDaughterboard)
+{
+    int32_t recoveryAction = ADI_COMMON_HAL_OK;
+
+    if ((trxDaughterboard == NULL) || (trxDaughterboard->BoardDispatch == NULL))
+    {
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+
+    recoveryAction = trxDaughterboard->BoardDispatch(trxDaughterboard,
+                                                     TRX_BOARD_ACTION_DATA_INTF_RESET);
+
+    if (recoveryAction != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        printf("TRX Phase 1 failed.\n");
+        return recoveryAction;
+    }
+
+    return recoveryAction;
+}

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/adi_daughterboard_trx_dev.h

@@ -0,0 +1,275 @@
+#ifndef _ADI_DAUGHTERBOARD_TRX_DEV_H_
+#define _ADI_DAUGHTERBOARD_TRX_DEV_H_
+
+#include "adi_daughterboard_trx_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/****************************************************************************
+* Runtime functions
+****************************************************************************
+*/
+
+/**
+* \brief This function implements the following
+*        Closes Device drivers in use by the requested board
+*        Deallocates memory consumed by device HAL instances
+*        Removes the daughter board instance from the list of daughter cards instantiated
+*        Deallocates memory for device instances in the board requested
+*        Updates the list of daughter boards active
+*
+* \dep_begin
+* \dep{genericBoardHandle}
+* \dep_end
+*
+* \param genericBoardHandle Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_daughterboard_Destroy(adi_daughterboard_trx_t* genericBoardHandle);
+
+/**
+* \brief This function creates a device board instance for daughter card
+*        This function will create the clock instance
+*        This function will also create the FPGA instance for motherboard
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_HAL_GEN_SW Recovery action returned in case of error (null pointer or unable to allocate structures)
+* \retval ADI_COMMON_HAL_OK Function completed successfully
+
+*/
+int32_t adi_daughterboard_Create(adi_daughterboard_trx_t* trxDaughterboard);
+
+/**
+* \brief Function to Initialize the devices
+*        This function will create the platform layer structures for the different devices
+*        This function will open the HW needed for the devices
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_daughterboard_Init(adi_daughterboard_trx_t* trxDaughterboard);
+
+/**
+* \brief Function to Program the daughter card board
+*        This function will program the devices that are contained in the daughter card board
+*
+* \pre This function is called after the devices are Create()
+*      Init() have been called
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_daughterboard_Program(adi_daughterboard_trx_t* trxDaughterboard);
+
+/**
+* \brief Function to execute Program Phase 1 the daughter card board
+*        This function will program the devices that are contained in the daughter card board
+*
+* \pre This function is called after the devices are Create()
+*      Init() have been called
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_daughterboard_ProgramPhase1(adi_daughterboard_trx_t* trxDaughterboard);
+
+/**
+* \brief Function to execute Program Phase 2 the daughter card board
+*        This function will program the devices that are contained in the daughter card board
+*
+* \pre This function is called after the devices are Create()
+*      Init() have been called
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_daughterboard_ProgramPhase2(adi_daughterboard_trx_t* trxDaughterboard);
+
+/**
+* \brief Function to Confgiure Board Clock Settings
+*        This function will configure the Clock settings for the board
+*
+* \dep_begin
+* \dep{ad9528Init}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+* \param clockInit Pointer to AD9528 clock device init structure.
+* \param deviceClock_kHz Device clock frequency in kHz
+* \param vcxoFreq_kHz VCXO clock frequency in kHz
+* \param refAFreq_kHz RefA clock frequency in kHz
+* \param fpgaClock_kHz FPGA clock frequency in kHz
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adi_daughterboard_ClockConfig(adi_daughterboard_trx_t* trxDaughterboard,
+                                      uintptr_t                clockInit,
+                                      uint32_t                 deviceClock_kHz,
+                                      uint32_t                 vcxoFreq_kHz,
+                                      uint32_t                 refAFreq_kHz,
+                                      uint32_t                 fpgaClock_kHz);
+
+/**
+* \brief Function to bring up the JESD204 data link for the motherboard eval board.
+*
+* \pre This function is normally called by the Program_v2 
+*      function and is not required by the end user.  It would be called after
+*      post MCS init.
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+* \param txLinkSel Bitmask representing which RF TX links to enable (Bit0=1: Enable Deframer 0, Bit1=1: Enable Deframer 1)
+* \param rxLinkSel Bitmask representing which RF RX links to enable (Bit0=1: Enable Framer 0, Bit1=1: Enable Framer 1, Bit2=1: Enable Framer 2)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_daughterboard_JesdBringup(adi_daughterboard_trx_t* trxDaughterboard,
+                                      uint32_t                 txLinkSel,
+                                      uint32_t                 rxLinkSel);
+
+/**
+* \brief Function to bring up the JESD204 TX data link for the motherboard eval board.
+*
+* \pre This function is normally called by the adi_daughterboard_JesdBringup 
+*      function and is not required by the end user.  It would be called after
+*      post MCS init.
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+* \param txLinkSel Bitmask representing which RF TX links to enable (Bit0=1: Enable Deframer 0, Bit1=1: Enable Deframer 1)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_daughterboard_JesdTxBringup(adi_daughterboard_trx_t* trxDaughterboard,
+                                        uint32_t                 txLinkSel);
+
+/**
+* \brief Function to bring up the JESD204 RX data link for the motherboard eval board.
+*
+* \pre This function is normally called by the adi_daughterboard_JesdBringup 
+*      function and is not required by the end user.  It would be called after
+*      post MCS init.
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+* \param rxLinkSel Bitmask representing which RF RX links to enable (Bit0=1: Enable Framer 0, Bit1=1: Enable Framer 1, Bit2=1: Enable Framer 2)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_daughterboard_JesdRxBringup(adi_daughterboard_trx_t* trxDaughterboard,
+                                        uint32_t                 rxLinkSel);
+
+/**
+* \brief Resets the Data Interface with the appropriate procedure based on the daughterboard
+*        type.
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_daughterboard_DataInterfaceReset(adi_daughterboard_trx_t* trxDaughterboard);
+
+/**
+* \brief Initializes the AD9528 by writing all SPI registers
+*
+* Initializes the AD9528 using the values passed in through the adi_daughterboard_trx_t structure.
+*
+* <B>Dependencies</B>
+* - All parameters in init structure
+* - device->common.devHalInfo
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter
+*  check
+*/
+int32_t adi_daughterboard_Ad9528Init(adi_daughterboard_trx_t* trxDaughterboard);
+
+/**
+* \brief Initializes the FPGA device
+*
+* Initializes the FPGA using the values passed in through the adi_daughterboard_trx_t structure.
+*
+* \pre adi_fpga9010Board_Dispatch API invoked and completed successfully
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+*/
+int32_t adi_daughterboard_FpgaInit(adi_daughterboard_trx_t* trxDaughterboard);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/adi_daughterboard_trx_types.h

@@ -0,0 +1,164 @@
+#ifndef _ADI_DAUGHTERBOARD_TRX_TYPES_H_
+#define _ADI_DAUGHTERBOARD_TRX_TYPES_H_
+
+#include <stdint.h>
+#include "adi_common.h"
+#include "adi_fmc_fru.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#ifndef ADI_BOARD_NAME_SIZE
+#define ADI_BOARD_NAME_SIZE 64
+#endif
+
+#define  TRX_DAUGHTERBOARD_ATTRIBUTE_TYPE_EE                0x00000001
+#define  TRX_DAUGHTERBOARD_ATTRIBUTE_PREALLOCATE_TRX_DEVICE 0x00000002
+
+typedef enum adrvtrx_board_action
+{
+    TRX_BOARD_ACTION_NONE = 0,
+    TRX_BOARD_ACTION_DEVICE_ALLOC,
+    TRX_BOARD_ACTION_DEVICE_HWOPEN,
+    TRX_BOARD_ACTION_DEVICE_HWCLOSE,
+    TRX_BOARD_ACTION_CLOCK_CONFIG,
+    TRX_BOARD_ACTION_DEVICE_JESD_BRINGUP,
+    TRX_BOARD_ACTION_DEVICE_JESD_TX_BRINGUP,
+    TRX_BOARD_ACTION_DEVICE_JESD_RX_BRINGUP,
+    TRX_BOARD_ACTION_PHASE_1,
+    TRX_BOARD_ACTION_PHASE_2,
+    TRX_BOARD_ACTION_DATA_INTF_RESET,
+    
+    TRX_BOARD_ACTION_FPGA_INIT,
+    TRX_BOARD_ACTION_DEVICE_AD9528_INIT,
+    TRX_BOARD_ACTION__FPGA__INIT
+} adrvtrx_board_action_e;
+
+typedef struct adi_daughterboard_trx adi_daughterboard_trx_t;
+
+/**
+* \brief Data structure to hold SPI settings for all system device types
+*/
+typedef struct adi_adrvtrx_SpiSettings
+{
+    uint8_t  msbFirst;           /*!< 1 = MSB First, 0 = LSB First Bit order for SPI transaction */
+    uint8_t  enSpiStreaming;     /*!< Not Recommended - most registers in ADRV9010 API are not consecutive */
+    uint8_t  autoIncAddrUp;      /*!< For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr = addr-1 */
+    uint8_t  fourWireMode;       /*!< 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode */
+    uint32_t cmosPadDrvStrength; /*!< Drive strength of CMOS pads when used as outputs (SDIO, SDO, GP_INTERRUPT, GPIO 1, GPIO 0) */
+} adi_adrvtrx_SpiSettings_t;
+
+/*
+ * \brief This is a union structure to contain several structures. It is intended to either access the common pointer (which is the fist element of device structure) 
+ *        or the device structure itself.
+ */
+typedef union adi_trxAbstract_union
+{
+    adi_common_Device_t* commonAbstractDevice;
+    uintptr_t            fpgaAbstractDevice;  /*!< Abstract pointer to FPGA device */
+    uintptr_t            trxAbstractDevice;   /*!< Abstract pointer to TRX device i.e. 9010, 9025 */
+    uintptr_t            clockAbstractDevice; /*!< Abstract pointer to Clock device */
+} adi_trxAbstract_union_t;
+
+/*
+ * \brief Saving some necessary information during initialization for later access.
+ */
+typedef struct adi_adrvtrx_MiscInfo
+{
+    uint8_t   enable204cState;
+    uintptr_t spi2Device;
+} adi_adrvtrx_MiscInfo_t;
+
+/**
+* \brief Data structure to hold devices in an daughter card
+*/
+typedef struct adi_daughterboard_trx
+{
+    /* Common device */
+    adi_common_Device_t common; /*!< Pointer to common device */
+
+    /* Initialization status */
+    uint32_t initializedStatus; /*!< initialization status */
+    uint32_t boardAttribute;    /*!< Board attributes */
+
+    /* Place holder for extra parameters */
+    uint32_t  parameterBucket[12];   /*!< place holder for extra scalar parameters */
+    uintptr_t parameterPointers[12]; /*!< place holder for extra pointer parameters */
+
+    /* Platform and board information */
+    uint32_t               daughterCardId;                        /*!< Board (daughter card) ID */
+    uint8_t                daughterCardRev[4];                    /*!< Board Revision */
+    int8_t                 daughterCardStrId[6];                  /*!< Board ID string i.e. "9010", "9025" */
+    int8_t                 daughterCardName[ADI_BOARD_NAME_SIZE]; /*!< Board name string */
+    uint32_t               motherboardId;                         /*!< The motherboard type i.e ADS8, ADS9 etc. */
+    int8_t                 motherboardName[ADI_BOARD_NAME_SIZE];  /*!< Platform name string */
+    adi_adrvtrx_MiscInfo_t savedInfo;                             /*!< Saving some necessary information */
+
+    /* Device pointers */
+    uintptr_t trxDevice;   /*!< Pointer to transceiver device on board */
+    uintptr_t fpgaDevice;  /*!< Pointer to FPGA device on board */
+    uintptr_t clockDevice; /*!< Pointer to clock device on board */
+
+    adi_trxAbstract_union_t trxAbstractDev;   /*!< Abstract TRX device on board */
+    adi_trxAbstract_union_t fpgaAbstractDev;  /*!< Abstract FPGA device on board */
+    adi_trxAbstract_union_t clockAbstractDev; /*!< Abstract CLOCK device on board */
+
+    uintptr_t motherboardDevice; /*!< Pointer back to the motherboard which contains this daughterboard */
+
+    /* Initialization pointers */
+    uintptr_t daughterCardInit;  /*!< Init data structure configured with the profile data*/
+    uintptr_t postMcsInit;       /*<! Post MCS Init structure */
+    uintptr_t clockInit;         /*<! AD9528 clock device init structure */
+    uintptr_t fpgaInit;          /*<! FPGA Init structure */
+    uintptr_t platformFilesInit; /*<! platform files on sd card(Arm and Stream bins, Rx Gain table, Tx Atten Table) */
+    uintptr_t streamSettings;    /*<! Stream settings structure */
+    uintptr_t pinModeSettings;   /*<! Saved settings from profile for use in pin mode data captures */
+
+    /* function pointers */
+    /* Constructors and destructors */
+    int32_t (*DeviceCreate)(adi_daughterboard_trx_t*);
+
+    int32_t (*DeviceDestroy)(adi_daughterboard_trx_t*);
+
+    /* Board and device initialization functions */
+    int32_t (*DeviceInit)(adi_daughterboard_trx_t*);
+
+    /* int32_t(*FpgaConfigure) (adi_daughterboard_trx_t*, uintptr_t, uintptr_t); */
+    int32_t (*ClockConfigure)(adi_daughterboard_trx_t*,
+                              uintptr_t               ,
+                              uint32_t                ,
+                              uint32_t                ,
+                              uint32_t                ,
+                              uint32_t                );
+
+    /* Programming functions */
+    /*int32_t (*BoardProgram)(adi_daughterboard_trx_t*, uintptr_t, uintptr_t, uintptr_t, uintptr_t); */
+    int32_t (*BoardProgram)(adi_daughterboard_trx_t*);
+
+    int32_t (*BoardJesdBringup)(adi_daughterboard_trx_t*,
+                                uint32_t                ,
+                                uint32_t                );
+
+    int32_t (*BoardProgramPhase1)(adi_daughterboard_trx_t*);
+
+    int32_t (*BoardProgramPhase2)(adi_daughterboard_trx_t*);
+
+    int32_t (*BoardDataInterfaceReset)(adi_daughterboard_trx_t*);
+
+    int32_t (*BoardDispatch)(adi_daughterboard_trx_t*,
+                             adrvtrx_board_action_e  );
+
+    int32_t (*FpgaDispatch)(adi_daughterboard_trx_t*,
+                            adrvtrx_board_action_e  );
+
+    int32_t (*ClockDispatch)(adi_daughterboard_trx_t*,
+                             adrvtrx_board_action_e  );
+} adi_daughterboard_trx_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/adrv9025/include/adi_adrv9025_daughter_board.h

@@ -0,0 +1,274 @@
+/**
+ * \file adi_adrv9025_daughter_board.h
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADI_ADRV9025_DAUGHTER_BOARD_H_
+#define _ADI_ADRV9025_DAUGHTER_BOARD_H_
+
+
+#include "adi_adrv9025_daughter_board_types.h"
+#include "adi_adrv9025_types.h"
+#include "adi_common_macros.h"
+#include "adi_adrv9025_user.h"
+#include "adi_adrv9025_utilities.h"
+#include "adi_fpga9025.h"
+#include "adi_ad9528.h"
+#include "adi_motherboard_trx.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/****************************************************************************
+* Runtime functions
+****************************************************************************
+*/
+/**
+* \brief This function reads the board EEPROM and updates the global genericBoardHandle
+*        if initializing or a new board has been placed on the platform. In both of those
+*        cases it will also call adi_adrv9025Board_Create and adi_adrv9025Board_Init.
+*        If the board has not changed since the previous call nothing will be done.
+*
+* \dep_begin
+* \dep_end
+*
+* \param genericBoardHandle Address of the global genericBoardHandle
+* \param adrv9025BoardSel Address of the global adrv9025BoardSel enum
+*        (currently supported boards are EE01 and CE01)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_adrv9025Board_Discover(adi_board_GenericBoardType_t*** genericBoardHandle,
+                                   adi_board_adrv9025Sel_e*        adrv9025BoardSel);
+
+/**
+* \brief Returns the iqRate for the selected ADRV9025 Framer. If the selected Framer has an M equal to 0,
+*        the function will return 0 for iqRate.
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure containing settings
+* \param adrv9025Init Pointer to the ADRV9025 init structure
+* \param framerSel Select the framer to read
+* \param iqRate_kHz Pointer to uint32_t where the iqRate_kHz will be written
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_adrv9025Board_RxLinkSamplingRateFind(adi_fpga9025_Device_t*   device,
+                                                 adi_adrv9025_Init_t*     adrv9025Init,
+                                                 adi_adrv9025_FramerSel_e framerSel,
+                                                 uint32_t*                iqRate_kHz);
+
+/**
+* \brief Returns the iqRate for the selected ADRV9025 Deframer. If the selected Deframer has an M equal to 0,
+*        the function will return 0 for iqRate.
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure containing settings
+* \param adrv9025Init Pointer to the ADRV9025 init structure
+* \param deframerSel Select the deframer to read
+* \param iqRate_kHz Pointer to uint32_t where the iqRate_kHz will be written
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_adrv9025Board_TxLinkSamplingRateFind(adi_fpga9025_Device_t*     device,
+                                                 adi_adrv9025_Init_t*       adrv9025Init,
+                                                 adi_adrv9025_DeframerSel_e deframerSel,
+                                                 uint32_t*                  iqRate_kHz);
+
+/**
+* \brief Using the ADI daughter card EEPROM BOM REV (3rd custom FMC) field, this function will 
+*        override the profile ldoSelect setting with the correct setting for the EEPROM contents.
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param adrv9025Init Pointer to the ADRV9025 init structure
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_adrv9025Board_LdoSelectOverRide(adi_adrv9025_Init_t* adrv9025Init);
+
+/**
+* \brief Resets the Data Interface with the appropriate procedure based on the daughterboard
+*        type.
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param adrv9025Board adi_board_GenericBoardType_t Pointer to the ADRV9025 daughter card instance
+*                                                   to be programmed
+* \param adrv9025BoardSel is the enum to select the daughter card (EE01 / CE01)
+* \param adrv9025Init Pointer to the ADRV9025 init structure
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_adrv9025Board_DataInterfaceReset(adi_board_GenericBoardType_t* adrv9025Board,
+                                             adi_board_adrv9025Sel_e       adrv9025BoardSel,
+                                             adi_adrv9025_Init_t*          adrv9025Init);
+
+/**
+* \brief Function to configure the AD9528 init structure for the daughtercard based 
+*        on the desired device clock. This function will NOT program the AD9528.
+*
+* \pre This function is called after the devices are Create()
+*      Init() have been called
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+* \param deviceClock_kHz Desired device clock in kHz
+* \param vcxoFreq_kHz Frequency of the AD9528 Vcxo input in kHz
+* \param refAFreq_kHz Frequency of the AD9528 RefA input in kHz
+* \param fpgaClock_kHz Desired fpga clock in kHz
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025_Ad9528Configure(adi_daughterboard_trx_t* trxDaughterboard,
+                                           uint32_t                 deviceClock_kHz,
+                                           uint32_t                 vcxoFreq_kHz,
+                                           uint32_t                 refAFreq_kHz,
+                                           uint32_t                 fpgaClock_kHz);
+
+/**
+* \brief Function to bring up the JESD204 data link for the ADRV9025 eval board.
+*
+* \pre This function is normally called by the adi_board_adrv9025_Program_Phase2 
+*      function and is not required by the end user.  It would be called after
+*      post MCS init.
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+* \param txLinkSel Bitmask representing which RF TX links to enable (Bit0=1: Enable Deframer 0, Bit1=1: Enable Deframer 1)
+* \param rxLinkSel Bitmask representing which RF RX links to enable (Bit0=1: Enable Framer 0, Bit1=1: Enable Framer 1, Bit2=1: Enable Framer 2)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025_JesdBringup(adi_daughterboard_trx_t* trxDaughterboard,
+                                       uint32_t                 txLinkSel,
+                                       uint32_t                 rxLinkSel);
+
+/**
+* \brief Function to bring up the JESD204 TX data link for the ADRV9025CE01 eval board.
+*
+* \pre This function is normally called by the adi_board_adrv9025_JesdBringup 
+*      function and is not required by the end user.  It would be called after
+*      post MCS init.
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+* \param link Bitmask representing which RF TX links to enable (Bit0=1: Enable Deframer 0, Bit1=1: Enable Deframer 1)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025_JesdTxBringup(adi_daughterboard_trx_t* trxDaughterboard,
+                                         uint32_t                 link);
+
+/**
+* \brief Function to bring up the JESD204 RX data link for the ADRV9025CE01 eval board.
+*
+* \pre This function is normally called by the adi_board_adrv9025CE01_JesdBringup 
+*      function and is not required by the end user.  It would be called after
+*      post MCS init.
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+* \param link Bitmask representing which RF RX links to enable (Bit0=1: Enable Framer 0, Bit1=1: Enable Framer 1, Bit2=1: Enable Framer 2)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025CE01_JesdRxBringup(adi_daughterboard_trx_t* trxDaughterboard,
+                                             uint32_t                 link);
+
+/**
+* \brief Function to reset and bring JESD204 links up using parameters from the daughterboard structure
+*
+* \pre This function is called after the devices are Create()
+*      Init() have been called
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025CE01_Jesd204LinkReset(adi_daughterboard_trx_t* trxDaughterboard);
+
+/**
+* \brief Function to initialize the clock device
+*
+* \pre This function is called during the daughtercard initialization.
+*
+* \dep_begin
+* \dep{trxDaughterboard}
+* \dep_end
+*
+* \param trxDaughterboard Pointer to the generic board instance
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025_Ad9528Init(adi_daughterboard_trx_t* trxDaughterboard);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/adrv9025/include/adi_adrv9025_daughter_board_types.h

@@ -0,0 +1,46 @@
+/**
+ * \file adi_adrv9025_daughter_board_types.h
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADI_ADRV9025_DAUGHTER_BOARD_TYPES_H_
+#define _ADI_ADRV9025_DAUGHTER_BOARD_TYPES_H_
+
+#include "adi_adrv9025_types.h"
+#include "adi_ad9528_types.h"
+//#include "adi_fpga9025_types.h"
+#include "adi_adrv9025_utilities_types.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+*  \brief Enum of possible daughter board types
+*/
+typedef enum adi_board_adrv9025Sel
+{
+    ADI_BOARD_ADRV9025_EE01 = 0xEE01,     /*!< Selects a daughter board of type EE01 */
+    ADI_BOARD_ADRV9025_CE01 = 0xCE01,     /*!< Selects a daughter board of type CE01 */
+    ADI_BOARD_ADRV9026_CE01 = 0xCE01,     /*!< Selects a daughter board of type CE01 */
+    ADI_BOARD_ADRV9025_STSHAL01 = 0xFF00, /*!< Selects a daughter board of type stsHal for all non-init actions */
+    ADI_BOARD_ADRV9025_ADS8 = 0xAD58,     /*!< Selects a daughter board of type stsHal for all non-init actions */
+    ADI_BOARD_ADRV9025_NULL = 0,          /*!< Initial value for board selection */
+    ADI_BOARD_ADRV9025_BLANK_EEPROM = 1   /*!< Selects for no daughter board present */
+} adi_board_adrv9025Sel_e;
+
+typedef uintptr_t adi_board_GenericBoardType_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/adrv9025/include/adi_board_adrv9025ADS8.h

@@ -0,0 +1,169 @@
+/**
+ * \file adi_board_adrv9025ADS8.h
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADI_BOARD_ADRV9025ADS8_H_
+#define _ADI_BOARD_ADRV9025ADS8_H_
+
+#include "adi_adrv9025_daughter_board_types.h"
+#include "adi_board_adrv9025ADS8_types.h"
+#include "adi_adrv9025_utilities_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* \brief Function to configure the AD9528 init structure for the CE daughtercard based 
+*        on the desired device clock. This function will NOT program the AD9528.
+*
+* \pre This function is called after the devices are Create()
+*      Init() have been called
+*
+* \dep_begin
+* \dep{ad9528Device, ad9528Init}
+* \dep_end
+*
+* \param ad9528Device Pointer to AD9528 device data structure
+* \param ad9528Init Pointer to AD9528 clock device init structure
+* \param deviceClock_kHz Desired device clock in kHz
+* \param vcxoFreq_kHz Frequency of the AD9528 Vcxo input in kHz
+* \param refAFreq_kHz Frequency of the AD9528 RefA input in kHz
+* \param fpgaClock_kHz Desired fpga clock in kHz
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025ADS8_Ad9528Configure(adi_board_adrv9025Ads8_t* adrv9025ADS8,
+                                               adi_ad9528_Init_t*        ad9528Init,
+                                               uint32_t                  deviceClock_kHz,
+                                               uint32_t                  vcxoFreq_kHz,
+                                               uint32_t                  refAFreq_kHz,
+                                               uint32_t                  fpgaClock_kHz);
+
+/**
+* \brief Function to bring up the JESD204 data link for the adrv9025ADS8 eval board.
+*
+* \pre This function is normally called by the adi_board_adrv9025ADS8_Program_v2 
+*      function and is not required by the end user.  It would be called after
+*      post MCS init.
+*
+* \dep_begin
+* \dep{adrv9025Device, fpga9010Device, ad9528Device}
+* \dep_end
+*
+* \param adrv9025Device Pointer to ADRV9025 device data structure
+* \param fpga9010Device Pointer to FPGA device data structure
+* \param ad9528Device Pointer to AD9528 device data structure
+* \param txLinkSel Bitmask representing which RF TX links to enable (Bit0=1: Enable Deframer 0, Bit1=1: Enable Deframer 1)
+* \param rxLinkSel Bitmask representing which RF RX links to enable (Bit0=1: Enable Framer 0, Bit1=1: Enable Framer 1, Bit2=1: Enable Framer 2)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025ADS8_JesdBringup(adi_adrv9025_Device_t* adrv9025Device,
+                                           adi_fpga9010_Device_t* fpgaDevice,
+                                           adi_ad9528_Device_t*   ad9528Device,
+                                           uint32_t               txLinkSel,
+                                           uint32_t               rxLinkSel);
+
+/**
+* \brief Function to bring up the JESD204 TX data link for the adrv9025ADS8 eval board.
+*
+* \pre This function is normally called by the adi_board_adrv9025ADS8_JesdBringup 
+*      function and is not required by the end user.  It would be called after
+*      post MCS init.
+*
+* \dep_begin
+* \dep{adrv9025Device, fpga9010Device, ad9528Device}
+* \dep_end
+*
+* \param adrv9025Device Pointer to ADRV9025 device data structure
+* \param fpga9010Device Pointer to FPGA device data structure
+* \param ad9528Device Pointer to AD9528 device data structure
+* \param link Bitmask representing which RF TX links to enable (Bit0=1: Enable Deframer 0, Bit1=1: Enable Deframer 1)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025ADS8_JesdTxBringup(adi_adrv9025_Device_t* adrv9025Device,
+                                             adi_fpga9010_Device_t* fpga9010Device,
+                                             adi_ad9528_Device_t*   ad9528Device,
+                                             uint32_t               link);
+
+/**
+* \brief Function to bring up the JESD204 RX data link for the adrv9025ADS8 eval board.
+*
+* \pre This function is normally called by the adi_board_adrv9025ADS8_JesdBringup 
+*      function and is not required by the end user.  It would be called after
+*      post MCS init.
+*
+* \dep_begin
+* \dep{adrv9025Device, fpga9010Device, ad9528Device}
+* \dep_end
+*
+* \param adrv9025Device Pointer to ADRV9025 device data structure
+* \param fpga9010Device Pointer to FPGA device data structure
+* \param ad9528Device Pointer to AD9528 device data structure
+* \param link Bitmask representing which RF RX links to enable (Bit0=1: Enable Framer 0, Bit1=1: Enable Framer 1, Bit2=1: Enable Framer 2)
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025ADS8_JesdRxBringup(adi_adrv9025_Device_t* adrv9025Device,
+                                             adi_fpga9010_Device_t* fpga9010Device,
+                                             adi_ad9528_Device_t*   ad9528Device,
+                                             uint32_t               link);
+
+int32_t adi_board_adrv9025ADS8_Program_Phase1(adi_board_adrv9025Ads8_t*     adrv9025Ce01,
+                                              adi_adrv9025_Init_t*          adrv9025Init,
+                                              adi_ad9528_Init_t*            ad9528Init,
+                                              adi_adrv9025_PlatformFiles_t* adrv9025PlatformFiles);
+
+int32_t adi_board_adrv9025ADS8_Program_Phase2(adi_board_adrv9025Ads8_t*   adrv9025Ce01,
+                                              adi_adrv9025_Init_t*        adrv9025Init,
+                                              adi_adrv9025_PostMcsInit_t* adrv9025PostMcsInit,
+                                              adi_ad9528_Init_t*          ad9528Init);
+
+/**
+* \brief Function to reset and bring JESD204 links up using parameters from the init structure
+*
+* \pre This function is called after the devices are Create()
+*      Init() have been called
+*
+* \dep_begin
+* \dep{adrv9025Device, adrv9025Init}
+* \dep_end
+*
+* \param adrv9025ADS8 Pointer to adrv9025ADS8 daughter card instance to be programmed
+* \param adrv9025Init Pointer to ADRV9025 Init data structure configured with the profile data
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_board_adrv9025ADS8_Jesd204LinkReset(adi_board_adrv9025Ads8_t* adrv9025ADS8,
+                                                adi_adrv9025_Init_t*      adrv9025Init);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/adrv9025/include/adi_board_adrv9025ADS8_types.h

@@ -0,0 +1,41 @@
+/**
+ * \file adi_board_adrv9025CE01_types.h
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADI_BOARD_ADRV9025ADS8_TYPES_H_
+#define _ADI_BOARD_ADRV9025ADS8_TYPES_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "adi_adrv9025_types.h"
+#include "adi_ad9528_types.h"
+#include "adi_fpga9010_types.h"
+
+/**
+* \brief Data structure to hold devices in an adi_board_adrv9025Ads8 daughter card
+*/
+typedef struct adi_board_adrv9025Ads8
+{
+    adi_adrv9025_Device_t* adrv9025Device; /*!< Pointer to ADRV9025 device on CE01 board */
+    adi_fpga9010_Device_t* fpgaDevice;     /*!< Pointer to FPGA device on CE01 board */
+    adi_ad9528_Device_t*   ad9528Device;   /*!< Pointer to AD9528 clock device on CE01 board */
+
+    /* TODO: Update this with final interface */
+    char pcbName[32];
+} adi_board_adrv9025Ads8_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/fpga9010/adi_fpga9010_daughter_board.c

@@ -0,0 +1,97 @@
+/**
+ * \file adi_fpga9010_daughter_board.c
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#include "adi_fpga9010.h"
+#include "adi_motherboard_trx.h"
+#include <stdlib.h>
+#include <string.h>
+
+/****************************************************************************
+* Local functions
+****************************************************************************/
+
+int32_t adi_fpga9010Board_Dispatch(adi_daughterboard_trx_t *trxDaughterboard, adrvtrx_board_action_e actionFlags)
+{
+    int32_t recoveryAction = ADI_COMMON_HAL_OK;
+    uint32_t fpgaVersion = 0;
+    uint8_t enableJesd204C = ADI_FALSE;
+    adi_fpga9010_Device_t *fpga9010Device = NULL;
+    
+    /* FPGA allocation */
+    if (actionFlags == TRX_BOARD_ACTION_DEVICE_ALLOC) 
+    {
+        trxDaughterboard->fpgaDevice = (uintptr_t) calloc(1, sizeof(adi_fpga9010_Device_t));
+        if (trxDaughterboard->fpgaDevice == 0)
+        {
+            return (ADI_COMMON_HAL_GEN_SW);
+        }
+    
+        trxDaughterboard->fpgaAbstractDev.commonAbstractDevice = (adi_common_Device_t *) trxDaughterboard->fpgaDevice;
+        trxDaughterboard->fpgaAbstractDev.fpgaAbstractDevice = trxDaughterboard->fpgaDevice;
+        ((adi_fpga9010_Device_t *) trxDaughterboard->fpgaDevice)->memoryPageSize = MEM_SIZE_256MB;
+                
+        return (ADI_COMMON_HAL_OK);
+    }
+    
+    /* FPGA Initialization */
+    if (actionFlags == TRX_BOARD_ACTION_FPGA_INIT) 
+    {
+        fpga9010Device = (adi_fpga9010_Device_t *)trxDaughterboard->fpgaDevice;
+        enableJesd204C = trxDaughterboard->savedInfo.enable204cState;
+        
+        /* Verify FPGA design Version number is for ADRV9025 & is recent enough for the current API */
+        recoveryAction = adi_fpga9010_VersionRead(fpga9010Device);
+        if (recoveryAction != ADI_COMMON_ACT_NO_ACTION)
+        {
+            return (recoveryAction);
+        }
+        
+        fpgaVersion = (fpga9010Device->devStateInfo.versionMajor << 16) + fpga9010Device->devStateInfo.versionMinor;
+        
+        if (fpgaVersion < ADI_FPGA9010_MIN_VERSION)
+        {
+            ADI_ERROR_REPORT(&fpga9010Device->common, ADI_COMMON_ERRSRC_API, ADI_FPGA9010_ERR_INVALID_FPGA_IMAGE, ADI_COMMON_ACT_ERR_RESET_FULL, NULL, "Incompatible FPGA.");
+            ADI_ERROR_RETURN(fpga9010Device->common.error.newAction);
+        }
+
+        if (fpga9010Device->devStateInfo.designId == ADI_FPGA9010_JESD204B_DEVICEID)
+        {
+            fpga9010Device->devStateInfo.encodingHighValue = 10;
+            fpga9010Device->devStateInfo.encodingLowValue = 8;
+            fpga9010Device->devStateInfo.linkLayerDataWidth = 40;
+            fpga9010Device->devStateInfo.dmaDataWidth = 32;
+
+            if (enableJesd204C != ADI_FALSE)
+            {
+                ADI_ERROR_REPORT(&fpga9010Device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "Cannot use a 204C profile with a 204B FPGA.");
+                ADI_ERROR_RETURN(fpga9010Device->common.error.newAction); 
+            }
+        }
+        else if (fpga9010Device->devStateInfo.designId == ADI_FPGA9010_JESD204C_DEVICEID)
+        {
+            fpga9010Device->devStateInfo.encodingHighValue = 66;
+            fpga9010Device->devStateInfo.encodingLowValue = 64;
+            fpga9010Device->devStateInfo.linkLayerDataWidth = 66;
+            fpga9010Device->devStateInfo.dmaDataWidth = 64;
+
+            if (enableJesd204C == ADI_FALSE)
+            {
+                ADI_ERROR_REPORT(&fpga9010Device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "Cannot use a 204B profile with a 204C FPGA.");
+                ADI_ERROR_RETURN(fpga9010Device->common.error.newAction);
+            }
+        }
+        
+        return (ADI_COMMON_HAL_OK);
+    }  
+    
+    return (ADI_COMMON_HAL_OK);
+}

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/fpga9025/adi_fpga9025_daughter_board.c

@@ -0,0 +1,127 @@
+/**
+ * \file adi_fpga9025_daughter_board.c
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#include "adi_fpga9025.h"
+#include <stdlib.h>
+#include <string.h>
+#include "adi_platform_identify.h"
+#include "adi_motherboard_trx.h"
+
+/****************************************************************************
+* Local functions
+****************************************************************************/
+
+int32_t adi_fpga9025Board_Dispatch(adi_daughterboard_trx_t* trxDaughterboard,
+                                   adrvtrx_board_action_e   actionFlags)
+{
+    int32_t                recoveryAction = ADI_COMMON_HAL_OK;
+    uint32_t               fpgaVersion    = 0;
+    adi_fpga9025_Device_t* fpga9025Device = NULL;
+    uint8_t                enableJesd204C = ADI_FALSE;
+
+    /* FPGA allocation */
+    if (actionFlags == TRX_BOARD_ACTION_DEVICE_ALLOC)
+    {
+        trxDaughterboard->fpgaDevice = (uintptr_t)calloc(1,
+                                                         sizeof(adi_fpga9025_Device_t));
+        if (trxDaughterboard->fpgaDevice == 0)
+        {
+            return (ADI_COMMON_HAL_GEN_SW);
+        }
+
+        /* Assigning Abstract pointers */
+        trxDaughterboard->fpgaAbstractDev.commonAbstractDevice                  = (adi_common_Device_t *)trxDaughterboard->fpgaDevice;
+        trxDaughterboard->fpgaAbstractDev.fpgaAbstractDevice                    = trxDaughterboard->fpgaDevice;
+        ((adi_fpga9025_Device_t *)trxDaughterboard->fpgaDevice)->memoryPageSize = MEM_SIZE_1GB;
+
+        return (ADI_COMMON_HAL_OK);
+    }
+
+    /* FPGA Initialization */
+    if (actionFlags == TRX_BOARD_ACTION_FPGA_INIT)
+    {
+        fpga9025Device = (adi_fpga9025_Device_t *)trxDaughterboard->fpgaDevice;
+        enableJesd204C = trxDaughterboard->savedInfo.enable204cState;
+
+        /* Verify FPGA design Version number is for ADRV9025 & is recent enough for the current API */
+        recoveryAction = adi_fpga9025_VersionRead(fpga9025Device);
+        if (recoveryAction != ADI_COMMON_ACT_NO_ACTION)
+        {
+            return (recoveryAction);
+        }
+
+        /* Init FPGA */
+        fpgaVersion = (fpga9025Device->devStateInfo.versionMajor << 16) + fpga9025Device->devStateInfo.versionMinor;
+
+        if (fpgaVersion < ADI_FPGA9025_MIN_VERSION)
+        {
+            ADI_ERROR_REPORT(&fpga9025Device->common,
+                             ADI_COMMON_ERRSRC_API,
+                             ADI_FPGA9025_ERR_INVALID_FPGA_IMAGE,
+                             ADI_COMMON_ACT_ERR_RESET_FULL,
+                             NULL,
+                             "Incompatible FPGA.");
+            ADI_ERROR_RETURN(fpga9025Device->common.error.newAction);
+        }
+
+        if (fpga9025Device->devStateInfo.designId == ADI_FPGA9025_JESD204B_DEVICEID)
+        {
+            fpga9025Device->devStateInfo.encodingHighValue  = 10;
+            fpga9025Device->devStateInfo.encodingLowValue   = 8;
+            fpga9025Device->devStateInfo.linkLayerDataWidth = 40;
+            fpga9025Device->devStateInfo.dmaDataWidth       = 32;
+
+            if (enableJesd204C != ADI_FALSE)
+            {
+                ADI_ERROR_REPORT(&fpga9025Device->common,
+                                 ADI_COMMON_ERRSRC_API,
+                                 ADI_COMMON_ERR_INV_PARAM,
+                                 ADI_COMMON_ACT_ERR_CHECK_PARAM,
+                                 NULL,
+                                 "Cannot use a 204C profile with a 204B FPGA.");
+                ADI_ERROR_RETURN(fpga9025Device->common.error.newAction);
+            }
+        }
+        else if (fpga9025Device->devStateInfo.designId == ADI_FPGA9025_JESD204C_DEVICEID)
+        {
+            fpga9025Device->devStateInfo.encodingHighValue  = 66;
+            fpga9025Device->devStateInfo.encodingLowValue   = 64;
+            fpga9025Device->devStateInfo.linkLayerDataWidth = 66;
+            fpga9025Device->devStateInfo.dmaDataWidth       = 64;
+
+            if (enableJesd204C == ADI_FALSE)
+            {
+                ADI_ERROR_REPORT(&fpga9025Device->common,
+                                 ADI_COMMON_ERRSRC_API,
+                                 ADI_COMMON_ERR_INV_PARAM,
+                                 ADI_COMMON_ACT_ERR_CHECK_PARAM,
+                                 NULL,
+                                 "Cannot use a 204B profile with a 204C FPGA.");
+                ADI_ERROR_RETURN(fpga9025Device->common.error.newAction);
+            }
+        }
+        else
+        {
+            ADI_ERROR_REPORT(&fpga9025Device->common,
+                             ADI_COMMON_ERRSRC_API,
+                             ADI_FPGA9025_ERR_INVALID_FPGA_IMAGE,
+                             ADI_COMMON_ACT_ERR_RESET_FULL,
+                             NULL,
+                             "Invalid FPGA image.");
+            ADI_ERROR_RETURN(fpga9025Device->common.error.newAction);
+        }
+
+        return (ADI_COMMON_HAL_OK);
+    }
+
+    return (ADI_COMMON_HAL_OK);
+}

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/makefile

@@ -0,0 +1,30 @@
+LIBADI_DAUGHTERBOARD = libadi_daughterboard.a
+CC = gcc
+ADI_ADRV9025_DAUGHTERBOARD_SRC = ./adrv9025/src
+ADI_AD9528_DAUGHTERBOARD_SRC = ./ad9528/src
+ADI_FPGA9025_DAUGHTERBOARD_SRC = ./fpga9025
+ADI_FPGA9010_DAUGHTERBOARD_SRC = ./fpga9010
+
+ARFLAGS = -rv
+CFLAGS = -Wall -Werror -I ./adrv9025/include -I ../motherboards -I ../daughterboards -I ../../devices/adrv9025/public/include/ -I ../../devices/fpga9010/public/include/ -I ../../devices/fpga9025/public/include/ -I ../../devices/ad9528/public/include/ -I ../../platforms/ -I ../../platforms/platform_utils -I ../../common/  -I ../../common/adi_error -I ../../common/adi_logging -I../../common/adi_hal 
+EXT = c
+
+SRC = $(wildcard *.$(EXT)) \
+        $(wildcard $(ADI_ADRV9025_DAUGHTERBOARD_SRC)/*.$(EXT) \
+        $(ADI_AD9528_DAUGHTERBOARD_SRC)/*.$(EXT) \
+        $(ADI_FPGA9025_DAUGHTERBOARD_SRC)/*.$(EXT) \
+        $(ADI_FPGA9010_DAUGHTERBOARD_SRC)/*.$(EXT))
+
+OBJS = $(SRC:.$(EXT)=.o)
+
+all: $(SRC) $(LIBADI_DAUGHTERBOARD)
+
+.$(EXT).o:
+	$(CC) $(CFLAGS) -DADRV9025 -o $@ -c $<
+
+$(LIBADI_DAUGHTERBOARD): $(OBJS)
+	ar $(ARFLAGS) $(LIBADI_DAUGHTERBOARD) $(OBJS)
+
+clean:
+	rm -rf *.o
+	rm -rf *.a

driver/rfic/rf/adrv9025/c_src/boards/daughterboards/share_boards/adi_board_STSHAL01_types.h

@@ -0,0 +1,44 @@
+/**
+ * \file adi_board_STSHAL01_types.h
+ *
+ * API Version: $ADI_API_VERSION$
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADI_BOARD_STSHAL01_TYPES_H_
+#define _ADI_BOARD_STSHAL01_TYPES_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+    
+/**
+*  \brief Enum of possible Control Modes for STSHAL board type
+* STS_PREMCS_INIT = 1000;
+* STS_POSTMCS_INIT = 2000;
+* STS_POSTMCS_INIT_InitCals = 2100;
+* STS_SYSREF_REQUEST = 3000;
+* STS_MULTICHIPSYNC = 4000;
+* STS_LINK_BRINGUP = 5000;
+*/
+typedef enum adi_board_stshal_modeSelect
+{
+    ADI_BOARD_STSHAL01_PREMCS_INIT = 1000,  /*!< Selects a STSHAL PreMcsInit Function */
+    ADI_BOARD_STSHAL01_POSTMCS_INIT = 2000, /*!< Selects a STSHAL PostMcsInit Function */
+    ADI_BOARD_STSHAL01_POSTMCS_INIT_INITCALS = 2100, /*!< Selects a STSHAL PostMcsInit InitCals Function No Actions Taken */
+    ADI_BOARD_STSHAL01_SYSREF_REQUEST = 3000, /*!< Selects a STSHAL SysRef Request Function */
+    ADI_BOARD_STSHAL01_MCS_INIT = 4000,      /*!< Selects a STSHAL MCS Init Function No Actions Taken*/
+    ADI_BOARD_STSHAL01_JESDBRINGUP = 5000   /*!< Selects a STSHAL JESD BRINGUP of type ATE tester */
+} adi_board_stshal_modeSelect_e;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/makefile

@@ -0,0 +1,64 @@
+LIB_ADI_BOARDS = libadi_boards.a
+
+ADI_MOTHERBOARD_SRC = ./daughterboards
+ADI_DAUGHTERBOARD_SRC = ./motherboards
+ADI_PLATFORM_SRC = ../platforms
+ADI_COMMON_SRC = ../common
+ADI_COMMON_ERROR_SRC = ../common/adi_error
+ADI_COMMON_LOGGING_SRC = ../common/adi_logging
+ADI_COMMON_HAL_SRC = ../common/adi_hal
+ADI_FPGA9025_SRC = ../devices/fpga9025
+ADI_FPGA9010_SRC = ../devices/fpga9010
+ADI_AD9528_SRC = ../devices/ad9528
+ADI_ADRV9025_SRC = ../devices/adrv9025
+
+ARFLAGS = -rv
+
+all: 	adi_platform_lib \
+	adi_common_lib \
+	adi_fpga9025_lib \
+	adi_fpga9010_lib \
+	adi_ad9528_lib \
+	adi_adrv9025_lib \
+	motherboard_lib \
+	daughterboard_lib \
+	$(LIB_ADI_BOARDS)
+
+$(LIB_ADI_BOARDS): $(OBJS)
+	ar $(ARFLAGS) $(LIB_ADI_BOARDS)
+
+motherboard_lib:
+	$(MAKE) -C $(ADI_MOTHERBOARD_SRC)
+
+daughterboard_lib:
+	$(MAKE) -C $(ADI_DAUGHTERBOARD_SRC)
+
+adi_platform_lib:
+	$(MAKE) -C $(ADI_PLATFORM_SRC)
+
+adi_common_lib:
+	$(MAKE) -C $(ADI_COMMON_SRC)
+
+adi_fpga9025_lib:
+	$(MAKE) -C $(ADI_FPGA9025_SRC)
+ 
+adi_fpga9010_lib:
+	$(MAKE) -C $(ADI_FPGA9010_SRC)
+ 
+adi_ad9528_lib:
+	$(MAKE) -C $(ADI_AD9528_SRC)
+
+adi_adrv9025_lib:
+	$(MAKE) -C $(ADI_ADRV9025_SRC)
+ 
+clean:
+	rm -rf *.o
+	rm -rf *.a
+	$(MAKE) -C $(ADI_MOTHERBOARD_SRC) clean
+	$(MAKE) -C $(ADI_DAUGHTERBOARD_SRC) clean
+	$(MAKE) -C $(ADI_PLATFORM_SRC) clean
+	$(MAKE) -C $(ADI_COMMON_SRC) clean
+	$(MAKE) -C $(ADI_FPGA9025_SRC) clean
+	$(MAKE) -C $(ADI_FPGA9010_SRC) clean
+	$(MAKE) -C $(ADI_AD9528_SRC) clean
+	$(MAKE) -C $(ADI_ADRV9025_SRC) clean

driver/rfic/rf/adrv9025/c_src/boards/motherboards/adi_motherboard_trx.c

@@ -0,0 +1,768 @@
+/**
+ * \file adi_board_trx.c
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#include "adi_platform.h"
+#include "adi_fmc_eeprom.h"
+#include "adi_fmc_fru.h"
+#include "adi_platform_identify.h"
+
+#include "adi_motherboard_trx.h"
+#include "adi_daughterboard_trx_dev.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#ifdef _ADI_STS_PLATFORM
+#define strncasecmp(_x,_y,_z) _strnicmp((_x),(_y),(_z))
+#endif
+
+/**
+ * Platform and board discovery functions
+ * This functions are called while in board discovery in order to assignate the correct HAL layer and FPGA drivers
+ */
+
+/****************************************************************************
+* Local functions
+****************************************************************************/
+
+static int32_t adi_motherboard_Compare(adi_motherboard_trx_t* trxMotherboard1,
+                                       adi_motherboard_trx_t* trxMotherboard2)
+{
+    int32_t i = 0;
+
+    if ((trxMotherboard1 == NULL) || (trxMotherboard2 == NULL))
+    {
+        return ADI_FALSE;
+    }
+
+    for (i = 0; i < ADI_MAX_DAUGHTERBOARDS; i++)
+    {
+        if ((trxMotherboard1->daughterboards[i] != NULL) && (trxMotherboard2->daughterboards[i] != NULL))
+        {
+            if (trxMotherboard1->daughterboards[i]->daughterCardId != trxMotherboard2->daughterboards[i]->daughterCardId)
+            {
+                return ADI_FALSE;
+            }
+        }
+        else if ((trxMotherboard1->daughterboards[i] == NULL) && (trxMotherboard2->daughterboards[i] == NULL))
+        {
+            continue;
+        }
+        else
+        {
+            return ADI_FALSE;
+        }
+    }
+
+    return ADI_TRUE;
+}
+
+/*
+ * This function is to read the EEPROM of the daughter card to learn its identity (i.e. 9010 or 9025 etc.) and fill up the FRU structure.
+ */
+static FRU_DATA_t* trx_BoardReadFru(void* devHalCfg)
+{
+    struct FRU_DATA* fru            = NULL;
+    adi_hal_Cfg_t*   halCfg         = NULL;
+    uint8_t*         raw_input_data = NULL;
+
+    if (devHalCfg == NULL)
+    {
+        return (0);
+    }
+
+    /* Cast void *devHalCfg structure to the specific structure for ADS9 platform */
+    halCfg = (adi_hal_Cfg_t *)devHalCfg;
+
+    if (halCfg->i2cCfg.drvName[0] == '\0')
+    {
+        return 0;
+    }
+
+    /* trx_read_file will allocate a chunk of memory to hold the FRU information */
+    if ((raw_input_data = read_file(halCfg->i2cCfg.drvName)) != NULL)
+    {
+        fru = parse_FRU(raw_input_data);
+        /* free memory allocated by trx_read_file() */
+        free(raw_input_data);
+
+        /* The parse_FRU() will return a null pointer for fru if an error occurred during reading the EEPROM, so verify a non-NULL pointer */
+        if (fru == NULL)
+        {
+            return 0;
+        }
+
+        return fru;
+    } /* if EEPROM file was readable, will still read even if daughter is not plugged on. */
+    else
+    {
+        printf_err("ERROR: Board daughter card EEPROM not found or blank.\n");
+        return (NULL);
+    }
+
+    return (0);
+}
+
+/*
+ * Read the FRU data, parse the FRU data to identify the daughter card.
+ */
+static int32_t trx_BoardIdentify(adi_daughterboard_trx_t* trxdaughterboard)
+{
+    int32_t     halError                         = (int32_t)ADI_HAL_OK;
+    char        productName[ADI_BOARD_NAME_SIZE] = {0};
+    char*       strPtr                           = NULL;
+    int         i                                = 0;
+    FRU_DATA_t* fru                              = NULL;
+
+    if (trxdaughterboard == NULL)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        return (ADI_HAL_NULL_PTR);
+    }
+
+#ifdef _ADI_STS_PLATFORM
+    // 9025 is the default daughter board? add daughtercard name?
+    trxdaughterboard->daughterCardId = ADI_BOARD_9025STSHAL;
+    strncpy((char *) trxdaughterboard->daughterCardName, "Product Name:9025STSHAL; ; ; ; ; ", ADI_BOARD_NAME_SIZE);
+#else
+
+    /* Read the FRU information from EEPROM */
+    fru = trx_BoardReadFru(trxdaughterboard->common.devHalInfo);
+    if (fru == NULL)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        return (ADI_HAL_NULL_PTR);
+    }
+
+    /* Copy board name from FRU */
+    if (!strncasecmp((const char *)&fru->Board_Area->manufacturer[1],
+                     ADI_MANUFACTURER,
+                     strlen(ADI_MANUFACTURER)))
+    {
+        for (i = 0; i < CUSTOM_FIELDS; i++)
+        {
+            /* These are ADI custom fields */
+            if (fru->Board_Area->custom[i] && (fru->Board_Area->custom[i][0] & 0x3F))
+            {
+                switch (fru->Board_Area->custom[i][1])
+                {
+                case 1:
+                    snprintf(productName,
+                             ADI_BOARD_NAME_SIZE,
+                             "%s",
+                             (fru->Board_Area->custom[i] + 2));
+                    break;
+
+                    //                case 2:
+                    //                    sprintf(tmp_str, "%s", fru->Board_Area->custom[i]);
+                    //                    strncat(bomStr, ";BOM REV:", (infoStrSize - 1));
+                    //                    strncat(infoStr, &tmp_str1[2], (infoStrSize - 1));
+                    //                    break;
+
+                default:
+                    break;
+                }
+            }
+        }
+    }
+
+    /* Save the product name string */
+    if ((strPtr = strstr(productName,
+                         "9010CE01")) != NULL)
+    {
+        trxdaughterboard->daughterCardId     = ADI_BOARD_9010CE01;
+        trxdaughterboard->daughterCardRev[0] = *(strPtr + 8);
+        sprintf((char *)trxdaughterboard->daughterCardName,
+                "Product Name:9010CE01%c; : ; : ; : ; : ; ",
+                trxdaughterboard->daughterCardRev[0]);
+        strncpy((char *)trxdaughterboard->daughterCardStrId,
+                "9010",
+                6);
+    }
+    else if ((strPtr = strstr(productName,
+                              "9010EE01")) != NULL)
+    {
+        trxdaughterboard->boardAttribute |= TRX_DAUGHTERBOARD_ATTRIBUTE_TYPE_EE;
+        trxdaughterboard->daughterCardId     = ADI_BOARD_9010EE01;
+        trxdaughterboard->daughterCardRev[0] = *(strPtr + 8);
+        sprintf((char *)trxdaughterboard->daughterCardName,
+                "Product Name:9010EE01%c; : ; : ; : ; : ; ",
+                trxdaughterboard->daughterCardRev[0]);
+        strncpy((char *)trxdaughterboard->daughterCardStrId,
+                "9010",
+                6);
+    }
+    else if ((strPtr = strstr(productName,
+                              "9025CE01")) != NULL)
+    {
+        trxdaughterboard->daughterCardId     = ADI_BOARD_9025CE01;
+        trxdaughterboard->daughterCardRev[0] = *(strPtr + 8);
+        sprintf((char *)trxdaughterboard->daughterCardName,
+                "Product Name:9025CE01%c; : ; : ; : ; : ; ",
+                trxdaughterboard->daughterCardRev[0]);
+        strncpy((char *)trxdaughterboard->daughterCardStrId,
+                "9025",
+                6);
+    }
+    else if ((strPtr = strstr(productName,
+             "9025EE01")) != NULL)
+    {
+        trxdaughterboard->boardAttribute |= TRX_DAUGHTERBOARD_ATTRIBUTE_TYPE_EE;
+        trxdaughterboard->daughterCardId = ADI_BOARD_9025EE01;
+        trxdaughterboard->daughterCardRev[0] = *(strPtr + 8);
+        sprintf((char *)trxdaughterboard->daughterCardName,
+                "Product Name:9025EE01%c; : ; : ; : ; : ; ",
+                trxdaughterboard->daughterCardRev[0]);
+        strncpy((char *)trxdaughterboard->daughterCardStrId,
+                "9025",
+                6);
+    }
+    else if ((strPtr = strstr(productName,
+             "9026CE01")) != NULL)
+    {
+        trxdaughterboard->daughterCardId = ADI_BOARD_9026CE01;
+        trxdaughterboard->daughterCardRev[0] = *(strPtr + 8);
+        sprintf((char *)trxdaughterboard->daughterCardName,
+                "Product Name:9026CE01%c; : ; : ; : ; : ; ",
+                trxdaughterboard->daughterCardRev[0]);
+        strncpy((char *)trxdaughterboard->daughterCardStrId,
+                "9026",
+                6);
+    }    
+    else if ((strPtr = strstr(productName,
+              "9024CE01")) != NULL)
+    {
+        trxdaughterboard->daughterCardId = ADI_BOARD_9024CE01;
+        trxdaughterboard->daughterCardRev[0] = *(strPtr + 8);
+        sprintf((char *)trxdaughterboard->daughterCardName,
+                "Product Name:9024CE01%c; : ; : ; : ; : ; ",
+                trxdaughterboard->daughterCardRev[0]);
+        strncpy((char *)trxdaughterboard->daughterCardStrId,
+                "9024",
+                6);
+    }
+    else if ((strPtr = strstr(productName,
+                              "9029CE01")) != NULL)
+    {
+        trxdaughterboard->daughterCardId = ADI_BOARD_9029CE01;
+        trxdaughterboard->daughterCardRev[0] = *(strPtr + 8);
+        sprintf((char *)trxdaughterboard->daughterCardName,
+                "Product Name:9029CE01%c; : ; : ; : ; : ; ",
+                trxdaughterboard->daughterCardRev[0]);
+        strncpy((char *)trxdaughterboard->daughterCardStrId,
+                "9029",
+                6);
+    }
+    else if ((strPtr = strstr(productName,
+                              "9020CE01")) != NULL)
+    {
+        trxdaughterboard->daughterCardId = ADI_BOARD_9020CE01;
+        trxdaughterboard->daughterCardRev[0] = *(strPtr + 8);
+        sprintf((char *)trxdaughterboard->daughterCardName,
+                "Product Name:9020CE01%c; : ; : ; : ; : ; ",
+                trxdaughterboard->daughterCardRev[0]);
+        strncpy((char *)trxdaughterboard->daughterCardStrId,
+                "9020",
+                6);
+    }
+    else
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        trxdaughterboard->daughterCardId = ADI_BOARD_UNKNOWN;
+        strncpy((char *)trxdaughterboard->daughterCardName,
+                "Product Name:UNKNOWN; : ; : ; : ; : ; ",
+                ADI_BOARD_NAME_SIZE);
+        halError = ADI_HAL_I2C_FAIL;
+    }
+
+    free(fru);
+#endif
+    return (halError);
+}
+
+/**
+* \brief This function is a helper function to fill out the members of the 
+*         devHalCfg structure with driver names for common platform.
+*
+* This function allows keeping the platform specific knowledge of driver names
+* in this layer of code.  Higher layers of code can call this to fill out the
+* devHalCfg structure correctly for the common platform.
+*
+* Each device gets a unique instance of the devHalCfg structure describing the
+* device resources for that device, such as the SPI chip select, etc.
+*
+* \param interfaceMask A mask that represents which platform interfaces are required by a particular device (SPI, Logging, etc)
+* \param spiChipSelect The chip select index describing the particular device 
+* \param logFilename The filename of the logfile for this device.
+*/
+void* hal_DevHalCfgCreate(uint32_t    interfaceMask,
+                          uint8_t     spiChipSelect,
+                          const char* logFilename)
+{
+    adi_hal_Cfg_t* halCfg = (adi_hal_Cfg_t*)calloc(1,
+                                                   sizeof(adi_hal_Cfg_t));
+
+    if (halCfg == NULL)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        return NULL;
+    }
+
+    /* Disable all interfaces, and enable only if they are needed by the specific device */
+    halCfg->spiCfg.interfaceEnabled  = 0;
+    halCfg->logCfg.interfaceEnabled  = 0;
+    halCfg->bbicCfg.interfaceEnabled = 0;
+
+    /* If device requires SPI interface */
+    if ((interfaceMask & (uint32_t)ADI_HAL_INTERFACE_SPI) > 0)
+    {
+        halCfg->spiCfg.interfaceEnabled = 1;
+        halCfg->spiCfg.chipSelectIndex  = spiChipSelect;
+
+        switch (spiChipSelect)
+        {
+        case SPI_CHIP_SELECT_0:
+        {
+            strncpy(halCfg->spiCfg.spidevName,
+                    SPI_CHIP_DEV_PATH_0,
+                    ADI_HAL_STRING_LENGTH);
+            break;
+        }
+        case SPI_CHIP_SELECT_1:
+        {
+            strncpy(halCfg->spiCfg.spidevName,
+                    SPI_CHIP_DEV_PATH_1,
+                    ADI_HAL_STRING_LENGTH);
+            break;
+        }
+        case SPI_CHIP_SELECT_2:
+        {
+            strncpy(halCfg->spiCfg.spidevName,
+                    SPI_CHIP_DEV_PATH_2,
+                    ADI_HAL_STRING_LENGTH);
+            break;
+        }
+        default:
+        {
+            free(halCfg);
+            return NULL;
+        }
+        }
+
+        /* Default SPI settings */
+        halCfg->spiCfg.autoIncAddrUp    = 1;
+        halCfg->spiCfg.CPHA             = 0;
+        halCfg->spiCfg.CPOL             = 0;
+        halCfg->spiCfg.enSpiStreaming   = 0;
+        halCfg->spiCfg.fourWireMode     = 1;
+        halCfg->spiCfg.spiActionDisable = 0;
+        halCfg->spiCfg.spiClkFreq_Hz    = 25000000;
+    }
+
+    /* If device requires Logging interface */
+    if ((interfaceMask & (uint32_t)ADI_HAL_INTERFACE_LOG) > 0)
+    {
+        halCfg->logCfg.interfaceEnabled = 1;
+        halCfg->logCfg.logLevel         = ADI_HAL_LOG_ALL;
+        strncpy(halCfg->logCfg.logFileName,
+                logFilename,
+                ADI_HAL_STRING_LENGTH);
+        /* ensure null termination */
+        halCfg->logCfg.logFileName[sizeof(halCfg->logCfg.logFileName) - 1] = '\0';
+    }
+
+    /* If device requires FPGA register interface */
+    if (((interfaceMask & (uint32_t)ADI_HAL_INTERFACE_BBICCTRL) > 0) ||
+        ((interfaceMask & (uint32_t)ADI_HAL_INTERFACE_HWRESET) > 0)) /* ADS9 HWRESET interface requires BBICCTRL interface */
+    {
+        halCfg->bbicCfg.interfaceEnabled = 1;
+        strncpy(halCfg->bbicCfg.coreRegsCfg.drvName,
+                BBIC_CORE_REG_PATH,
+                ADI_HAL_STRING_LENGTH);
+        halCfg->bbicCfg.coreRegsCfg.mapSize = MEM_SIZE_512MB; /* 512MB */
+        strncpy(halCfg->bbicCfg.ramCfg.drvName,
+                BBIC_RAM_PATH,
+                ADI_HAL_STRING_LENGTH);
+        halCfg->bbicCfg.ramCfg.mapSize = MEM_SIZE_1GB; /* 1GB */
+        strncpy(halCfg->bbicCfg.spiAdvRegsCfg.drvName,
+                BBIC_SPI_ADV_REG_PATH,
+                ADI_HAL_STRING_LENGTH);
+        halCfg->bbicCfg.spiAdvRegsCfg.mapSize = MEM_SIZE_16M; /* 16MB */
+    }
+
+    if ((interfaceMask & (uint32_t)ADI_HAL_INTERFACE_HWRESET) > 0)
+    {
+        halCfg->hwResetCfg.interfaceEnabled = 1;
+
+        switch (spiChipSelect)
+        {
+        case SPI_CHIP_SELECT_0:
+        {
+            halCfg->hwResetCfg.resetPinIndex = 1; /* ADRV9025 reset pin bit position in FPGA register */
+            break;
+        }
+        case SPI_CHIP_SELECT_1:
+        {
+            halCfg->hwResetCfg.resetPinIndex = 2; /* AD9528 reset pin bit position in FPGA register */
+            break;
+        }
+
+        default:
+            printf("ERROR: %s:%u has failed.\n",
+                   __func__,
+                   __LINE__);
+            free(halCfg);
+            return NULL;
+        }
+    }
+
+    if ((interfaceMask & (uint32_t)ADI_HAL_INTERFACE_I2C) > 0)
+    {
+        halCfg->i2cCfg.interfaceEnabled = 1;
+        strncpy(halCfg->i2cCfg.drvName,
+                I2C_EEPROM_PATH,
+                ADI_HAL_STRING_LENGTH);
+    }
+
+    if ((interfaceMask & (uint32_t)ADI_HAL_INTERFACE_TIMER) > 0)
+    {
+        halCfg->timerCfg.interfaceEnabled = 1;
+    }
+
+    return halCfg;
+}
+
+int32_t adi_daughterboard_Discover(adi_motherboard_trx_t* trxMotherboard)
+{
+    int32_t error = ADI_COMMON_HAL_OK;
+
+    /* Daughterboard Level */
+
+    if (trxMotherboard == NULL)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+
+    /* create hal layer for this daughterboard */
+    trxMotherboard->daughterboards[0]->common.devHalInfo = hal_DevHalCfgCreate((ADI_HAL_INTERFACE_I2C |ADI_HAL_INTERFACE_LOG | ADI_HAL_INTERFACE_TIMER), SPI_CHIP_SELECT_0, "daughterBoard.txt"); 
+    if (trxMotherboard->daughterboards[0]->common.devHalInfo == NULL)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+
+    trxMotherboard->daughterboards[0]->motherboardId = trxMotherboard->motherboardId;
+
+    /* Identify the daughterboard */
+    error = trx_BoardIdentify(trxMotherboard->daughterboards[0]);
+    if (error != ADI_HAL_OK)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        return (ADI_COMMON_HAL_GEN_SW);
+    }
+
+    /* Initializing structure operation pointers */
+    trxMotherboard->daughterboards[0]->DeviceCreate  = adi_daughterboard_Create;  /* Create devices for daughter card, clock, and fpga */
+    trxMotherboard->daughterboards[0]->DeviceInit    = adi_daughterboard_Init;    /* Initialize the HAL layer and bring up devices */
+    trxMotherboard->daughterboards[0]->DeviceDestroy = adi_daughterboard_Destroy; /* Bring down, Close devices and free memory */
+    trxMotherboard->daughterboards[0]->BoardProgram  = adi_daughterboard_Program;
+    /* Start programming multiple devices on daughtercard and motherboard */
+    trxMotherboard->daughterboards[0]->ClockConfigure     = adi_daughterboard_ClockConfig; /* Configuring and initialize the clock device */
+    trxMotherboard->daughterboards[0]->BoardJesdBringup   = NULL;                          /* Configuring and initialize the FPGA device */
+    trxMotherboard->daughterboards[0]->BoardProgramPhase1 = adi_daughterboard_ProgramPhase1;
+    /* Programming phase 1 for multiple devices on daughtercard and motherboard */
+    trxMotherboard->daughterboards[0]->BoardProgramPhase2 = adi_daughterboard_ProgramPhase2;
+    /* Programming phase 2 for multiple devices on daughtercard and motherboard */
+    trxMotherboard->daughterboards[0]->BoardDataInterfaceReset = adi_daughterboard_DataInterfaceReset; /* Resetting the data interface  */
+
+    /* Saving motherboard pointer */
+    trxMotherboard->daughterboards[0]->motherboardDevice = (uintptr_t) trxMotherboard;
+
+    /* Create log file for daughterboard */
+    if (adi_hal_HwOpen(trxMotherboard->daughterboards[0]->common.devHalInfo) != ADI_HAL_OK)
+    {
+        printf("Warning: %s:%u file open has failed.\n", __func__, __LINE__);
+    }
+    trxMotherboard->daughterboards[0]->common.error.logEnable = 1;
+
+    /* Create board and platform */
+    error = trxMotherboard->daughterboards[0]->DeviceCreate(trxMotherboard->daughterboards[0]);
+    if (error != ADI_COMMON_HAL_OK)
+    {
+        printf("ERROR: BoardCreate has failed.\n");
+        return (error);
+    }
+
+    /* Initializing board and platforms */
+    error = trxMotherboard->daughterboards[0]->DeviceInit(trxMotherboard->daughterboards[0]);
+    if (error != ADI_COMMON_HAL_OK)
+    {
+        printf("ERROR: BoardInit has failed.\n");
+        return (error);
+    }
+
+    return (ADI_HAL_OK);
+}
+
+adi_motherboard_trx_t* adi_platform_Discover(void)
+{
+    int32_t error = ADI_COMMON_HAL_OK;
+    /* Board Level */
+
+    /* Generic board dummy */
+    adi_motherboard_trx_t* trxMotherboard = (adi_motherboard_trx_t*)calloc(1,
+                                                                           sizeof(adi_motherboard_trx_t));
+
+    if (trxMotherboard == NULL)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        return (NULL);
+    }
+    trxMotherboard->initializedStatus = 0;
+
+    /* Allocate daughterboard structure */
+    trxMotherboard->daughterboards[0] = (adi_daughterboard_trx_t*)calloc(1,
+                                                                         sizeof(adi_daughterboard_trx_t));
+
+    if (trxMotherboard->daughterboards[0] == NULL)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        free(trxMotherboard);
+        return (NULL);
+    }
+
+    /* create hal layer for this motherboard */
+    trxMotherboard->common.devHalInfo = hal_DevHalCfgCreate((ADI_HAL_INTERFACE_LOG | ADI_HAL_INTERFACE_TIMER), SPI_CHIP_SELECT_0, "platformLog.txt"); 
+    if (trxMotherboard->common.devHalInfo == NULL)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        free(trxMotherboard->daughterboards[0]);
+        free(trxMotherboard);
+        return (NULL);
+    }
+
+    trxMotherboard->initializedStatus |= ADI_DEV_CFG_CREATED;
+
+    /* Identify the platform (motherboard) */
+    error = adi_platform_Identify(&trxMotherboard->motherboardId);
+    if (error != ADI_HAL_OK)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        free(trxMotherboard->common.devHalInfo);
+        free(trxMotherboard->daughterboards[0]);
+        free(trxMotherboard);
+        return (NULL);
+    }
+
+    /* Copy motherboard name */
+    if (trxMotherboard->motherboardId == ADI_ADS9_PLATFORM)
+    {
+        strcpy((char *)trxMotherboard->motherboardName,
+               SYM2STR(ADI_ADS9_PLATFORM));
+    }
+    else if (trxMotherboard->motherboardId == ADI_ADS8_PLATFORM)
+    {
+        strcpy((char *)trxMotherboard->motherboardName,
+               SYM2STR(ADI_ADS8_PLATFORM));
+    }
+        
+    else
+    {
+        strcpy((char *)trxMotherboard->motherboardName,
+               SYM2STR(ADI_UNKNOWN_PLATFORM));
+    }
+
+    /* Motherboard is now known, set up the platform */
+
+    
+    error = adi_hal_PlatformSetup(trxMotherboard->common.devHalInfo,
+                                  (adi_hal_Platforms_e)trxMotherboard->motherboardId);
+    if (error != ADI_HAL_OK)
+    {
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        free(trxMotherboard->common.devHalInfo);
+        free(trxMotherboard->daughterboards[0]);
+        free(trxMotherboard);
+        return (NULL);
+    }
+    trxMotherboard->initializedStatus |= ADI_PLATFORM_CREATED;
+    
+
+    /*Creating log file for the platform*/
+    if (adi_hal_HwOpen(trxMotherboard->common.devHalInfo) != ADI_HAL_OK)
+    {
+        printf("Warning: %s:%u file open has failed.\n", __func__, __LINE__);
+    }
+
+    trxMotherboard->common.error.logEnable = 1;
+
+    return trxMotherboard;
+}
+
+int32_t adi_motherboard_SaveInfo(adi_motherboard_trx_t* trxMotherboard,
+                                 uintptr_t              saveData,
+                                 adrvtrx_data_save_t    saveType)
+{
+    int32_t error = ADI_COMMON_HAL_OK;
+
+    if ((trxMotherboard == NULL) || (trxMotherboard->daughterboards[0] == NULL))
+    {
+        printf("ERROR: Motherboard pointer is NULL. %s:%u\n",
+               __func__,
+               __LINE__);
+        return (ADI_HAL_GEN_SW);
+    }
+
+    /* Save the data in the structure */
+    switch (saveType)
+    {
+    case TRX_PLATFORM_DATA_SAVE_TRX_DEVICE:
+        trxMotherboard->daughterboards[0]->trxDevice = saveData;
+        trxMotherboard->daughterboards[0]->boardAttribute |= TRX_DAUGHTERBOARD_ATTRIBUTE_PREALLOCATE_TRX_DEVICE;
+        break;
+
+    case TRX_PLATFORM_DATA_SAVE_TRX_SETTING_INIT:
+        trxMotherboard->daughterboards[0]->daughterCardInit = saveData;
+        break;
+
+    case TRX_PLATFORM_DATA_SAVE_TRX_SETTING_POST_MCS:
+        trxMotherboard->daughterboards[0]->postMcsInit = saveData;
+        break;
+
+    case TRX_PLATFORM_DATA_SAVE_TRX_SETTING_PLATFORM_FILES:
+        trxMotherboard->daughterboards[0]->platformFilesInit = saveData;
+        break;
+
+    case TRX_PLATFORM_DATA_SAVE_TRX_SETTING_PIN_MODE:
+        trxMotherboard->daughterboards[0]->pinModeSettings = saveData;
+        break;
+
+    case TRX_PLATFORM_DATA_SAVE_CLOCK_SETTING_INIT:
+        trxMotherboard->daughterboards[0]->clockInit = saveData;
+        break;
+
+    case TRX_PLATFORM_DATA_SAVE_FPGA_SETTING_INIT:
+        trxMotherboard->daughterboards[0]->fpgaInit = saveData;
+        break;
+
+    case TRX_PLATFORM_DATA_SAVE_STREAM_SETTING_INIT:
+        trxMotherboard->daughterboards[0]->streamSettings = saveData;
+        break;
+
+    default:
+        printf("ERROR: Unknown saving data type. %s:%u  \n",
+               __func__,
+               __LINE__);
+        return (ADI_HAL_GEN_SW);
+    }
+
+    return (error);
+}
+
+int32_t adi_motherboard_Discover(adi_motherboard_trx_t** genericBoard)
+{
+    int32_t                error          = ADI_COMMON_HAL_OK;
+    adi_motherboard_trx_t* trxMotherboard = NULL;
+    int32_t                compareFlag    = 0;
+
+    /* Create a device board */
+    trxMotherboard = adi_platform_Discover();
+    if (trxMotherboard == NULL)
+    {
+        error = ADI_HAL_GEN_SW;
+        printf("ERROR: %s:%u has failed.\n",
+               __func__,
+               __LINE__);
+        return (error);
+    }
+
+    compareFlag = adi_motherboard_Compare(*genericBoard,
+                                          trxMotherboard);
+    if (*genericBoard != NULL && compareFlag == ADI_TRUE)
+    {
+        /* The genericBoard parameter is the same as the existing configuration. 
+         * Delete the local board and return. */
+        error = adi_motherboard_Destroy(trxMotherboard);
+        return (error);
+    }
+    else if (*genericBoard != NULL && compareFlag == ADI_FALSE)
+    {
+        /* The genericBoard parameter was initialized for a different configuration.
+         * Delete the previous configuration and proceed with initializing the current. */
+        adi_motherboard_Destroy(*genericBoard);
+    }
+    /* The last remaining case when genericBoard == NULL signifies the first initialization and
+     * should proceed with initializing normally. */
+
+    *genericBoard = trxMotherboard;
+
+    /* Function pointer */
+    trxMotherboard->Destroy = adi_motherboard_Destroy;
+
+    return (ADI_COMMON_HAL_OK);
+}
+
+int32_t adi_motherboard_Destroy(adi_motherboard_trx_t* trxMotherboard)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    if (trxMotherboard == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    /* bring down and free daughterboard */
+    if (trxMotherboard->daughterboards[0] != NULL)
+    {
+        /* Bring down and free devices associated with duaghterboard */
+        recoveryAction = trxMotherboard->daughterboards[0]->DeviceDestroy(trxMotherboard->daughterboards[0]);
+        if (recoveryAction != ADI_COMMON_ACT_NO_ACTION)
+        {
+            return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+        }
+        /* Free the daughterboard */
+        free(trxMotherboard->daughterboards[0]);
+        trxMotherboard->daughterboards[0] = NULL;
+    }
+
+    /* Now free the motherboard common device and structure */
+    adi_hal_DevHalCfgFree((void *)trxMotherboard->common.devHalInfo);
+    free((void *)trxMotherboard);
+    trxMotherboard = NULL;
+
+    return recoveryAction;
+}

driver/rfic/rf/adrv9025/c_src/boards/motherboards/adi_motherboard_trx.h

@@ -0,0 +1,105 @@
+#ifndef _ADI_MOTHERBOARD_TRX_H_
+#define _ADI_MOTHERBOARD_TRX_H_
+
+#include "adi_motherboard_trx_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/****************************************************************************
+* Runtime functions
+****************************************************************************
+*/
+/**
+* \brief This function is a helper function to fill out the members of the 
+*        devHalCfg structure with driver names for common platform.
+*
+* This function allows keeping the platform specific knowledge of driver names
+* in this layer of code.  Higher layers of code can call this to fill out the
+* devHalCfg structure correctly for the common platform.
+*
+* Each device gets a unique instance of the devHalCfg structure describing the
+* device resources for that device, such as the SPI chip select, etc.
+*
+* \param interfaceMask A mask that represents which platform interfaces are required by a particular device (SPI, Logging, etc)
+* \param spiChipSelect The chip select index describing the particular device 
+* \param logFilename The filename of the logfile for this device.
+*/
+void* hal_DevHalCfgCreate(uint32_t    interfaceMask,
+                          uint8_t     spiChipSelect,
+                          const char* logFilename);
+
+/**
+* \brief This function creates a structure to hold all the necessary information for daughter card
+*
+* \dep_begin
+* \dep_end
+* 
+* \param trxMotherboard Pointer to the generic structure
+*
+* \retval a pointer to the generic structure, null pointer if error occurs
+*/
+int32_t adi_daughterboard_Discover(adi_motherboard_trx_t* trxMotherboard);
+
+/**
+* \brief This function creates a generic structure to hold all the necessary information
+*
+* \dep_begin
+* \dep_end
+*
+* \param trxMotherboard Pointer to the generic structure
+*
+* \retval ADI_HAL_GEN_SW Function could not completed
+* \retval ADI_HAL_OK Function completed successfully, no action required
+*/
+int32_t adi_motherboard_Discover(adi_motherboard_trx_t** trxMotherboard);
+
+/**
+* \brief This function creates a generic structure to hold all the necessary information
+*
+* \dep_begin
+* \dep_end
+*
+* \param trxMotherboard Pointer to the generic structure
+*
+* \retval ADI_HAL_GEN_SW Function could not completed
+* \retval ADI_HAL_OK Function completed successfully, no action required
+*/
+int32_t adi_motherboard_Discover(adi_motherboard_trx_t** trxMotherboard);
+
+/**
+* \brief This function creates a generic structure to hold all the necessary information
+*
+* \dep_begin
+* \dep_end
+*
+* \param trxMotherboard Pointer to the generic structure
+* \param saveData Pointer to data to be save
+* \param saveType initcates the type of data
+*
+* \retval ADI_HAL_GEN_SW Function could not completed
+* \retval ADI_HAL_OK Function completed successfully, no action required
+*/
+int32_t adi_motherboard_SaveInfo(adi_motherboard_trx_t* trxMotherboard,
+                                 uintptr_t              saveData,
+                                 adrvtrx_data_save_t    saveType);
+
+/**
+* \brief This function destroy and clean up the motherboard structure
+*
+* \dep_begin
+* \dep_end
+*
+* \param trxMotherboard Pointer to the generic structure
+*
+* \retval ADI_HAL_GEN_SW Function could not completed
+* \retval ADI_HAL_OK Function completed successfully, no action required
+*/
+int32_t adi_motherboard_Destroy(adi_motherboard_trx_t* trxMotherboard);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/motherboards/adi_motherboard_trx_types.h

@@ -0,0 +1,71 @@
+#ifndef _ADI_MOTHERBOARD_TRX_TYPES_H_
+#define _ADI_MOTHERBOARD_TRX_TYPES_H_
+
+#include <stdint.h>
+#include "adi_common.h"
+#include "adi_fmc_fru.h"
+#include "adi_daughterboard_trx_types.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define ADI_MAX_DAUGHTERBOARDS                    2
+#define ADI_BOARD_NAME_SIZE                      64
+
+typedef enum adrvtrx_data_save
+{
+    TRX_PLATFORM_DATA_SAVE_TRX_DEVICE = 1,
+    TRX_PLATFORM_DATA_SAVE_TRX_SETTING_INIT,
+    TRX_PLATFORM_DATA_SAVE_TRX_SETTING_POST_MCS,
+    TRX_PLATFORM_DATA_SAVE_TRX_SETTING_PLATFORM_FILES,
+    TRX_PLATFORM_DATA_SAVE_TRX_SETTING_PIN_MODE,
+    TRX_PLATFORM_DATA_SAVE_CLOCK_SETTING_INIT,
+    TRX_PLATFORM_DATA_SAVE_FPGA_SETTING_INIT,
+    TRX_PLATFORM_DATA_SAVE_STREAM_SETTING_INIT
+} adrvtrx_data_save_t;
+
+typedef struct adi_daughterboard_trx adi_daughterboard_trx_t;
+typedef struct adi_motherboard_trx   adi_motherboard_trx_t;
+
+/**
+* \brief Data structure to hold devices in an daughter card
+*/
+typedef struct adi_motherboard_trx
+{
+    /* Common device */
+    adi_common_Device_t common; /*!< Pointer to common device */
+
+    /* Initialization status */
+    uint32_t initializedStatus; /*!< initialization status */
+
+    uint32_t motherboardId;                        /*!< The motherboard type i.e ADS8, ADS9 etc. */
+    int8_t   motherboardName[ADI_BOARD_NAME_SIZE]; /*!< Platform name string */
+
+    /* Array of daughter boards pointers */
+    adi_daughterboard_trx_t* daughterboards[ADI_MAX_DAUGHTERBOARDS];
+
+    /* function pointers */
+    /* Constructors and destructors */
+    int32_t (*Create)(adi_motherboard_trx_t*);
+
+    int32_t (*Destroy)(adi_motherboard_trx_t*);
+
+    /* Programming functions */
+    int32_t (*BoardProgram)(adi_motherboard_trx_t*);
+
+    int32_t (*BoardJesdBringup)(adi_motherboard_trx_t*,
+                                uint32_t              ,
+                                uint32_t              );
+
+    int32_t (*BoardProgramPhase1)(adi_motherboard_trx_t*);
+
+    int32_t (*BoardProgramPhase2)(adi_motherboard_trx_t*);
+}             adi_motherboard_trx_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/boards/motherboards/makefile

@@ -0,0 +1,21 @@
+LIBADI_MOTHERBOARD = libadi_motherboard.a
+CC = gcc
+ARFLAGS = -rv
+CFLAGS = -Wall -Werror -I ../daughterboards -I ../../platforms -I ../../platforms/platform_utils -I ../../common/  -I ../../common/adi_error -I ../../common/adi_logging -I../../common/adi_hal
+EXT = c
+
+SRC = $(wildcard *.$(EXT))
+
+OBJS = $(SRC:.$(EXT)=.o)
+
+all: $(SRC) $(LIBADI_MOTHERBOARD)
+
+.$(EXT).o:
+	$(CC) $(CFLAGS) -o $@ -c $<
+
+$(LIBADI_MOTHERBOARD): $(OBJS)
+	ar $(ARFLAGS) $(LIBADI_MOTHERBOARD) $(OBJS)
+
+clean:
+	rm -rf *.o
+	rm -rf *.a

driver/rfic/rf/adrv9025/c_src/common/adi_common.h

@@ -0,0 +1,23 @@
+/**
+* \file adi_common.h
+* \brief Contains ADI common interface.
+*
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADI_COMMON_H_
+#define _ADI_COMMON_H_
+
+#include "adi_common_error.h"
+#include "adi_common_hal.h"
+#include "adi_common_log.h"
+#include "adi_common_types.h"
+#include "adi_common_user.h"
+
+#endif  /* _ADI_COMMON_H_ */

driver/rfic/rf/adrv9025/c_src/common/adi_common_macros.h

@@ -0,0 +1,46 @@
+/**
+* \file adi_common_macros.h
+* \brief Contains ADI Transceiver general purpose macros.
+* 
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADI_COMMON_MACROS_H_
+#define _ADI_COMMON_MACROS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ADI_HARDRESET 1U
+#define ADI_SOFTRESET 0U
+
+#define ADI_TRUE  1U
+#define ADI_FALSE 0U
+
+#define ADI_ENABLE  1U
+#define ADI_DISABLE 0U
+
+#define ADI_ON  1U
+#define ADI_OFF 0U
+
+#define ADI_SUCCESS 1U
+#define ADI_FAILURE 0U
+
+#define ADI_COMMON_VERBOSE        1
+#define ADI_COMMON_VARIABLE_USAGE 1
+#define ADI_MAX_PATH              100
+#define ADI_MAX_ERR_STR           150
+#define ADI_ITER_BEGIN            0
+#define ADI_ITER_END UINT32_MAX
+
+#ifdef __cplusplus
+}
+#endif
+#endif  /* _ADI_COMMON_MACROS_H_ */

driver/rfic/rf/adrv9025/c_src/common/adi_common_types.h

@@ -0,0 +1,41 @@
+/**
+* \file adi_common_types.h
+* \brief Contains ADI common types.
+*
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADI_COMMON_TYPES_H_
+#define _ADI_COMMON_TYPES_H_
+
+#include "adi_common_error_types.h"
+#include "adi_common_hal_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+*  \brief ADI common device structure
+*/
+typedef struct adi_common_Device
+{
+    void                     *devHalInfo; /*!< ADI_HAL Hardware layer settings pointer specific to this ADRV9025 instance */
+    adi_common_ErrStruct_t   error;
+    adi_common_Cache_t       cacheInfo;   /*!< TODO: add description */
+    /* function pointer for datapacking or device specific hal */
+} adi_common_Device_t;
+
+typedef uint32_t adi_iter_t;
+
+#ifdef __cplusplus
+}
+#endif
+#endif  /* _ADI_COMMON_TYPES_H_ */
+

driver/rfic/rf/adrv9025/c_src/common/adi_common_user.h

@@ -0,0 +1,39 @@
+/**
+* \file adi_common_user.h
+*
+* User modifiable defines
+*
+* \brief Contains ADI Transceiver common hal types.
+*
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADI_COMMON_USER_H_
+#define _ADI_COMMON_USER_H_
+
+/* Includes that user can modify with their own libraries as long as the function prototypes matches */
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+#include <ctype.h>
+#include <inttypes.h>
+#include <memory.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef ADI_COMMON_HAL_SPIARRAYSIZE
+    #define ADI_COMMON_HAL_SPIARRAYSIZE 256
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif  /* _ADI_COMMON_USER_H_ */

driver/rfic/rf/adrv9025/c_src/common/adi_error/adi_common_error.c

@@ -0,0 +1,124 @@
+/**
+ * \file adi_common_error.c
+ * \brief Contains common API error handling functions implementations
+ *
+ * These functions are public to the customer for getting more details on
+ * errors and debugging.
+ *
+ * ADI common lib Version: 0.0.1.1
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#include "adi_common_error.h"
+#include "adi_common_log.h"
+#include "adi_platform.h"
+#include <stdlib.h>
+
+void adi_common_ErrorReport(adi_common_Device_t*    commonDev,
+                            adi_common_ErrSources_e errSrc,
+                            int32_t                 detErr,
+                            int32_t                 actionToRecover,
+                            const char*             fileName,
+                            const char*             funcName,
+                            uint32_t                lineNum,
+                            const char*             varName,
+                            const char*             customError)
+{
+    int32_t                actionReport = actionToRecover;
+    int32_t                lastAction   = ADI_COMMON_ACT_NO_ACTION;
+    adi_common_ErrStruct_t localSave;
+
+    /* Check errorPtr pointer is not null */
+    if (commonDev != NULL)
+    {   
+        /* Check if error is an actual error */
+        if (detErr > ADI_COMMON_ERR_OK)
+        {
+            /* Check if the action to recover is a warning or action */
+            if (actionReport != ADI_COMMON_ACT_NO_ACTION)
+            {
+                /* Check if the action to recover is of more importance than the current action
+                 * Warnings are always of a lower importance than actions.
+                 * if warning then the API is design not to termintate execution see
+                 * IF_ERROR_RETURN macro
+                 */
+                if ((actionReport > commonDev->error.newAction) && (commonDev->error.newAction != ADI_COMMON_ACT_NO_ACTION))
+                {
+                    /* log the error that has called this function and keep previous error in the error structure */
+                    localSave.errormessage = customError;
+                    localSave.errFile      = fileName;
+                    localSave.errFunc      = funcName;
+                    localSave.errLine      = lineNum;
+                    localSave.errCode      = detErr;
+                    localSave.errSource    = errSrc;
+                    localSave.varName      = varName;
+                    localSave.newAction    = actionReport;
+
+                    if (commonDev->error.logEnable == ADI_ENABLE)
+                    {
+                        ADI_ERROR_LOG(commonDev,
+                                      localSave);
+                    }
+                }
+                else
+                {
+                    /* Assign detected action and error to the errors structure */
+                    commonDev->error.errSource    = errSrc;
+                    commonDev->error.errCode      = detErr;
+                    commonDev->error.errLine      = lineNum;
+                    commonDev->error.errFunc      = funcName;
+                    commonDev->error.errFile      = fileName;
+                    commonDev->error.varName      = varName;
+                    commonDev->error.errormessage = customError;
+                    commonDev->error.lastAction   = commonDev->error.newAction;
+                    commonDev->error.newAction    = actionToRecover; // daya debug abort
+                    printf("commonDev abort \n"); // daya debug 
+                    
+                    if (commonDev->error.logEnable == ADI_ENABLE)
+                    {
+                        ADI_ERROR_LOG(commonDev,
+                                      commonDev->error);
+                    }
+                }
+            }
+            else /* actionReport == ADI_COMMON_ACT_NO_ACTION */
+            {
+                /* Clear error and pass it to the previous action */
+                if (commonDev->error.newAction != ADI_COMMON_ACT_NO_ACTION)
+                {
+                    lastAction = commonDev->error.newAction;
+                    adi_common_ErrorClear(commonDev);
+                    commonDev->error.lastAction = lastAction;
+                }
+            }
+        }
+    }
+}
+
+int32_t adi_common_ErrorClear(adi_common_Device_t* commonDev)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    /* Check device pointer is not null */
+    ADI_NULL_DEVICE_PTR_RETURN(commonDev);
+
+    ADI_FUNCTION_ENTRY_LOG(commonDev,
+                           ADI_COMMON_LOG_API);
+
+    commonDev->error.errSource    = 0;
+    commonDev->error.errCode      = 0;
+    commonDev->error.errLine      = 0;
+    commonDev->error.errFunc      = "";
+    commonDev->error.errFile      = "";
+    commonDev->error.varName      = "";
+    commonDev->error.errormessage = "";
+    commonDev->error.lastAction   = 0;
+    commonDev->error.newAction    = 0;
+
+    return recoveryAction;
+}

driver/rfic/rf/adrv9025/c_src/common/adi_error/adi_common_error.h

@@ -0,0 +1,191 @@
+/**
+ * \file adi_common_error.h
+ * \brief Contains Common API error handling function prototypes and macros 
+ * that will be used by the API and will call functions in adi_common_error.c
+ * 
+ * These functions are public to the customer for getting more details on
+ * errors and debugging.
+ *
+* ADI common lib Version: 0.0.1.1
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADI_COMMON_ERROR_H_
+#define _ADI_COMMON_ERROR_H_
+
+#include <stdint.h>
+#include "adi_common_error_types.h"
+#include "adi_common_types.h"
+#include "adi_common_macros.h"
+
+/*
+* *******************************
+* ADI Common error macros
+* *******************************
+*/
+
+/**
+* \brief Macro to check if device pointer is a valid pointer
+*        if null pointer detected return ADI_COMMON_ACT_ERR_CHECK_PARAM action
+* 
+* \param ptr Pointer to be checked
+* 
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM
+*/
+#define ADI_NULL_DEVICE_PTR_RETURN(ptr)\
+if(ptr == NULL)\
+{ \
+    return ADI_COMMON_ACT_ERR_CHECK_PARAM; \
+}
+
+/**
+* \brief Macro to check if a pointer is a valid pointer
+*        This macro upon detection of a null pointer will report the error and
+*        return ADI_COMMON_ACT_ERR_CHECK_PARAM action
+* 
+* \param devHalInfo pointer to the hal layer to use logging
+* \param errorPtr Pointer to the error data structure
+* \param ptr Pointer to be checked
+* 
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM
+*/
+#define ADI_NULL_PTR_RETURN(commonDev, ptr)\
+{ \
+    if(ptr == NULL) \
+    { \
+         ADI_ERROR_REPORT(commonDev, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_NULL_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, ptr, "NULL Pointer passed"); \
+         return ADI_COMMON_ACT_ERR_CHECK_PARAM; \
+    } \
+}
+
+/**
+* \brief Macro to check if return from AI function is needed
+*
+* \param a Action to be checked 
+* 
+* \retval Action passed
+*/
+#define ADI_ERROR_RETURN(a) if(a < ADI_COMMON_ACT_NO_ACTION) { printf("ERR RETURN: %s %d %s\n", __FILE__, __LINE__, __func__); return a; }
+
+/**
+* \brief Macro to close a file and return if an error is detected
+*
+* \param1 an Action to be checked
+* \param2 the file to close
+* 
+* \retval Action passed
+*/
+#define ADI_ERROR_CLOSE_RETURN(action, fileToClose) if(action < ADI_COMMON_ACT_NO_ACTION) {(void)fclose(fileToClose); return action;}
+
+#if ADI_COMMON_VERBOSE > 0
+#if ADI_COMMON_VARIABLE_USAGE > 0
+/*
+* Macro to print variable name as a string, used in Error reporting facility
+*/
+#ifndef GET_VARIABLE_NAME
+#define GET_VARIABLE_NAME(Variable) (#Variable)
+#endif 
+#else
+#ifndef GET_VARIABLE_NAME
+            #define GET_VARIABLE_NAME(Variable) ("")
+#endif 
+#endif /* ADI_COMMON_VARIABLE_USAGE */
+
+/**
+* \brief Macro to perform error reporting
+*        This macro will call adi_common_ErrorReport and extract the
+*        necessary information from the API function using the preprocessors:
+* __FILE__ will represent the full path of the current API function file where the error happened,
+* __FUNCTION__ will expand to the name of the function in the API where the error was produced,
+* __LINE__ theis preprocessor macro expands to the line number inside the API function where the error happened.
+* 
+* 
+* \param devHalInfo pointer to the hal layer to use logging
+* \param errorPtr Pointer to the error data structure
+* \param errorSource Error source of error code of type enum adi_common_ErrSources_e
+* \param error Detected error
+* \param action Action to recover from
+* \param fileName file name of the file where the error was detected
+* \param funcName function name of the function where the error was detected
+* \param lineNum line number of where the error was detected
+* \param variable variable name that had the error,GET_VARIABLE_NAME(variable) will print the variable name that needs to be checked, this can be NULL and it will mean that there is an error not depending on a variable only
+* \param customError error message to be written to the struct
+* 
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM
+*/
+#define ADI_ERROR_REPORT(commonDev, errorSource, error, action, variable, customError) \
+    adi_common_ErrorReport(commonDev, (adi_common_ErrSources_e)errorSource, (int32_t)error, (int32_t)action, __FILE__, __FUNCTION__, __LINE__, GET_VARIABLE_NAME(variable), customError)
+
+#else
+#define ADI_ERROR_REPORT(commonDev, errorSource, error, action, variable, customError) \
+    adi_common_ErrorReport(commonDev, (adi_common_ErrSources_e)errorSource, (int32_t)error, (int32_t)action, "", "", __LINE__, "", "")
+#endif /* ADI_COMMON_VERBOSE */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+* *******************************
+* ADI Common error functions
+* *******************************
+*/
+
+/**
+ * \brief Common API error reporting facility
+ *  
+ * Error handling to assign actions:
+ * If actionToRecover is ADI_COMMON_ACT_NO_ACTION then nothing gets logged or reported, if the previous new action in the error structure
+ * is different to ADI_COMMON_ACT_NO_ACTION the error struct will be cleared and then the previous action will be stored in the lastAction 
+ * member.
+ * 
+ * If not ADI_COMMON_ACT_NO_ACTION then check latest action previously logged in the error structure and verify if the new found action 
+ * is of a higher priority level than the last error in the structure, 
+ * If it is then we need to demote the error.newAction and log the previous action again
+ * demoting is done by assign it to error.lastAction.
+ * If action is a warning then it gets logged and assigned to the error structure the same way as the error action, if an error 
+ * action occurs after a warning the warning will be demoted and could be accessed through  error.lastAction
+ *
+ * \dep_begin
+ * \dep{device->common.devHalInfo}
+ * \dep_end
+ *
+ * \param commonDev pointer to adi_common_Device_t
+ * \param errSrc Error source of error code of type enum adi_common_ErrSources_e
+ * \param detErr Detected error
+ * \param actionToRecover Action to recover from
+ * \param fileName file name of the file where the error was detected
+ * \param funcName function name of the function where the error was detected
+ * \param lineNum line number of where the error was detected
+ * \param varName variable name that had the error, this can be NULL and it will mean that there is an error not depending on a variable only
+ * \param customError error message to be written to the struct
+ */
+void adi_common_ErrorReport(adi_common_Device_t*    commonDev,
+                            adi_common_ErrSources_e errSrc,
+                            int32_t                 detErr,
+                            int32_t                 actionToRecover,
+                            const char*             fileName,
+                            const char*             funcName,
+                            uint32_t                lineNum,
+                            const char*             varName,
+                            const char*             customError);
+
+/**
+ * \brief Function to clear existing error
+ * 
+ * \param commonDev pointer to adi_common_Device_t
+ * 
+ * \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+ */
+int32_t adi_common_ErrorClear(adi_common_Device_t* commonDev);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ADI_COMMON_ERROR_H_ */

driver/rfic/rf/adrv9025/c_src/common/adi_error/adi_common_error_types.h

@@ -0,0 +1,113 @@
+/**
+* \file adi_common_error_types.h
+* \brief Contains common error data types for API Error messaging
+*
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADI_COMMON_ERROR_TYPES_H_
+#define _ADI_COMMON_ERROR_TYPES_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+*  \brief ADI common error structure
+*/
+typedef struct adi_common_ErrStruct
+{
+    int32_t     errSource;    /*!< Current source of error returned */
+    int32_t     errCode;      /*!< Current error code returned */
+    uint32_t    errLine;      /*!< Line of the source code where the error was returned */
+    const char* errFunc;      /*!< Function name where the error occurred */
+    const char* errFile;      /*!< File name where the error occurred */
+    const char* varName;      /*!< Variable name which has the error */
+    const char* errormessage; /*!< Error message to describe the error */
+    int32_t     lastAction;   /*!< Previous action detected */
+    int32_t     newAction;    /*!< Current action detected */
+    uint8_t     logEnable;    /*!< Log errors enable flag */
+} adi_common_ErrStruct_t;
+
+/**
+*  \brief Unique Common error sources for Common layer.
+*
+**  Common error sources will be given the following range: 0x0000 - 0x0FFF
+*   Specific error sources for different devices/boards will be given the following range:
+*   Devices 0xd000 - 0xdFFF where d is the device number
+*
+* TODO: replace by unique error source
+* Shall this become common layer:
+* -HAL
+* -COMMON
+* -DEVICE
+* -BF
+* -API
+*/
+typedef enum adi_common_ErrSources
+{
+    ADI_COMMON_ERRSRC_API,      /*!< Error detected in API */
+    ADI_COMMON_ERRSRC_ADI_HAL,  /*!< ADI HAL Error Src: Error codes defined by adi_common_hal_Err_e */
+    ADI_COMMON_ERRSRC_DEVICEBF, /*!< ADI BitField Error Src: Error codes defined by adrv9025_BF_Err_t */
+    ADI_COMMON_ERRSRC_DEVICEHAL /*!< ADI Device HAL Error Src: Error codes defined in device error extension */
+} adi_common_ErrSources_e;
+
+/**
+* \brief Unique Error source for common layer
+*        this needs to be extended by the device specific source code files
+*
+* Common error sources will be given the following range: 0x0000 - 0x0FFF
+* Specific error sources for different devices/boards will be given the following range:
+* Devices 0xd000 - 0xdFFF where d is the device number
+*/
+#define ADI_COMMON_SRC_ERROR 0x0001 /*!< Error detected in adi_common_error.c */
+#define ADI_COMMON_SRC_LOG   0x0002 /*!< Error detected in adi_common_log.c */
+#define ADI_COMMON_SRC_HAL   0x0003 /*!< Error detected in adi_common_hal.c */
+
+/**
+* \brief Unique Common error codes for API.
+*        Each error condition in the library shall have its own value
+*        to ease debug of errors.
+*
+* Common error codes will be given the following range: 0x0000 - 0x0FFF
+* Specific error codes for different devices/boards will be given the following range:
+* Devices 0xd000 - 0xdFFF where d is the device number
+*/
+#define ADI_COMMON_ERR_OK              0x0000 /*!< No error detected */
+#define ADI_COMMON_ERR_INV_PARAM       0x0001 /*!< Invalid parameter detected in function */
+#define ADI_COMMON_ERR_NULL_PARAM      0x0002 /*!< Null parameter detected in function */
+#define ADI_COMMON_ERR_API_FAIL        0x0003 /*!< Error detected in API function */
+#define ADI_COMMON_ERR_SPI_FAIL        0x0004 /*!< SPI interface error detected */
+#define ADI_COMMON_ERR_CPU_EXCEPTION   0x0008 /*!< CPU exception detected */
+
+/**
+*  \brief list of Common Recovery Actions used as return values from APIs.
+*         More information about the action is given in the error structure at run time
+*         Actions are divided into:
+*         Errors are negative, they indicate that an action shall be taken in order to continue the normal operation of the device
+*         Warnings are positive, they done break the normal operation of the device, they indicate that at some stage an action should be taken
+*/
+#define  ADI_COMMON_ACT_WARN_CHECK_PARAM    (3)  /*!< API OK - Parameter exceeds the range of values allowed */
+#define  ADI_COMMON_ACT_WARN_RERUN_FEATURE  (2)  /*!< API OK - Rerun feature */
+#define  ADI_COMMON_ACT_WARN_RESET_LOG      (1)  /*!< API OK - LOG Not working */
+#define  ADI_COMMON_ACT_NO_ACTION           (0)  /*!< API OK - NO ACTION REQUIRED */
+#define  ADI_COMMON_ACT_ERR_CHECK_TIMER     (-1) /*!< API OK - timer not working */
+#define  ADI_COMMON_ACT_ERR_CHECK_PARAM     (-2) /*!< API OK - INVALID PARAM */
+#define  ADI_COMMON_ACT_ERR_RESET_INTERFACE (-3) /*!< API NG - Interface Not Working */
+#define  ADI_COMMON_ACT_ERR_RESET_FEATURE   (-4) /*!< API NG - Reset feature */
+#define  ADI_COMMON_ACT_ERR_RESET_MODULE    (-5) /*!< API NG - Module Not working */
+#define  ADI_COMMON_ACT_ERR_RESET_FULL      (-6) /*!< API NG - FULL RESET REQUIRED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ADI_COMMON_ERROR_TYPES_H_ */

driver/rfic/rf/adrv9025/c_src/common/adi_hal/adi_common_hal.c

@@ -0,0 +1,180 @@
+/**
+* \file adi_common_hal.c
+* \brief Contains ADI Transceiver Hardware Abstraction functions
+*        Analog Devices maintains and provides updates to this code layer.
+*        The end user should not modify this file or any code in this directory.
+*        
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+/* Common HAL layer maintained by Analog Devices */
+#include "adi_common_hal.h"
+#include "adi_common_error_types.h"
+#include "adi_platform.h"
+
+int32_t adi_common_hal_HwOpen(adi_common_Device_t *commonDev)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+
+    if (commonDev == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+    else
+    {
+        halError = adi_hal_HwOpen(commonDev->devHalInfo);
+    }
+    
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        /* Report error in this layer */
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_HAL,
+                         halError,
+                         ADI_COMMON_ACT_ERR_RESET_FULL,
+                         NULL,
+                         "Hardware can not be opened");
+    }
+
+    return commonDev->error.newAction;
+}
+
+int32_t adi_common_hal_HwClose(adi_common_Device_t *commonDev)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+
+    if (commonDev == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+    else
+    {
+        halError = adi_hal_HwClose(commonDev->devHalInfo);
+    }
+    
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        /* Report error in this layer */
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_HAL,
+                         halError,
+                         ADI_COMMON_ACT_ERR_RESET_FULL,
+                         NULL,
+                         "Hardware can not be closed");
+    }
+
+    return commonDev->error.newAction;
+}
+
+int32_t adi_common_hal_HwReset(adi_common_Device_t *commonDev, uint8_t pinLevel)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+
+    if (commonDev == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+    else
+    {
+        halError = adi_hal_HwReset(commonDev->devHalInfo, pinLevel);
+    }
+
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        /* Report error in this layer */
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_HAL,
+                         halError,
+                         ADI_COMMON_ACT_ERR_RESET_FULL,
+                         NULL,
+                         "Hardware can not be opened");
+    }
+
+    return commonDev->error.newAction;
+}
+
+int32_t adi_common_hal_Wait_us(adi_common_Device_t *commonDev, uint32_t time_us)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+
+    if (commonDev == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+    else
+    {
+        halError = adi_hal_Wait_us(commonDev->devHalInfo, time_us);
+    }
+
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        /* Report error in this layer */
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_HAL,
+                         halError,
+                         ADI_COMMON_ACT_ERR_CHECK_TIMER,
+                         NULL,
+                         "Wait function failed");
+    }
+
+    return commonDev->error.newAction;
+}
+
+int32_t adi_common_hal_Wait_ms(adi_common_Device_t *commonDev, uint32_t time_ms)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+
+    if (commonDev == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+    else
+    {
+        halError = adi_hal_Wait_us(commonDev->devHalInfo, time_ms * 1000);
+    }
+
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        /* Report error in this layer */
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_HAL,
+                         halError,
+                         ADI_COMMON_ACT_ERR_CHECK_TIMER,
+                         NULL,
+                         "Wait function failed");
+    }
+
+    return commonDev->error.newAction;
+}
+
+int32_t adi_common_hal_HwVerify(adi_common_Device_t *commonDev)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+    if (commonDev == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+    else
+    {
+        halError = adi_hal_HwVerify(commonDev->devHalInfo);		
+    }
+
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        /* Report error in this layer */
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_HAL,
+                         halError,
+                         ADI_COMMON_HAL_LIBRARY_NOT_AVAILABLE,
+                         NULL,
+                         "ERROR hardware verify failed");
+    }
+
+    return commonDev->error.newAction;
+}

driver/rfic/rf/adrv9025/c_src/common/adi_hal/adi_common_hal.h

@@ -0,0 +1,129 @@
+/**
+ * \file adi_common_hal.h
+ * \brief Contains ADI Hardware Abstraction layer function prototypes and type definitions for adi_common_hal.c
+ * 
+ * ADI common lib Version: 0.0.1.1
+ */
+
+ /**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADI_COMMON_HAL_H_
+#define _ADI_COMMON_HAL_H_
+
+/* include standard types and definitions */
+#include <stdint.h>
+#include "adi_common_log.h"
+
+
+
+/*========================================
+ * Prototypes
+ *=======================================*/
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*============================================================================
+ * ADI Device Hardware Control Functions
+*===========================================================================*/
+
+/**
+* \brief Used to initialise the HAL hardware.
+*
+* \dep_begin
+* \dep{device->common}
+* \dep_end
+*
+* \param commonDev Pointer to the common structure of type adi_common_Device_t
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_common_hal_HwOpen(adi_common_Device_t *commonDev);
+
+/**
+* \brief Used to close the HAL hardware.
+*
+* \dep_begin
+* \dep{device->common}
+* \dep_end
+*
+* \param commonDev Pointer to the common structure of type adi_common_Device_t
+*
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_common_hal_HwClose(adi_common_Device_t *commonDev);
+
+/**
+* \brief Used to reset the HAL hardware.
+*
+* \dep_begin
+* \dep{device->common}
+* \dep_end
+*
+* \param commonDev Pointer to the common structure of type adi_common_Device_t
+* \param pinLevel Pin level to be set 1 will held the reset line high, 0 will held the reset line low
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_common_hal_HwReset(adi_common_Device_t *commonDev, uint8_t pinLevel);
+
+/**
+* \brief Used to sleep for a given number of microSeconds.
+*
+* \dep_begin
+* \dep{device->common}
+* \dep_end
+*
+* \param commonDev Pointer to the common structure of type adi_common_Device_t
+* \param time_us The number of micro seconds to sleep
+* 
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_common_hal_Wait_us(adi_common_Device_t *commonDev, uint32_t time_us);
+
+/**
+* \brief Used to sleep for a given number of milliSeconds.
+*
+* \dep_begin
+* \dep{device->common}
+* \dep_end
+*
+* \param commonDev Pointer to the common structure of type adi_common_Device_t
+* \param time_ms The number of milli seconds to sleep.
+* 
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_common_hal_Wait_ms(adi_common_Device_t *commonDev, uint32_t time_ms);
+
+/**
+* \brief A helper function used to check that hardware is available to read from or write to.
+*
+* \dep_begin
+* \dep{device->common}
+* \dep_end
+*
+* \param commonDev Pointer to the common structure of type adi_common_Device_t
+*
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_common_hal_HwVerify(adi_common_Device_t *commonDev);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/common/adi_hal/adi_common_hal_types.h

@@ -0,0 +1,66 @@
+/**
+* \file adi_common_hal_types.h
+* \brief Contains ADI Transceiver common hal types.
+*
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADI_COMMON_HAL_TYPES_H_
+#define _ADI_COMMON_HAL_TYPES_H_
+
+#include <stdint.h>
+#include "adi_common_user.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+*  \brief Enum of possible Errors Detected by HAL layer to be communicated
+*         to ADI APIs.
+*/
+typedef enum adi_common_hal_Err
+{
+    ADI_COMMON_HAL_OK = 0, /*!< HAL function successful. No error Detected */
+    ADI_COMMON_HAL_SPI_FAIL, /*!< HAL SPI operation failure. SPI controller Down */
+    ADI_COMMON_HAL_GPIO_FAIL, /*!< HAL GPIO function Failure */
+    ADI_COMMON_HAL_TIMER_FAIL, /*!< HAL Timer function Failure */
+    ADI_COMMON_HAL_LOGGING_FAIL, /*!< HAL Logging function Failure */
+    ADI_COMMON_HAL_LOGGGING_LEVEL_FAIL, /*!< HAL Logging level Failure */
+    ADI_COMMON_HAL_WAIT_TIMEOUT, /*!< HAL function Timeout */
+    ADI_COMMON_HAL_GEN_SW, /*!< HAL function failed due to general invalid  HAL data*/
+    ADI_COMMON_HAL_FUNCTION_NOT_IMP, /*!< HAL function error, not implemented in HAL layer */
+    ADI_COMMON_HAL_LIBRARY_NOT_AVAILABLE, /*!< HAL function error, HAL layer library not found or available in this build */
+    ADI_COMMON_HAL_WARNING, /*!< HAL function warning that non critical error was detected*/
+    ADI_COMMON_HAL_FPGA_FAIL /*!< FPGA hal function failure */
+} adi_common_hal_Err_e;
+
+/**
+* \brief Data structure to hold cache device settings
+*/
+typedef struct adi_common_Cache
+{
+    uint16_t wrCacheIdx;            /*!<used to store the tx spi caching index  */
+    uint16_t rdCacheIdx;            /*!<used to store the rx spi caching index  */
+    uint16_t spiWrBufferCnt;        /*!<tracks the spi buffer space needed to execute the cached data. */
+    uint16_t spiRdBufferCnt;        /*!<tracks the spi buffer space needed to execute the cached data.*/
+    uint8_t HW_RMW_Enabled;         /*!<used to indicate if the Hardware Read Modify Write is enabled in the stream processor */
+    uint8_t wrCacheState;           /*!<used to store the tx spi caching state, one of Off, BitField, Global, merging */
+    uint8_t rdCacheState;           /*!<used to store the rx spi caching state, one of Off, BitField, Global */
+    uint8_t mergeDistance;          /*!<determines how far back in the cache to search for register address to merge */
+    uint8_t wrFlushEn;              /*!<internal cache use only. temporarily disables write cache flushing */
+    uint8_t wrOnly;                 /*!<supports broad cast mode. */
+    uint32_t wrCache[ADI_COMMON_HAL_SPIARRAYSIZE / 3]; /*!<used to store the tx spi caching one element per byte */
+    uint32_t rdCache[ADI_COMMON_HAL_SPIARRAYSIZE / 3]; /*!<used to store the rx spi caching one element per byte */
+} adi_common_Cache_t;
+    
+#ifdef __cplusplus
+}
+#endif
+#endif  /* _ADI_COMMON_HAL_TYPES_H_ */

driver/rfic/rf/adrv9025/c_src/common/adi_logging/adi_common_log.c

@@ -0,0 +1,174 @@
+/**
+* \file adi_common_log.c
+* \brief Contains ADI Transceiver Logging functions
+*        Analog Devices maintains and provides updates to this code layer.
+*        The end user should not modify this file or any code in this directory.
+*        
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADI API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+/* Intermediate platform HAL layer maintained by Analog Devices */
+#include "adi_common_hal.h"
+#include "adi_platform.h"
+#include "adi_common_error_types.h"
+#include <stdarg.h>
+
+void adi_common_LogWrite(adi_common_Device_t*  commonDev,
+                         adi_common_LogLevel_e logLevel,
+                         const char*           comment,
+                         ...)
+{
+    int32_t halError  = (int32_t)ADI_COMMON_HAL_OK;
+    uint8_t logStatus = commonDev->error.logEnable;
+
+    if (commonDev->devHalInfo == NULL)
+    {
+        halError = ADI_COMMON_HAL_GEN_SW;
+    }
+    else
+    {
+        va_list argp;
+        va_start(argp,
+                 comment);
+        halError = adi_hal_LogWrite(commonDev->devHalInfo,
+                                    (int32_t)logLevel,
+                                    comment,
+                                    argp);
+        va_end(argp);
+    }
+
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        /* reentrant function call, ADI_ERROR_REPORT calls adi_common_LogWrite 
+         * At this point we should disable logging as it is not available, but keep reporting errors/warnings
+         * 
+         * Todo:
+         * LogLevel should be set to NONE
+         * LogLevel should be reset to the particular level once the HAL layer is reset or fixed
+         * 
+         * Figure out when to re-enable commonDev->error.logEnable
+         * 
+         * Read state of log enable and restore it
+         */
+        commonDev->error.logEnable = ADI_DISABLE;
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_LOG,
+                         halError,
+                         ADI_COMMON_ACT_WARN_RESET_LOG,
+                         NULL,
+                         "Logging failure");
+        commonDev->error.logEnable = logStatus;
+    }
+}
+
+void adi_common_LogLevelSet(adi_common_Device_t* commonDev,
+                            int32_t              halLogLevel)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+
+    if (commonDev->devHalInfo == NULL)
+    {
+        halError = (int32_t)ADI_COMMON_HAL_GEN_SW;
+    }
+    else
+    {
+        halError = adi_hal_LogLevelSet(commonDev->devHalInfo,
+                                       halLogLevel);
+    }
+
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_LOG,
+                         halError,
+                         ADI_COMMON_ACT_WARN_RESET_LOG,
+                         NULL,
+                         "Log level set error");
+    }
+}
+
+void adi_common_LogLevelGet(adi_common_Device_t* commonDev,
+                            int32_t*             halLogLevel)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+
+    if ((commonDev->devHalInfo == NULL) || (halLogLevel == NULL))
+    {
+        halError = (int32_t)ADI_COMMON_HAL_GEN_SW;
+    }
+    else
+    {
+        halError = adi_hal_LogLevelGet(commonDev->devHalInfo,
+                                       halLogLevel);
+    }
+
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_LOG,
+                         halError,
+                         ADI_COMMON_ACT_WARN_RESET_LOG,
+                         NULL,
+                         "Log level get error");
+    }
+}
+
+int32_t adi_common_LogFileOpen(adi_common_Device_t* commonDev,
+                               char*                fileName)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+
+    if (commonDev->devHalInfo == NULL)
+    {
+        halError = (int32_t)ADI_COMMON_HAL_GEN_SW;
+    }
+    else
+    {
+        halError = adi_hal_LogFileOpen(commonDev->devHalInfo,
+                                       fileName);
+    }
+
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_LOG,
+                         halError,
+                         ADI_COMMON_ACT_WARN_RESET_LOG,
+                         NULL,
+                         "Log file Open error");
+    }
+
+    return commonDev->error.newAction;
+}
+
+int32_t adi_common_LogFileClose(adi_common_Device_t* commonDev)
+{
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+
+    if (commonDev->devHalInfo == NULL)
+    {
+        halError = (int32_t)ADI_COMMON_HAL_GEN_SW;
+    }
+    else
+    {
+        halError = adi_hal_LogFileClose(commonDev->devHalInfo);
+    }
+
+    if (halError != (int32_t)ADI_COMMON_HAL_OK)
+    {
+        ADI_ERROR_REPORT(commonDev,
+                         ADI_COMMON_SRC_LOG,
+                         halError,
+                         ADI_COMMON_ACT_WARN_RESET_LOG,
+                         NULL,
+                         "Log file Close error");
+    }
+
+    return commonDev->error.newAction;
+}

driver/rfic/rf/adrv9025/c_src/common/adi_logging/adi_common_log.h

@@ -0,0 +1,173 @@
+/**
+* \file adi_common_log.h
+* \brief Contains ADI Hardware Abstraction layer function prototypes and type definitions for adi_common_log.c
+*
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADI API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADI_COMMON_LOG_H_
+#define _ADI_COMMON_LOG_H_
+
+#include <stdint.h>
+#include "adi_common_log_types.h"
+#include "adi_common_macros.h"
+#include "adi_common_error.h"
+#include "adi_platform.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+* *******************************
+* ADI devices logging macros
+* *******************************
+*/
+#if ADI_COMMON_VERBOSE > 0
+/**
+* \brief Macro to log API function entry
+* 
+* This macro will call adi_common_LogWrite function with the __FUNCTION__ preprocessor
+* It will report any error discovered.
+* 
+* \param commonDev pointer to adi_common_Device_t
+* \param logLevel of type adi_common_LogLevel_e
+*/
+#define ADI_FUNCTION_ENTRY_LOG(commonDev, logLevel) \
+    adi_common_LogWrite(commonDev, logLevel, "%s(...)", __FUNCTION__)
+
+/**
+* \brief Macro to log API function entry
+* 
+* This macro will call adi_common_LogWrite function with the __FUNCTION__ preprocessor
+* 
+* \param commonDev pointer to adi_common_Device_t
+* \param logLevel of type adi_common_LogLevel_e
+* \param message const char pointer that represents the message to be logged
+* \param ... variable argument passed to adi_common_Logwrite
+*/
+#define ADI_FUNCTION_ENTRY_VARIABLE_LOG(commonDev, logLevel, message, ...) \
+    adi_common_LogWrite(commonDev, logLevel, message, __FUNCTION__, ##__VA_ARGS__)
+
+/**
+* \brief Macro to log API function entry
+* 
+* This macro will call adi_common_LogWrite function with the __FUNCTION__ preprocessor
+* 
+* \param commonDev pointer to adi_common_Device_t
+* \param message const char pointer that represents the message to be logged
+*/
+#define ADI_MESSAGE_LOG(commonDev, message) \
+    adi_common_LogWrite(commonDev, ADI_COMMON_LOG_MSG, message)
+
+#else /*  ADI_COMMON_VERBOSE < 0 or not defined */
+#define ADI_FUNCTION_ENTRY_LOG(commonDev, logLevel) \
+    adi_common_LogWrite(commonDev, logLevel, "%s(...)", __FUNCTION__)
+#define ADI_FUNCTION_ENTRY_VARIABLE_LOG(commonDev, logLevel, message, ...) \
+    adi_common_LogWrite(commonDev, logLevel, message, __FUNCTION__, ##__VA_ARGS__)
+#define ADI_MESSAGE_LOG(commonDev, message) \
+    adi_common_LogWrite(commonDev, ADI_COMMON_LOG_MSG, message)
+#endif
+
+/**
+* \brief Macro to log error structure
+*
+* This macro will call adi_common_LogWrite function with the required string for logging the error.
+*
+* \param commonDev pointer to adi_common_Device_t
+* \param err pointer to the error structure
+*/
+#define  ADI_ERROR_LOG(commonDev, err) \
+{\
+    adi_common_LogWrite(commonDev,\
+                        ADI_COMMON_LOG_ERR,\
+                        "Error number % d (0x%08x), Recovery action % d.In file % s, in function % s, in line % d, variable name % s.Error message % s.\n",\
+                        err.errCode,\
+		                err.errCode,\
+                        err.newAction,\
+                        err.errFile,\
+                        err.errFunc,\
+                        err.errLine,\
+                        err.varName,\
+                        err.errormessage); \
+}
+
+/*
+* *******************************
+* ADI devices common logging functions
+* *******************************
+*/
+
+/**
+* \brief Function to set the log level
+* 
+* Used to set the log level mask of what types of messages to log 
+* 
+* \param commonDev pointer to adi_common_Device_t
+* \param halLogLevel of type int32_t that follows adi_common_LogLevel_e
+*                    sets the application log level to which all log statement levels will be commpared to.
+*/
+void adi_common_LogLevelSet(adi_common_Device_t* commonDev,
+                            int32_t              halLogLevel);
+
+/**
+* \brief Function to get the log level
+* 
+* Used to read the log level mask of what types of messages are able to be logged.
+*
+* \param commonDev pointer to adi_common_Device_t
+* \param halLogLevel Pointer of type int32_t that follows adi_common_LogLevel_e
+* 
+*/
+void adi_common_LogLevelGet(adi_common_Device_t* commonDev,
+                            int32_t*             halLogLevel);
+
+/**
+* \brief Function to write to log with a selected comment
+* 
+* \param commonDev pointer to adi_common_Device_t
+* \param logLevel of type adi_common_LogLevel_e
+* \param comment const char pointer that represents the message to be logged
+* \param ... variable argument passed to adi_common_Logwrite
+*/
+void adi_common_LogWrite(adi_common_Device_t*  commonDev,
+                         adi_common_LogLevel_e logLevel,
+                         const char*           comment,
+                         ...);
+
+/**
+* \brief Function to open the log file associated to the log
+* 
+* Used to open the log file that is stored in the platform
+* 
+* \param commonDev pointer to adi_common_Device_t
+* \param fileName file name to be open, if null default name in the devHalInfo structure will be used
+* 
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_common_LogFileOpen(adi_common_Device_t* commonDev,
+                               char*                fileName);
+
+/**
+* \brief Function to close the log file associated to the log
+* 
+* Used to close the log file that is stored in the platform
+* 
+* \param commonDev pointer to adi_common_Device_t
+* 
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adi_common_LogFileClose(adi_common_Device_t* commonDev);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* _ADI_COMMON_LOG_H_ */

driver/rfic/rf/adrv9025/c_src/common/adi_logging/adi_common_log_types.h

@@ -0,0 +1,51 @@
+/**
+* \file adi_common_log_types.h
+* \brief Contains ADI common log types.
+*
+* ADI common lib Version: 0.0.1.1
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADI_COMMON_LOG_TYPES_H_
+#define _ADI_COMMON_LOG_TYPES_H_
+
+#include"adi_common_error_types.h"
+#include"adi_common_hal_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+* *******************************
+* ADI devices common logging enums
+* *******************************
+*/
+
+/**
+*  \brief An enumerated type in bit mask format to list the log message
+*         categories or groups.
+*/
+typedef enum adi_common_LogLevel
+{
+    ADI_COMMON_LOG_NONE     = 0x0,  /*!< Common Log enum to represent all types of log messages not selected */
+    ADI_COMMON_LOG_MSG      = 0x1,  /*!< Common Log enum to represent a log message type */
+    ADI_COMMON_LOG_WARN     = 0x2,  /*!< Common Log enum to represent a warning message type */
+    ADI_COMMON_LOG_ERR      = 0x4,  /*!< Common Log enum to represent a error message type */
+    ADI_COMMON_LOG_API      = 0x8,  /*!< Common Log enum to represent an API function entry for logging purposes */
+    ADI_COMMON_LOG_API_PRIV = 0x10, /*!< Common Log enum to represent an Private API function entry for logging purposes */
+    ADI_COMMON_LOG_BF       = 0x20, /*!< Common Log enum to represent a BF function entry for logging purposes */
+    ADI_COMMON_LOG_HAL      = 0x40, /*!< Common Log enum to represent a ADI HAL function entry for logging purposes */
+    ADI_COMMON_LOG_SPI      = 0x80, /*!< Common Log enum to represent a spi transaction type */
+    ADI_COMMON_LOG_ALL      = 0xFF  /*!< Common Log enum to represent all types of log messages selected */
+} adi_common_LogLevel_e;
+
+#ifdef __cplusplus
+}
+#endif
+#endif  /* _ADI_COMMON_LOG_TYPES_H_ */

driver/rfic/rf/adrv9025/c_src/common/makefile

@@ -0,0 +1,33 @@
+LIB_ADI_COMMON = libadi_common.a
+#CC = aarch64-linux-gnu-gcc
+ADI_COMMON_SRC = ./
+ADI_COMMON_ERROR_SRC = ./adi_error/
+ADI_COMMON_LOGGING_SRC = ./adi_logging/
+ADI_COMMON_HAL_SRC = ./adi_hal/
+
+ARFLAGS = -rv
+CFLAGS = -Wall -Werror -I../platforms/ -I./  -I./adi_error/ -I./adi_logging/ -I./adi_hal/ 
+EXT = c
+
+SRC = $(wildcard $(ADI_COMMON_SRC)/*.$(EXT)) \
+	$(wildcard $(ADI_COMMON_ERROR_SRC)/*.$(EXT)) \
+	$(wildcard $(ADI_COMMON_LOGGING_SRC)/*.$(EXT)) \
+	$(wildcard $(ADI_COMMON_HAL_SRC)/*.$(EXT))
+
+OBJS = $(SRC:.$(EXT)=.o)
+
+all: $(SRC) $(LIB_ADI_COMMON)
+
+.$(EXT).o:
+	$(CC) $(CFLAGS) -o $@ -c $<
+
+$(LIB_ADI_COMMON): $(OBJS)
+	ar $(ARFLAGS) $(LIB_ADI_COMMON) $(OBJS)
+
+clean:
+	rm -rf $(ADI_COMMON_SRC)*.o
+	rm -rf $(ADI_COMMON_ERROR_SRC)*.o
+	rm -rf $(ADI_COMMON_LOGGING_SRC)*.o
+	rm -rf $(ADI_COMMON_HAL_SRC)*.o
+	rm -rf *.a
+

driver/rfic/rf/adrv9025/c_src/devices/ad9528/makefile

@@ -0,0 +1,37 @@
+LIB_ADI_AD9528_DEVICE = libadi_ad9528.a
+#CC = aarch64-linux-gnu-gcc
+ADI_AD9528_SRC = ./public/src
+ADI_AD9528_PRIVATE_SRC = ./private/src
+ARFLAGS = -rv
+CFLAGS =  -Wall -I./public/include -I../../platforms/ -I../../common/  -I../../common/adi_error -I../../common/adi_logging -I../../common/adi_hal #-Werror
+ADI_PLATFORM_SRC = ../../platforms
+ADI_COMMON_SRC = ../../common
+EXT = c
+
+SRC = $(wildcard $(ADI_AD9528_PRIVATE_SRC)/*.$(EXT)) \
+	$(wildcard $(ADI_AD9528_SRC)/*.$(EXT))
+
+OBJS = $(SRC:.$(EXT)=.o)
+
+all: adi_platform_lib \
+	adi_common_lib \
+	$(LIB_ADI_AD9528_DEVICE)
+
+.$(EXT).o:
+	$(CC) $(CFLAGS) -o $@ -c $<
+
+$(LIB_ADI_AD9528_DEVICE): $(OBJS)
+	ar $(ARFLAGS) $(LIB_ADI_AD9528_DEVICE) $(OBJS)
+
+adi_platform_lib:
+	$(MAKE) -C $(ADI_PLATFORM_SRC)
+
+adi_common_lib:
+	$(MAKE) -C $(ADI_COMMON_SRC)
+
+clean:
+	rm -rf $(ADI_AD9528_SRC)/*.o
+	rm -rf $(ADI_AD9528_PRIVATE_SRC)/*.o
+	rm -rf *.a
+	$(MAKE) -C $(ADI_PLATFORM_SRC) clean
+	$(MAKE) -C $(ADI_COMMON_SRC) clean

driver/rfic/rf/adrv9025/c_src/devices/ad9528/private/include/adi_ad9528_registers.h

@@ -0,0 +1,90 @@
+/**
+* \file adi_ad9528_registers.h
+* \brief Contains register map definition for the AD9528 clock chip
+*/
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+#ifndef _ADI_AD9528_REGISTERS_H_
+#define _ADI_AD9528_REGISTERS_H_
+
+#include "adi_common_error_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AD9528_READ	(1 << 15)
+#define AD9528_WRITE	(0 << 15)
+#define AD9528_CNT(x)	(((x) - 1) << 13)
+#define AD9528_ADDR(x)	((x) & 0xFFF)
+
+#define AD9528_1B(x)	((1 << 16) | ((x) + 0))
+#define AD9528_2B(x)	((2 << 16) | ((x) + 1))
+#define AD9528_3B(x)	((3 << 16) | ((x) + 2))
+#define AD9528_4B(x)	((4 << 16) | ((x) + 3))
+#define AD9528_TRANSF_LEN(x)        ((x) >> 16)
+
+/* AD9528 SPI Address defines */
+#define AD9528_ADDR_ADI_SPI_CONFIG_A        0x000
+#define AD9528_ADDR_ADI_SPI_CONFIG_B        0x001
+#define AD9528_CHIP_ID                      0x003
+#define AD9528_ADDR_IO_UPDATE               0x00F
+
+#define AD9528_ADDR_REF_A_DIVIDER_LSB       0x100
+#define AD9528_ADDR_REF_A_DIVIDER_MSB       0x101
+#define AD9528_ADDR_REF_B_DIVIDER_LSB       0x102
+#define AD9528_ADDR_REF_B_DIVIDER_MSB       0x103
+#define AD9528_ADDR_PLL1_N_DIV_LSB          0x104
+#define AD9528_ADDR_PLL1_N_DIV_MSB          0x105
+#define AD9528_ADDR_PLL1_CHARGEPUMP         0x106
+#define AD9528_ADDR_PLL1_CP_CTRL2           0x107
+#define AD9528_ADDR_INPUT_RECEIVERS1        0x108
+#define AD9528_ADDR_INPUT_RECEIVERS2        0x109
+#define AD9528_ADDR_INPUT_RECEIVERS3        0x10A
+#define AD9528_ADDR_PLL1_FASTLOCK           0x10B
+
+#define AD9528_ADDR_PLL2_CHARGEPUMP         0x200
+#define AD9528_ADDR_PLL2_N_DIV              0x201
+#define AD9528_ADDR_PLL2_CTRL               0x202
+#define AD9528_ADDR_PLL2_VCO_CTRL           0x203
+#define AD9528_ADDR_PLL2_VCO_DIV            0x204
+#define AD9528_ADDR_PLL2_LF_CTRL1           0x205
+#define AD9528_ADDR_PLL2_LF_CTRL2           0x206
+#define AD9528_ADDR_PLL2_RDIV               0x207
+#define AD9528_ADDR_PLL2_REPLICA_CHDIV      0x208
+#define AD9528_ADDR_PLL2_REPLICA_DIV_PHASE  0x209
+
+#define AD9528_ADDR_CH_OUT0_CTRL1           0x300
+#define AD9528_ADDR_CH_OUT0_CTRL2           0x301
+#define AD9528_ADDR_CH_OUT0_CHDIV           0x302
+#define AD9528_ADDR_OUTPUT_SYNC             0x32A
+#define AD9528_ADDR_MASK_SYNC1              0x32B
+#define AD9528_ADDR_MASK_SYNC2              0x32C
+#define AD9528_ADDR_EN_OUTPUT_PATH_SEL1     0x32D
+#define AD9528_ADDR_EN_OUTPUT_PATH_SEL2     0x32E
+
+#define AD9528_ADDR_SYSERF_DIV_LSB          0x400
+#define AD9528_ADDR_SYSERF_DIV_MSB          0x401
+#define AD9528_ADDR_SYSREF_CTRL3            0x402
+#define AD9528_ADDR_SYSREF_CTRL4            0x403
+#define AD9528_ADDR_SYSREF_CTRL5            0x404
+
+#define AD9528_ADDR_POWERDOWN_CTRL          0x500
+#define AD9528_ADDR_CH_POWERDOWN1           0x501
+#define AD9528_ADDR_CH_POWERDOWN2           0x502
+#define AD9528_ADDR_LDO_ENABLES1            0x503
+#define AD9528_ADDR_LDO_ENABLES2            0x504
+#define AD9528_ADDR_STATUS0_CTRL            0x505
+#define AD9528_ADDR_STATUS1_CTRL            0x506
+#define AD9528_ADDR_STATUS_OE               0x507
+#define AD9528_ADDR_STATUS_READBACK0        0x508
+#define AD9528_ADDR_STATUS_READBACK1        0x509
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*_ADI_AD9528_REGISTERS_H_*/

driver/rfic/rf/adrv9025/c_src/devices/ad9528/public/include/adi_ad9528.h

@@ -0,0 +1,235 @@
+/**
+ * \file adi_ad9528.h
+ * \brief Contains function declarations for AD9528 API
+ */
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+#ifndef _ADI_AD9528_H_
+#define _ADI_AD9528_H_
+
+#include "adi_ad9528_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* \brief Performs a Hardware Initialization for AD9528 Device.
+*
+* \pre This function may be called after device->common.devHalInfo has been initialized with
+* user values
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param device Pointer to AD9528 device data structure
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+*/
+int32_t adi_ad9528_HwOpen(adi_ad9528_Device_t *device);
+    
+/**
+* \brief Performs a hardware shutdown  for AD9528 Device.
+*
+* \pre This function may be called after device->common.devHalInfo has been initialized with
+* user values
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param device Pointer to AD9528 device data structure
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+*/
+int32_t adi_ad9528_HwClose(adi_ad9528_Device_t *device);
+    
+/**
+* \brief Performs a hard reset on the AD9528 DUT
+*
+* <B>Dependencies</B>
+* - device->common.devHalInfo
+*
+* \param device is structure pointer to the AD9528 data structure containing 
+*  devHalInfo
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+*/
+int32_t adi_ad9528_HwReset(adi_ad9528_Device_t *device);
+
+/**
+* \brief Sets the AD9528 device SPI settings (3wire/4wire, msbFirst, etc).
+*
+* This function will use the settings in the adi_ad9528_SpiSettings_t structure
+* to set SPI stream mode, address auto increment direction, msbFirst/lsbfirst,
+* and 3wire/4wire mode.  The AD9528 device always uses SPI MODE 0 (CPHA=0, 
+* CPOL=0), uses a 16bit instruction word, and defaults to SPI streaming (auto increment)
+*
+* <B>Dependencies</B>
+* - device->common.devHalInfo
+* - spi->msbFirst
+* - spi->autoIncAddrUp
+* - spi->fourWireMode
+*
+* \param device is structure pointer to the AD9528 data structure containing 
+*  settings
+* \param spi is a structure pointer to AD9528 SPI controller settings - not 
+*  platform hardware SPI settings
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+*/
+int32_t adi_ad9528_SpiCfgSet(adi_ad9528_Device_t *device, adi_ad9528_SpiSettings_t *spi);
+
+/**
+* \brief Gets the AD9528 device SPI settings (3wire/4wire, MSBFirst, etc).
+*
+* This function will read the current SPI settings and load them into the spi 
+* input
+* parameter. This function only works after the adi_ad9528_SpiCfgSet has been 
+* called.
+*
+* <B>Dependencies</B>
+* - device->common.devHalInfo
+* - spi->msbFirst
+* - spi->enSpiStreaming
+* - spi->autoIncAddrUp
+* - spi->fourWireMode
+*
+* \param device is structure pointer to the AD9528 data structure containing
+*  settings
+* \param spi is a structure pointer to AD9528 SPI controller settings - not 
+*  platform hardware SPI settings
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+*/
+int32_t adi_ad9528_SpiCfgGet(adi_ad9528_Device_t *device, adi_ad9528_SpiSettings_t *spi);
+
+/**
+* \brief Initializes the AD9528 by writing all SPI registers
+*
+* Initializes the AD9528 using the values passed in through the 
+* adi_ad9528_Init_t structure.
+*
+* <B>Dependencies</B>
+* - All parameters in init structure
+* - device->common.devHalInfo
+*
+* \param device is structure pointer to AD9528 clock device structure
+* \param init is a structure pointer to the AD9528 initialization settings
+*  structure
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter
+*  check
+*/
+int32_t adi_ad9528_Initialize(adi_ad9528_Device_t *device, adi_ad9528_Init_t *init);
+
+/**
+* \brief Send a SPI message to request a SYSREF pulse or continuous SYSREF from
+*  the AD9528
+*
+* Requests a SYSREF from the AD9528.  It will use whatever settings for SYSREF
+* that are current configured in the AD9528.  This could be a single pulse,
+* multiple pulses, or continuous pulses.
+*
+* <B>Dependencies</B>
+* - device->common.devHalInfo
+*
+* \param device is structure pointer to AD9528 clock device structure
+* \param enableSYSREF If NSHOT SYSREF mode, this parameter is ignored.  If 
+*  PRBS/CONTINUOUS SYSREF mode, 1= enable SYSREF, 0= disable SYSREF.
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+*/
+int32_t adi_ad9528_SysrefRequest(adi_ad9528_Device_t *device, uint8_t enableSYSREF);
+
+/**
+* \brief Update the Sysref settings for an AD9528 device by writing to the 
+*  corresponding configuration registers
+*
+* <B>Dependencies</B>
+* - device->common.devHalInfo
+*
+* \param device is structure pointer to AD9528 clock device structure
+* \param sysrefSettings is structure pointer to a Sysref settings device 
+*  structure containing updated settings
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action
+*  required
+*/
+int32_t adi_ad9528_SysrefSetup(adi_ad9528_Device_t *device, adi_ad9528_SysrefSettings_t *sysrefSettings);
+
+/**
+* \brief Update the AD9528 clock outputs that are enabled. The function probes
+*  the AD9528 chip to determine the sysref settings.
+*
+* <B>Dependencies</B>
+* - device->common.devHalInfo
+*
+* \param device is structure pointer to AD9528 clock device structure
+* \param clkEnable Sets which clock outputs are enabled. 
+*  Bit per clock output. bit0 = out0, etc.
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+*/
+int32_t adi_ad9528_ClockOutputsEnable(adi_ad9528_Device_t *device, uint16_t clkEnable);
+
+/**
+* \brief Waits for PLL1 and PLL2 to lock and the REFA and VCXO clocks to be 
+*  present
+*
+* Waits until Reference A clock and VCXO clock input to be detected (present),
+* and PLL1 and PLL2 to lock.  Will timeout after 1 second and return 
+* AD9528_FAILED.
+* If clock are detected and PLLs locked, returns ADI_COMMON_ACT_NO_ACTION.
+* Will read the AD9528 status prior.
+*
+* <B>Dependencies</B>
+* - device->common.devHalInfo
+*
+* \param device is structure pointer to AD9528 clock device structure
+* \param timeout_ms the amount of time to wait for a successful lock before 
+*  returning
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+* \retval ADI_AD9528_ACT_PLL_LOCK_FAILED Recover action for a failed PLL lock
+*/
+int32_t adi_ad9528_PllLockDebounce(adi_ad9528_Device_t *device, uint32_t timeout_ms);
+
+/**
+* \brief Reads the Lock Status register of the AD9528
+*
+* This function will read register 0x508 and load that value into the address 
+* pointed to by status parameter.
+*
+* <B>Dependencies</B>
+* - device->common.devHalInfo
+*
+* \param device is structure pointer to AD9528 clock device structure
+* \param status a pointer to a uint8_t that will be loaded with the value of 
+*  register address 0x508
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action 
+*  required
+*/
+int32_t adi_ad9528_PllLockStatusGet(adi_ad9528_Device_t *device, uint8_t *status);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ADI_AD9528_H_ */

driver/rfic/rf/adrv9025/c_src/devices/ad9528/public/include/adi_ad9528_error.h

@@ -0,0 +1,33 @@
+/**
+* \file adi_ad9528_error.h
+* \brief AD9528 ERROR header file
+*
+* Extension of adi_common_error
+*
+* API Version: 6.4.0.14
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADI API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADI_AD9528_ERROR_H_
+#define _ADI_AD9528_ERROR_H_
+
+#include "adi_common_error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Extending Common error for AD9528 */
+#define ADI_AD9528_ERR_PLL_LOCK_FAILED           0x2001
+#define ADI_AD9528_ERR_NUMBER_OF_ERRORS          0x2002
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ADI_AD9528_ERROR_H_ */

driver/rfic/rf/adrv9025/c_src/devices/ad9528/public/include/adi_ad9528_hal.h

@@ -0,0 +1,30 @@
+/**
+* \file adi_ad9528_hal.h
+* \brief Contains prototypes and macro definitions for Private ADI HAL wrapper
+*        functions implemented in adi_ad9528_hal.c
+*/
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+#ifndef _ADI_AD9528_HAL_H_
+#define _ADI_AD9528_HAL_H_
+
+#include <stdint.h>
+#include <stddef.h>
+
+#include "adi_ad9528_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int32_t adi_ad9528_SpiByteWrite(adi_ad9528_Device_t *device, uint16_t addr, uint8_t data);
+int32_t adi_ad9528_SpiByteRead(adi_ad9528_Device_t *device, uint16_t addr, uint8_t *data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ADI_AD9528_HAL_H_ */

driver/rfic/rf/adrv9025/c_src/devices/ad9528/public/include/adi_ad9528_types.h

@@ -0,0 +1,250 @@
+/**
+ * \file adi_ad9528_types.h
+ * \brief Contains enum and structure data types for all AD9528 function calls
+ */
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+#ifndef _ADI_AD9528_TYPES_H_
+#define _ADI_AD9528_TYPES_H_
+
+#include <stdint.h>
+#include "adi_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ADI_AD9528_NUM_OUTPUT_CHANNELS  14
+#define ADI_AD9528_NUMBER_SPI_RETRY     200
+#define ADI_AD9528_PLL_DEBOUNCE_TIME_MS 50
+#define ADI_AD9528_PLL_DEBOUNCE_INT_MS  10
+#define ADI_AD9528_REG508_STATUS_MASK   0xEF /* Mask bit 4: Both REFA/REFB missing since this is not set in lockStatusExpectedValue */
+
+/**
+ * \brief Enum to select what source outputs from each AD9528 output channel
+ */
+typedef enum adi_ad9528_OutSourceSel
+{
+    ADI_AD9528_CHANNEL_DIV      = 0,  /*!< Channel divisor output select */
+    ADI_AD9528_PLL1_OUTPUT      = 1,  /*!< VCXO output select */
+    ADI_AD9528_SYSREF           = 2,  /*!< SYSREF output select */
+    ADI_AD9528_INV_PLL1_OUTPUT  = 5   /*!< VCXO inverted output select */
+
+} adi_ad9528_OutSourceSel_e;
+
+/**
+ * \brief Enum to select what output buffer standard is used for the clock 
+ *  outputs
+ */
+typedef enum adi_ad9528_OutBufferControl
+{
+    ADI_AD9528_LVDS,        /*!< LVDS output buffer select */
+    ADI_AD9528_LVDS_BOOST,  /*!< LVDS boost output buffer select */
+    ADI_AD9528_HSTL         /*!< HSTL output buffer select */
+
+} adi_ad9528_OutBufferControl_e;
+
+/**
+ * \brief Enum to select the clock input buffer mode
+ */
+typedef enum adi_ad9528_RefBuffer
+{
+    ADI_AD9528_DISABLED,               /*!< Disabled input buffer select */
+    ADI_AD9528_SINGLE_ENDED,           /*!< Single-ended input buffer select */
+    ADI_AD9528_NEG_SINGLE_ENDED,       /*!< Negative single-ended input buffer select */
+    ADI_AD9528_DIFFERENTIAL            /*!< Differential input buffer select */
+
+} adi_ad9528_RefBuffer_e;
+
+/**
+ * \brief Enum to select the SYSREF output source
+ */
+typedef enum adi_ad9528_SysrefSourceSelection
+{
+    ADI_AD9528_EXTERNAL,        /*!< External SYSREF source select */
+    ADI_AD9528_EXT_RESAMPLED,   /*!< External resampled SYSREF source select */
+    ADI_AD9528_INTERNAL         /*!< Internal SYSREF source select */
+
+} adi_ad9528_SysrefSourceSelection_e;
+
+/**
+ * \brief Enum to choose the SYSREF pattern mode
+ */
+typedef enum adi_ad9528_SysrefPatternMode
+{
+    ADI_AD9528_NSHOT,       /*!< 'N' shot SYSREF pattern mode select */
+    ADI_AD9528_CONTINUOUS,  /*!< Continuous SYSREF pattern mode select */
+    ADI_AD9528_PRBS,        /*!< PRBS SYSREF pattern mode select */
+    ADI_AD9528_STOP         /*!< Stop select */
+
+} adi_ad9528_SysrefPatternMode_e;
+
+/**
+ * \brief Enum to select the SYSREF input pin mode
+ */
+typedef enum adi_ad9528_SysrefPinEdgeMode
+{
+    ADI_AD9528_LEVEL_ACTIVE_HIGH,   /*!< Active high level input mode select */
+    ADI_AD9528_LEVEL_ACTIVE_LOW,    /*!< Active low level input mode select */
+    ADI_AD9528_RISING_EDGE,         /*!< Rising edge input mode select */
+    ADI_AD9528_FALLING_EDGE         /*!< Falling edge input mode select */
+
+} adi_ad9528_SysrefPinEdgeMode_e;
+
+/**
+ * \brief Enum to select the SYSREF output number of pulses for NSHOT mode
+ */
+typedef enum adi_ad9528_SysrefNshotMode
+{
+    ADI_AD9528_ONE_PULSE = 0,          /*!< Single (1) pulse NSHOT mode select */
+    ADI_AD9528_TWO_PULSES = 2,         /*!< Two (2) pulse NSHOT mode select */
+    ADI_AD9528_FOUR_PULSES = 3,        /*!< Four (4) pulse NSHOT mode select */
+    ADI_AD9528_SIX_PULSES = 4,         /*!< Six (6) pulse NSHOT mode select */
+    ADI_AD9528_EIGHT_PULSES = 5        /*!< Eight (8) pulse NSHOT mode select */
+
+} adi_ad9528_SysrefNshotMode_e;
+
+/**
+ * \brief Enum to select how a SYSREF is requested
+ */
+typedef enum adi_ad9528_SysrefRequestMethod
+{
+    ADI_AD9528_SPI,     /*!< SPI mode request for SYSREF */
+    ADI_AD9528_PIN      /*!< Pin mode request for SYSREF */
+
+} adi_ad9528_SysrefRequestMethod_e;
+
+/**
+* \brief Structure for use in adi_ad9528_InitStructConfig function
+*/
+typedef struct adi_ad9528_ClockFrequencySettings
+{
+    uint32_t vcxoFrequency_Hz;
+    uint32_t refAFrequency_Hz;
+    uint32_t outputClock_Hz[ADI_AD9528_NUM_OUTPUT_CHANNELS];
+    adi_ad9528_OutSourceSel_e outSource[ADI_AD9528_NUM_OUTPUT_CHANNELS];
+
+} adi_ad9528_ClockFrequencySettings_t;
+
+/**
+ * \brief Structure to hold AD9528 PLL1 settings
+ */
+typedef struct adi_ad9528_Pll1Settings
+{
+    uint32_t refA_Frequency_Hz;
+    uint16_t refA_Divider;
+    adi_ad9528_RefBuffer_e refA_bufferCtrl;
+
+    uint32_t refB_Frequency_Hz;
+    uint16_t refB_Divider;
+    adi_ad9528_RefBuffer_e refB_bufferCtrl;
+
+    uint32_t vcxo_Frequency_Hz;
+    adi_ad9528_RefBuffer_e vcxoBufferCtrl;
+
+    uint16_t nDividerPll1;
+
+} adi_ad9528_Pll1Settings_t;
+
+/**
+ * \brief Data structure to hold SPI settings for all system device types
+ */
+typedef struct adi_ad9528_SpiSettings
+{
+    uint8_t msbFirst;               /*!< 1 = MSBFirst, 0 = LSBFirst */
+    uint8_t autoIncAddrUp;          /*!< Not implemented. For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr = addr-1 */
+    uint8_t fourWireMode;           /*!< 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode. */
+
+} adi_ad9528_SpiSettings_t;
+
+/**
+ * \brief Structure to hold AD9528 PLL2 settings
+ */
+typedef struct adi_ad9528_Pll2Settings
+{
+    uint8_t rfDivider;      /*!< VCO divider: Valid range (3,4,5) */
+    uint16_t n2Divider;     /*!< PLL2 N2 Divider */
+    uint8_t r1Divider;      /*! PLL2 R1 Divider */
+    uint8_t totalNdiv;      /*!< NDiv = 4*Bdiv + Adiv //Bdiv valid range (3 to 63), Adiv valid range (0-3) */
+
+} adi_ad9528_Pll2Settings_t;
+
+/**
+ * \brief Structure to hold AD9528 Output Clock settings
+ */
+typedef struct adi_ad9528_OutputSettings
+{
+    uint16_t outPowerDown;                                                          /*!< bit per output, if 1 power down that output */
+    adi_ad9528_OutSourceSel_e outSource[ADI_AD9528_NUM_OUTPUT_CHANNELS];            /*!< CHANNEL_DIV, PLL1_OUTPUT, SYSREF, INV_PLL1_OUTPUT */
+    adi_ad9528_OutBufferControl_e outBufferCtrl[ADI_AD9528_NUM_OUTPUT_CHANNELS];    /*!< LVDS, LVDS_BOOST, HSTL */
+    uint8_t outAnalogDelay[ADI_AD9528_NUM_OUTPUT_CHANNELS];                         /*!< bit[4] enables fine analog delay & adds 600ps delay. bits[3:0] are find delay steps, 31 ps each */
+    uint8_t outDigitalDelay[ADI_AD9528_NUM_OUTPUT_CHANNELS];                        /*!< 6 bits, 1/2 clock resolution @ channel div input frequency */
+    uint16_t outChannelDiv[ADI_AD9528_NUM_OUTPUT_CHANNELS];                          /*!< 8 bit channel divider. Valid values 1-256. Register written with (value - 1)  */
+    uint32_t outFrequency_Hz[ADI_AD9528_NUM_OUTPUT_CHANNELS];                       /*!< output clock frequency per clock output */
+
+} adi_ad9528_OutputSettings_t;
+
+/**
+* \brief Structure to hold AD9528 SYSREF output settings
+*/
+typedef struct adi_ad9528_SysrefSettings
+{
+    adi_ad9528_SysrefRequestMethod_e sysrefRequestMethod;
+    adi_ad9528_SysrefSourceSelection_e sysrefSource;
+    adi_ad9528_SysrefPinEdgeMode_e sysrefPinEdgeMode;
+    adi_ad9528_RefBuffer_e sysrefPinBufferMode;
+    adi_ad9528_SysrefPatternMode_e sysrefPatternMode;
+    adi_ad9528_SysrefNshotMode_e sysrefNshotMode;
+    uint16_t sysrefDivide;
+
+} adi_ad9528_SysrefSettings_t;
+
+/**
+ * \brief Structure to hold AD9528 run time state information
+ */
+typedef struct adi_ad9528_Info
+{
+    /* uint8_t pllLocked;*/
+    /* uint8_t programmed;*/
+    uint8_t initialized;
+    uint8_t swModeEnabled;
+    uint32_t deviceRevision;
+    uint32_t deviceId;
+    adi_ad9528_SysrefPatternMode_e sysrefPatternMode;
+    uint8_t sysrefCtrlReg403Init; /*!< Initialize sets this to value that SPI reg x403 was initialized to for SYSREF Control, later used by SysrefRequest() */
+
+} adi_ad9528_Info_t;
+
+/**
+* \brief Structure to hold AD9528 init settings
+*/
+typedef struct adi_ad9528_Init
+{
+    adi_ad9528_SpiSettings_t    spiSettings;
+    adi_ad9528_Pll1Settings_t   pll1Settings;
+    adi_ad9528_Pll2Settings_t   pll2Settings;
+    adi_ad9528_OutputSettings_t outputSettings;
+    adi_ad9528_SysrefSettings_t sysrefSettings;
+    uint32_t                    pllLockTimeout_ms; /*!<If non-zero, adi_ad9528_Initialize will block waiting for PLLs to lock or timeout occurs. If set to zero, PLL lock status is not checked. */
+    uint32_t                    deviceId;
+
+} adi_ad9528_Init_t;
+
+/**
+ * \brief Structure to hold AD9528 device settings
+ */
+typedef struct adi_ad9528_Device
+{
+    adi_common_Device_t      common; /*!< Common layer structure */ 
+    adi_ad9528_Info_t       devStateInfo;   /*!< AD9528 run time state information */
+    uint8_t lockStatusExpectedValue;        /*!< Stored during initialization based on config and used to determine correct PLLs are locked */
+} adi_ad9528_Device_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ADI_AD9528_TYPES_H_ */

driver/rfic/rf/adrv9025/c_src/devices/ad9528/public/include/adi_ad9528_user.h

@@ -0,0 +1,44 @@
+/**
+* \file adi_AD9528_user.h
+* \brief Contains top level AD9528 related function prototypes for
+*        adi_ad9528.c
+*
+* AD9528 API Version: $ADI_AD9528_API_VERSION$
+*/
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the AD9528 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADI_AD9528_USER_H_
+#define _ADI_AD9528_USER_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *****************************************
+ * AD9528 Interface Macros
+ ******************************************
+ */
+
+#ifndef ADI_AD9528_VERBOSE
+#define ADI_AD9528_VERBOSE 1                           /*Use strings 0 not use, 1 use */
+#endif /* !ADI_AD9528_VERBOSE */
+
+#ifndef ADI_AD9528_VARIABLE_USAGE
+#define ADI_AD9528_VARIABLE_USAGE 1                    /*Use strings 0 not use, 1 use */
+#endif /* !ADI_AD9528_VARIABLE_USAGE */
+
+#ifndef ADI_AD9528_LOGGING
+#define ADI_AD9528_LOGGING 0xFF                        /*LogLevel Set to API, Messages, Warnings, Error*/
+#endif /* !ADI_AD9528_LOGGING */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ADI_AD9528_USER_H_ */

driver/rfic/rf/adrv9025/c_src/devices/ad9528/public/include/adi_ad9528_utilities.h

@@ -0,0 +1,110 @@
+/**
+* \file adi_ad9528_utilities.h
+* \brief Contains prototypes and macro definitions for utility helper
+*        functions implemented in adi_ad9528_utilities.c
+*
+*/
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+#ifndef _ADI_AD9528_UTILITIES_H_
+#define _ADI_AD9528_UTILITIES_H_
+
+#include "adi_ad9528.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __GNUC__
+#define GET_TOKEN(x, n, ret, line, int32Ptr, int32) \
+        {(ret) = sscanf((line), " <" #n "=%u>", (int32Ptr));\
+        if ((ret) == 1) {\
+                x.n = (int32);\
+                continue;\
+        }}
+
+#define GET_TOKEN_CAST(x, n, ca, ret, line, int32Ptr, int32) \
+        {(ret) = sscanf((line), " <" #n "=%u>", (int32Ptr));\
+        if ((ret) == 1) {\
+                x.n = (ca)(int32);\
+                continue;\
+        }}
+#else
+#define GET_TOKEN(x, n, ret, line, int32Ptr, int32) \
+        {(ret) = sscanf_s((line), " <" #n "=%u>", (int32Ptr));\
+        if ((ret) == 1) {\
+                x.n = (int32);\
+                continue;\
+        }}
+
+#define GET_TOKEN_CAST(x, n, ca, ret, line, int32Ptr, int32) \
+        {(ret) = sscanf_s((line), " <" #n "=%u>", (int32Ptr));\
+        if ((ret) == 1) {\
+                x.n = (ca)(int32);\
+                continue;\
+        }}
+#endif
+
+#ifdef __GNUC__
+#define sscanf_s sscanf
+#endif
+    
+#define ADI_AD9528_MAX_BUFFER 250
+
+/**
+* \brief Utility function that will initialize an AD9528 using the 
+*  Configuration Wizard 
+*
+* This reads the configuration file to scan for AD9528 settings. It 
+* constructs an AD9528 init structure
+* and calls the AD9528 API Initialize function
+*
+* <B>Dependencies</B>
+* - None
+*
+* \param configFile The absolute filepath of the Configuration File
+* \param init Pointer to the AD9528 init device structure to initialize
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no 
+*  action required
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter
+*  check
+*/
+int32_t adi_ad9528_ConfigFileLoad(const char *configFile, adi_ad9528_Init_t *init);
+
+/**
+* \brief Helper function for ADI transceiver eval boards to init the AD9528
+*  data structure
+*
+* This function inits the AD9528 device data structure with defaults that
+* are known to work with the ADI AD9369 and AD9370 evaluation boards.  
+* NOTE: This function will modify the contents of the AD9528 device data 
+* structure.
+*
+* <B>Dependencies</B>
+* - device->common.devHalInfo
+*
+* \param device Pointer to the AD9528 device data structure to initialize
+* \param clockFrequencies The adi_ad9528_ClockFrequencySettings_t data structure.
+*  vcxoFrequency_Hz The VCXO frequency that is connected to the AD9528
+*  refAFrequency_Hz The reference clock frequency being input into 
+*  the AD9528 REFCLK A input
+*  outputDeviceClock_Hz Desired output clock frequency to the FPGA 
+*  and transceiver device
+* \param init Point to the adi_ad9528_Init_t data structure.
+*
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no 
+*  action required
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter 
+*  check
+*/
+int32_t adi_ad9528_InitStructConfig(adi_ad9528_Device_t *device, adi_ad9528_ClockFrequencySettings_t *clockFrequencies, adi_ad9528_Init_t *init);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ADI_AD9528_UTILITIES_H_ */

driver/rfic/rf/adrv9025/c_src/devices/ad9528/public/src/adi_ad9528.c

@@ -0,0 +1,880 @@
+/**
+ * \file adi_ad9528.c
+ * \brief Contains source code for configuring and initializing AD9528 clock device
+ */
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+#include "adi_ad9528_user.h"
+#include <stdint.h>
+#include "adi_ad9528_hal.h"
+#include "adi_ad9528.h"
+#include "../../private/include/adi_ad9528_registers.h"
+#include "adi_common.h"
+#include "adi_ad9528_error.h"
+#include "math.h"
+
+#if (0)
+#define DEBUG_AD9025_REG(a, b) (printf("#reg%04X = 0x%02X  @%03d\n", a, b, __LINE__))
+#else
+#define DEBUG_AD9025_REG(a, b) 
+#endif
+
+int32_t adi_ad9528_HwOpen(adi_ad9528_Device_t *device)
+{   
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+    adi_common_LogLevelSet(&device->common, ADI_AD9528_LOGGING);
+    if (device->common.error.errCode != ADI_COMMON_HAL_OK)
+    {
+        switch (device->common.error.errCode)
+        {
+            case ADI_COMMON_HAL_LOGGING_FAIL:
+                ADI_ERROR_REPORT(&device->common,
+                                 ADI_COMMON_ERRSRC_ADI_HAL,
+                                 device->common.error.errCode,
+                                 ADI_COMMON_ACT_WARN_RESET_LOG,
+                                 NULL,
+                                 "Logging error");
+                ADI_ERROR_RETURN(device->common.error.newAction);
+            case ADI_COMMON_HAL_LOGGGING_LEVEL_FAIL:
+                ADI_ERROR_REPORT(&device->common,
+                                 ADI_COMMON_ERRSRC_ADI_HAL,
+                                 device->common.error.errCode,
+                                 ADI_COMMON_ACT_WARN_RESET_LOG,
+                                 NULL,
+                                 "Logging Level error");
+                ADI_ERROR_RETURN(device->common.error.newAction);
+            case ADI_COMMON_HAL_GEN_SW: /* fall through */
+            default:
+                ADI_ERROR_REPORT(&device->common,
+                                 ADI_COMMON_ERRSRC_ADI_HAL,
+                                 device->common.error.errCode,
+                                 ADI_COMMON_ACT_ERR_CHECK_PARAM,
+                                 NULL,
+                                 "Param error");
+                ADI_ERROR_RETURN(device->common.error.newAction);
+        }
+    }
+
+    recoveryAction = adi_common_hal_HwOpen(&device->common);
+    if (recoveryAction != ADI_COMMON_ACT_NO_ACTION)
+    {
+        switch (device->common.error.errCode)
+        {
+            case ADI_COMMON_HAL_SPI_FAIL:
+                ADI_ERROR_REPORT(&device->common,
+                                 ADI_COMMON_ERRSRC_ADI_HAL,
+                                 device->common.error.errCode,
+                                 ADI_COMMON_ACT_ERR_RESET_INTERFACE,
+                                 NULL,
+                                 "SPI error");
+                ADI_ERROR_RETURN(device->common.error.newAction);
+            default:
+                ADI_ERROR_REPORT(&device->common,
+                                 ADI_COMMON_ERRSRC_ADI_HAL,
+                                 device->common.error.errCode,
+                                 ADI_COMMON_ACT_ERR_CHECK_PARAM,
+                                 NULL,
+                                 "Param error");
+                ADI_ERROR_RETURN(device->common.error.newAction);
+        }
+    }
+
+    return (device->common.error.newAction);
+}
+
+int32_t adi_ad9528_HwClose(adi_ad9528_Device_t *device)
+{    
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+    recoveryAction = adi_common_hal_HwClose(&device->common);
+    if (device->common.error.errCode != ADI_COMMON_HAL_OK)
+    {
+        switch (device->common.error.errCode)
+        {
+            case ADI_COMMON_HAL_SPI_FAIL:
+                ADI_ERROR_REPORT(&device->common,
+                                 ADI_COMMON_ERRSRC_ADI_HAL,
+                                 device->common.error.errCode,
+                                 recoveryAction,
+                                 NULL,
+                                 "SPI error");
+                ADI_ERROR_RETURN(device->common.error.newAction);
+            default:
+                ADI_ERROR_REPORT(&device->common,
+                                 ADI_COMMON_ERRSRC_ADI_HAL,
+                                 device->common.error.errCode,
+                                 ADI_COMMON_ACT_ERR_CHECK_PARAM,
+                                 NULL,
+                                 "Param error");
+                ADI_ERROR_RETURN(device->common.error.newAction);
+        }
+    }
+
+    return (device->common.error.newAction);
+}
+
+int32_t adi_ad9528_ClockRatesRead(adi_ad9528_Device_t *device, uint32_t *outputClock_Hz)
+{
+    UNUSED_PARA(device);
+    UNUSED_PARA(outputClock_Hz);
+    return ADI_COMMON_ACT_NO_ACTION;
+} //debug function to help verify data structure is setup correctly.
+
+
+int32_t adi_ad9528_HwReset(adi_ad9528_Device_t *device)
+{
+    /* toggle RESETB on device */
+    int32_t halError = (int32_t)ADI_COMMON_HAL_OK;
+    static const uint8_t RESETB_LEVEL_LOW = 0;
+    static const uint8_t RESETB_LEVEL_HIGH = 1;
+    static const uint8_t RESETB_WAIT_MS = 1;
+
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+    ADI_FUNCTION_ENTRY_LOG(&device->common, ADI_COMMON_LOG_API);
+
+    /* toggle RESETB on device with matching spi chip select index */
+    halError = adi_common_hal_HwReset(&device->common, RESETB_LEVEL_LOW);
+    if (halError != ADI_COMMON_HAL_OK)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API,
+            halError, /* TODO: fix to use a error code from ERRSRC_API */
+            ADI_COMMON_ACT_ERR_RESET_MODULE,
+            NULL,
+            "HwReset GPIO error");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    halError = adi_common_hal_Wait_ms(&device->common, RESETB_WAIT_MS);
+    if (halError != ADI_COMMON_HAL_OK)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API,
+            halError, /* TODO: fix to use a error code from ERRSRC_API */
+            ADI_COMMON_ACT_ERR_RESET_MODULE,
+            NULL,
+            "Timer error");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    halError = adi_common_hal_HwReset(&device->common, RESETB_LEVEL_HIGH);
+    if (halError != ADI_COMMON_HAL_OK)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API,
+            halError, /* TODO: fix to use a error code from ERRSRC_API */
+            ADI_COMMON_ACT_ERR_RESET_MODULE,
+            NULL,
+            "HwReset GPIO error");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    device->devStateInfo.initialized = 0;
+
+    return (device->common.error.newAction);
+}
+
+int32_t adi_ad9528_SpiCfgSet(adi_ad9528_Device_t *device, adi_ad9528_SpiSettings_t* spi)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    uint8_t spiReg = 0;
+
+    /* Check device pointer is not null */
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+    /* Check spi settings is not null */
+    ADI_NULL_PTR_RETURN(&device->common, spi);
+
+#if ADI_AD9528_VERBOSE > 0
+    ADI_FUNCTION_ENTRY_LOG(&device->common, ADI_COMMON_LOG_HAL);
+#endif
+
+    if (spi->msbFirst == 0)
+    {
+        spiReg |= 0x42; /* SPI bit is 1=LSB first */
+    }
+
+    if (spi->autoIncAddrUp > 0)
+    {
+        spiReg |= 0x24;
+    }
+
+    if (spi->fourWireMode > 0)
+    {
+        spiReg |= 0x18;
+    }
+    
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_ADI_SPI_CONFIG_A, spiReg);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_ADI_SPI_CONFIG_A");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    return recoveryAction;
+}
+
+int32_t adi_ad9528_SpiCfgGet(adi_ad9528_Device_t *device, adi_ad9528_SpiSettings_t* spi)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    uint8_t spiReg = 0;
+
+    /* Check device pointer is not null */
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+    /* Check spi settings is not null */
+    ADI_NULL_PTR_RETURN(&device->common, spi);
+
+#if ADI_AD9528_VERBOSE > 0
+    ADI_FUNCTION_ENTRY_LOG(&device->common, ADI_COMMON_LOG_HAL);
+#endif
+
+    recoveryAction = adi_ad9528_SpiByteRead(device, AD9528_ADDR_ADI_SPI_CONFIG_A, &spiReg);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not read register AD9528_ADDR_ADI_SPI_CONFIG_A");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    spi->fourWireMode = (spiReg & 0x10) >> 4;
+    spi->autoIncAddrUp = (spiReg & 0x20) >> 5;
+    spi->msbFirst = 0x0001 - ((spiReg & 0x40) >> 6);
+
+    return ADI_COMMON_ACT_NO_ACTION;
+}
+
+int32_t adi_ad9528_Initialize(adi_ad9528_Device_t *device, adi_ad9528_Init_t *init) 
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+    uint8_t pll2_Adiv = init->pll2Settings.totalNdiv % 4;
+    uint8_t pll2_Bdiv = init->pll2Settings.totalNdiv / 4;
+    uint8_t reg108 = 0;
+    uint8_t reg109 = 0;
+    uint8_t i = 0;
+    uint8_t j = 0;
+        
+    /* Range checks */
+
+    /* Check device pointer is not null */
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+    /* Check spi settings is not null */
+    ADI_NULL_PTR_RETURN(&device->common, init);
+    
+    /* refA_Divider is a 10-bit bitfield */
+    if (init->pll1Settings.refA_Divider > 1023)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->pll1Settings.refA_Divider, "AD9528 refA_Divider out of range");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+    
+    /* refB_Divider is a 10-bit bitfield */
+    if (init->pll1Settings.refB_Divider > 1023)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->pll1Settings.refB_Divider, "AD9528 refB_Divider out of range");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+    
+    /* nDividerPll1 is a 10-bit bitfield */
+    if (init->pll1Settings.nDividerPll1 > 1023)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->pll1Settings.nDividerPll1, "AD9528 nDividerPll1 out of range");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    /* cal value must equal (RF * N2) */
+    if (init->pll2Settings.totalNdiv != (init->pll2Settings.n2Divider * init->pll2Settings.rfDivider))
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "totalNDiv (VCO Cal Divider) value must match RF div * N2 div");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    if(init->pll2Settings.totalNdiv == 18 || init->pll2Settings.totalNdiv == 27)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "Illegal VCO Cal divider value (if B < 7 only specific A values are allowed)");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+    
+    /*  n2Divider valid range is 1-256  */
+    if (init->pll2Settings.n2Divider > 256 || init->pll2Settings.n2Divider < 1)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->pll2Settings.n2Divider, "AD9528 n2Divider out of range");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    /*  r1Divider valid range is 1-31  */
+    if (init->pll2Settings.r1Divider > 31 || init->pll2Settings.r1Divider < 1)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->pll2Settings.r1Divider, "AD9528 r1Divider out of range");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    if (pll2_Adiv > 3) {  //A div valid range (0 to 3)
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->pll2Settings.totalNdiv, "AD9528 PLL2 A Divider out of range (0 to 3)");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    if (pll2_Bdiv < 4 || pll2_Bdiv > 63) {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->pll2Settings.totalNdiv, "AD9528 PLL2 B Divider out of range (3 to 63)");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    if (init->pll2Settings.rfDivider < 3 || init->pll2Settings.rfDivider > 5) {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->pll2Settings.rfDivider, "AD9528 PLL2 RF Divider out of range (3,4, or 5)");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+    
+    for (i = 0; i < 14; i = i + 1)
+    {
+        /*  outChannelDiv valid range is 1-256  */
+        if (init->outputSettings.outChannelDiv[i] > 256 || init->outputSettings.outChannelDiv[i] < 1)
+        {
+            ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->outputSettings.outChannelDiv, "An AD9528 outChannelDiv is out of range");
+            ADI_ERROR_RETURN(device->common.error.newAction);
+        }
+        
+        /*  sanity check on Analog Delay. If a delay is requested the enable needs to be set */
+        if (((init->outputSettings.outAnalogDelay[i] & 0x0F) > 0) && ((init->outputSettings.outAnalogDelay[i] & 0x10) != 0x10))
+        {
+            ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, init->outputSettings.outAnalogDelay, "An Analog Delay is requested but enable is not set");
+            ADI_ERROR_RETURN(device->common.error.newAction);
+        }
+    }
+    
+#if ADI_AD9528_VERBOSE > 0
+    ADI_FUNCTION_ENTRY_LOG(&device->common, ADI_COMMON_LOG_HAL);
+#endif    
+
+    adi_ad9528_SpiCfgSet(device, &init->spiSettings);
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    /**********************************************************************
+    * Configure PLL1
+    **********************************************************************/
+    /*REF A div[7:0]*/
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_REF_A_DIVIDER_LSB, (init->pll1Settings.refA_Divider & 0xFF));
+    DEBUG_AD9025_REG(AD9528_ADDR_REF_A_DIVIDER_LSB, (init->pll1Settings.refA_Divider & 0xFF));
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_REF_A_DIVIDER_LSB");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    /*REF A div[9:8]*/
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_REF_A_DIVIDER_MSB, ((init->pll1Settings.refA_Divider >> 8) & 0x03));
+    DEBUG_AD9025_REG(AD9528_ADDR_REF_A_DIVIDER_MSB, ((init->pll1Settings.refA_Divider >> 8) & 0x03));
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_REF_A_DIVIDER_MSB");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    /*REF B div[7:0]*/
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_REF_B_DIVIDER_LSB, (init->pll1Settings.refB_Divider & 0xFF));
+    DEBUG_AD9025_REG(AD9528_ADDR_REF_B_DIVIDER_LSB, (init->pll1Settings.refB_Divider & 0xFF));
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_REF_B_DIVIDER_LSB");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    /*REF B div[9:8]*/
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_REF_B_DIVIDER_MSB, ((init->pll1Settings.refB_Divider >> 8) & 0x03));
+    DEBUG_AD9025_REG(AD9528_ADDR_REF_B_DIVIDER_MSB, ((init->pll1Settings.refB_Divider >> 8) & 0x03));
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_REF_B_DIVIDER_MSB");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    /*PLL1 N div[7:0]*/
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL1_N_DIV_LSB, (init->pll1Settings.nDividerPll1 & 0xFF));
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL1_N_DIV_LSB, (init->pll1Settings.nDividerPll1 & 0xFF));
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL1_N_DIV_LSB");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    /* PLL1 N div[9:8] */
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL1_N_DIV_MSB, ((init->pll1Settings.nDividerPll1 >> 8) & 0x03));
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL1_N_DIV_MSB, ((init->pll1Settings.nDividerPll1 >> 8) & 0x03));
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL1_N_DIV_MSB");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    /* PLL1 Charge Pump control 1*/
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL1_CHARGEPUMP,   0x0C); // daya debug 0x0A);
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL1_CHARGEPUMP,   0x0C); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL1_CHARGEPUMP");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    /* PLL1 Charge Pump control 2*/
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL1_CP_CTRL2, 0x03); // daya debug 0x02);
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL1_CP_CTRL2, 0x02);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL1_CP_CTRL2");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    switch (init->pll1Settings.refA_bufferCtrl)
+    {
+        case ADI_AD9528_DISABLED:            reg108 &= ~0x28; reg109 &= ~0x01; break; /*clear all REFA enable bits*/
+        case ADI_AD9528_SINGLE_ENDED:        reg108 |= 0x08; reg109 &= ~0x01; break; /*Set REFA receiver enable, clear REFA SE negative input enable*/
+        case ADI_AD9528_NEG_SINGLE_ENDED:    reg108 |= 0x08; reg108 &= ~0x10; reg109 |= 0x01; break; /*Disable REFA diff receiver, enable REFA receiver and use negative REFA input*/
+        // case ADI_AD9528_DIFFERENTIAL:        reg108 |= 0x28; reg109 &= ~0x01; break; // daya debug
+        case ADI_AD9528_DIFFERENTIAL:        reg108 = 0x28; reg109 = 0x02; break;
+        default:                             reg108 |= 0x08; reg109 &= ~0x01; break; /*default to single ended case*/
+    }
+    switch (init->pll1Settings.refB_bufferCtrl) {
+        case ADI_AD9528_DISABLED:            reg108 &= ~0x50; reg109 &= ~0x02; break; /*clear all REFB enable bits*/
+        case ADI_AD9528_SINGLE_ENDED:        reg108 |= 0x10; reg109 &= ~0x02; break; /*Set REFB receiver enable, clear REFB SE negative input enable*/
+        case ADI_AD9528_NEG_SINGLE_ENDED:    reg108 |= 0x10; reg108 &= ~0x40; reg109 |= 0x02; break; /*Disable REFB diff receiver, enable REFB receiver and use negative REFB input*/
+        case ADI_AD9528_DIFFERENTIAL:        reg108 |= 0x50; reg109 &= ~0x02; break;
+        default:                            reg108 |= 0x10; reg109 &= ~0x02; break; /*default to single ended case*/
+    }
+    switch (init->pll1Settings.vcxoBufferCtrl) {
+        case ADI_AD9528_DISABLED:            reg108 &= ~0x03; reg108 |= 0x04; break; /*power down VCXO input*/
+        case ADI_AD9528_SINGLE_ENDED:        reg108 &= ~0x07; break; /*Clear VCXO receiver power down, defaults to Single ended mode*/
+        case ADI_AD9528_NEG_SINGLE_ENDED:    reg108 &= ~0x07; reg108 |= 0x02; break; /*Clear VCXO power down, enable Negative single ended mode[1]*/
+        case ADI_AD9528_DIFFERENTIAL:        reg108 &= ~0x07; reg108 |= 0x01; break; /*Clear VCXO power down, enable differential input buffer[0]*/
+        default:                            reg108 &= ~0x07; break; /*default to positive single ended case*/
+    }
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_INPUT_RECEIVERS1, reg108);
+    DEBUG_AD9025_REG(AD9528_ADDR_INPUT_RECEIVERS1, reg108);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_INPUT_RECEIVERS1");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_INPUT_RECEIVERS2, reg109);
+    DEBUG_AD9025_REG(AD9528_ADDR_INPUT_RECEIVERS2, reg109);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_INPUT_RECEIVERS2");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_INPUT_RECEIVERS3, 0x06); // daya debug 0x02);
+    DEBUG_AD9025_REG(AD9528_ADDR_INPUT_RECEIVERS3, 0x02);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_INPUT_RECEIVERS3");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL1_FASTLOCK, 0x00);
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL1_FASTLOCK, 0x00);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL1_FASTLOCK");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    /**********************************************************************
+    * Configure PLL2
+    **********************************************************************/
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_CHARGEPUMP, 0xE6); /*PLL2 Charge Pump[7:0]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL2_CHARGEPUMP, 0xE6);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_CHARGEPUMP");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_N_DIV, ((pll2_Adiv & 0x3) << 6) | (pll2_Bdiv & 0x3F)); /*PLL2 A and B divider*/
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL2_N_DIV, ((pll2_Adiv & 0x3) << 6) | (pll2_Bdiv & 0x3F));    
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_N_DIV");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_CTRL, 0x03); /*PLL2 control*/
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL2_CTRL, 0x03);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_CTRL");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_VCO_DIV, init->pll2Settings.rfDivider); /*VCO divider*/
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL2_VCO_DIV, init->pll2Settings.rfDivider);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_VCO_DIV");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_LF_CTRL1, 0x2A); /*PLL2 Loop filter [7:0]*/
+    DEBUG_AD9025_REG( AD9528_ADDR_PLL2_LF_CTRL1, 0x2A);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_LF_CTRL1");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_LF_CTRL2, 0x00); /*PLL2 Loop filter [8]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL2_LF_CTRL2, 0x00); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_LF_CTRL2");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_REPLICA_CHDIV, init->pll2Settings.n2Divider - 1); /*N2 Divider*/
+    DEBUG_AD9025_REG( AD9528_ADDR_PLL2_REPLICA_CHDIV, init->pll2Settings.n2Divider - 1);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_REPLICA_CHDIV");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_REPLICA_DIV_PHASE, 0x00); /*Replica Channel Divider phase*/
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL2_REPLICA_DIV_PHASE, 0x00); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_REPLICA_DIV_PHASE");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_RDIV, init->pll2Settings.r1Divider); /*R1 Divider*/
+    DEBUG_AD9025_REG(AD9528_ADDR_PLL2_RDIV, init->pll2Settings.r1Divider);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_RDIV");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    if (init->pll2Settings.r1Divider > 1)
+    {
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_VCO_CTRL, 0x11); /*Enable R1*/
+        DEBUG_AD9025_REG(AD9528_ADDR_PLL2_VCO_CTRL, 0x11);
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_VCO_CTRL");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+    else
+    {
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_PLL2_VCO_CTRL, 0x01); /*Manual VCO CAL*/
+        DEBUG_AD9025_REG(AD9528_ADDR_PLL2_VCO_CTRL, 0x01);
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_PLL2_VCO_CTRL");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    /**********************************************************************
+    * Configure Output Distribution
+    **********************************************************************/
+    for (i = 0; i<14; i = i + 1) {
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_CH_OUT0_CTRL1 + j, ((init->outputSettings.outSource[i] & 0x7) << 5) | (init->outputSettings.outAnalogDelay[i] & 0x1F));
+        DEBUG_AD9025_REG(AD9528_ADDR_CH_OUT0_CTRL1 + j, ((init->outputSettings.outSource[i] & 0x7) << 5) | (init->outputSettings.outAnalogDelay[i] & 0x1F));
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write an AD9528_ADDR_CH_OUT0_CTRL1 register");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_CH_OUT0_CTRL2 + j, ((init->outputSettings.outBufferCtrl[i] & 0x3) << 6) | (init->outputSettings.outDigitalDelay[i] & 0x3F));
+        DEBUG_AD9025_REG(AD9528_ADDR_CH_OUT0_CTRL2 + j, ((init->outputSettings.outBufferCtrl[i] & 0x3) << 6) | (init->outputSettings.outDigitalDelay[i] & 0x3F));
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write an AD9528_ADDR_CH_OUT0_CTRL2 register");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_CH_OUT0_CHDIV + j, init->outputSettings.outChannelDiv[i] - 1);
+        DEBUG_AD9025_REG(AD9528_ADDR_CH_OUT0_CHDIV + j, init->outputSettings.outChannelDiv[i] - 1);
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write an AD9528_ADDR_CH_OUT0_CHDIV register");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+        j = j + 3;
+    }
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_OUTPUT_SYNC, 0x00); /*Sync outputs*/
+    DEBUG_AD9025_REG(AD9528_ADDR_OUTPUT_SYNC, 0x00); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_OUTPUT_SYNC");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_MASK_SYNC1, 0x00); /*Mask SYNC[7:0]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_MASK_SYNC1, 0x00);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_MASK_SYNC1");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_MASK_SYNC2, 0x00); /*Mask SYNC[13:8]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_MASK_SYNC2, 0x00);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_MASK_SYNC2");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_EN_OUTPUT_PATH_SEL1, 0x00); /*Bypass SYSREF resample [6:0], bit0:Enable VCXO to feed output distribution*/
+    DEBUG_AD9025_REG(AD9528_ADDR_EN_OUTPUT_PATH_SEL1, 0x00);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_EN_OUTPUT_PATH_SEL1");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_EN_OUTPUT_PATH_SEL2, 0x00); /*Bypass SYSREF resample [13:7]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_EN_OUTPUT_PATH_SEL2, 0x00); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_EN_OUTPUT_PATH_SEL2");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    /**********************************************************************
+    * Configure SYSREF operation
+    **********************************************************************/
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSERF_DIV_LSB, init->sysrefSettings.sysrefDivide & 0xFF); /*SYSREF divider [7:0]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_SYSERF_DIV_LSB, init->sysrefSettings.sysrefDivide & 0xFF);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_SYSERF_DIV_LSB");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSERF_DIV_MSB, (init->sysrefSettings.sysrefDivide >> 8) & 0xFF); /*SYSREF divider [7:0]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_SYSERF_DIV_MSB, (init->sysrefSettings.sysrefDivide >> 8) & 0xFF);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_SYSERF_DIV_MSB");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL3, ((init->sysrefSettings.sysrefRequestMethod & 0x1) << 7) |
+        ((init->sysrefSettings.sysrefPinEdgeMode & 0x3) << 5));
+    DEBUG_AD9025_REG( AD9528_ADDR_SYSREF_CTRL3, ((init->sysrefSettings.sysrefRequestMethod & 0x1) << 7) |
+        ((init->sysrefSettings.sysrefPinEdgeMode & 0x3) << 5));
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_SYSREF_CTRL3");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    device->devStateInfo.sysrefCtrlReg403Init = ((init->sysrefSettings.sysrefSource & 0x03) << 6) |
+                                                ((init->sysrefSettings.sysrefPatternMode & 0x3) << 4) |
+                                                ((init->sysrefSettings.sysrefNshotMode & 0x7) << 1);
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL4, device->devStateInfo.sysrefCtrlReg403Init);
+    DEBUG_AD9025_REG(AD9528_ADDR_SYSREF_CTRL4, device->devStateInfo.sysrefCtrlReg403Init);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_SYSREF_CTRL4");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    if (init->sysrefSettings.sysrefPinBufferMode == ADI_AD9528_DISABLED)
+    {
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL5, 0x04); /*power down input buffer for external SYSREF*/
+    }
+    else if (init->sysrefSettings.sysrefPinBufferMode == ADI_AD9528_SINGLE_ENDED)
+    {
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL5, 0x00); /*enable positive singled ended input*/
+    }
+    else if (init->sysrefSettings.sysrefPinBufferMode == ADI_AD9528_NEG_SINGLE_ENDED)
+    {
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL5, 0x02); /*enable negative singled ended input*/
+    }
+    else if (init->sysrefSettings.sysrefPinBufferMode == ADI_AD9528_DIFFERENTIAL)
+    {
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL5, 0x01); /*enable differential input buffer*/
+    }
+    else
+    {
+        recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL5, 0x04); /*power down input buffer for external SYSREF*/
+    }
+    DEBUG_AD9025_REG(AD9528_ADDR_SYSREF_CTRL5, 0x04);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_SYSREF_CTRL5");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    
+    /* Set the info variable */
+    device->devStateInfo.sysrefPatternMode = init->sysrefSettings.sysrefPatternMode;
+
+    /**********************************************************************
+    * Power down control
+    **********************************************************************/
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_POWERDOWN_CTRL, 0x10);/* power up PLL1, PLL2 and output distribution*/
+    DEBUG_AD9025_REG(AD9528_ADDR_POWERDOWN_CTRL, 0x10);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_POWERDOWN_CTRL");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_CH_POWERDOWN1, init->outputSettings.outPowerDown & 0xFF); /*power down out[7:0]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_CH_POWERDOWN1, init->outputSettings.outPowerDown & 0xFF); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_CH_POWERDOWN1");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_CH_POWERDOWN2, ((init->outputSettings.outPowerDown >> 8) & 0x3F)); /*power down out[13:8]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_CH_POWERDOWN2, ((init->outputSettings.outPowerDown >> 8) & 0x3F));
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_CH_POWERDOWN2");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_LDO_ENABLES1, 0xFF); /*LDO enable per output channel [7:0]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_LDO_ENABLES1, 0xFF);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_LDO_ENABLES1");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_LDO_ENABLES2, 0xFF); /*LDO enable per output channel [15:8]*/
+    DEBUG_AD9025_REG(AD9528_ADDR_LDO_ENABLES2, 0xFF);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_LDO_ENABLES2");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_STATUS0_CTRL, 0x01); /*STATUS 0 outputs REFA present*/
+    DEBUG_AD9025_REG(AD9528_ADDR_STATUS0_CTRL, 0x01); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_STATUS0_CTRL");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_STATUS1_CTRL, 0x07); /*STATUS 1 outputs PLL1 and PLL2 locked*/
+    DEBUG_AD9025_REG(AD9528_ADDR_STATUS1_CTRL, 0x07);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_STATUS1_CTRL");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_STATUS_OE, 0x0C);/* Make Status0 and Status1 outputs after reset.*/
+    DEBUG_AD9025_REG(AD9528_ADDR_STATUS_OE, 0x0C);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_STATUS_OE");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_IO_UPDATE, 0x01); /*IO update to make all these settings valid in the 9528*/
+    DEBUG_AD9025_REG(AD9528_ADDR_IO_UPDATE, 0x01);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_IO_UPDATE");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    device->lockStatusExpectedValue = 0;
+    
+    if (init->pll1Settings.refA_bufferCtrl != ADI_AD9528_DISABLED)
+    {
+        device->lockStatusExpectedValue |= 0x04; /* bit 2 is REFA detected status */
+    }
+    
+    if (init->pll1Settings.refB_bufferCtrl != ADI_AD9528_DISABLED)
+    {
+        device->lockStatusExpectedValue |= 0x08; /* bit 3 is REFB detected status */
+    }
+    
+    /* If PLL 1 is enabled */
+    if (init->pll1Settings.nDividerPll1 != 0)
+    {
+        device->lockStatusExpectedValue |= 0x41; /* bit 6 is PLL1 feedback detected status, bit 0 is pll1 locked status */
+    }
+    
+    /* PLL2 is always enabled */
+    device->lockStatusExpectedValue |= 0x82; /* bit 7 is PLL2 feedback detected status, bit 1 is pll2 locked status */
+    
+    /* VCXO should always be present */
+    device->lockStatusExpectedValue |= 0x20; /* bit 5 is VCXO detected status*/
+    
+    if (init->pllLockTimeout_ms != 0)
+    {
+        recoveryAction = adi_ad9528_PllLockDebounce(device, init->pllLockTimeout_ms);
+    }
+
+    return recoveryAction;
+}
+
+int32_t adi_ad9528_SysrefRequest(adi_ad9528_Device_t *device, uint8_t enableSYSREF)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+    uint8_t enableSysrefBit = 0;
+    uint8_t reg403 = 0;
+
+    /* Check device pointer is not null */
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+#if ADI_AD9528_VERBOSE > 0
+    ADI_FUNCTION_ENTRY_LOG(&device->common, ADI_COMMON_LOG_HAL);
+#endif
+
+    if (device->devStateInfo.sysrefPatternMode == ADI_AD9528_NSHOT || enableSYSREF > 0)
+    {
+        enableSysrefBit = 0x01;
+    }
+    else
+    {
+        enableSysrefBit = 0x00;
+    }
+    
+    reg403 = (device->devStateInfo.sysrefCtrlReg403Init | enableSysrefBit);
+    
+    /* Set SPI SYSREF request bit */
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL4, reg403);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_SYSREF_CTRL4");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    
+    
+    /* IO update to make all these settings valid in the 9528 */
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_IO_UPDATE, 0x01);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_IO_UPDATE");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    return recoveryAction;
+}
+
+int32_t adi_ad9528_SysrefSetup(adi_ad9528_Device_t *device, adi_ad9528_SysrefSettings_t *sysrefSettings)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+    uint8_t reg403 = 0;
+
+    /* Check device pointer is not null */
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+    /* Check spi settings is not null */
+    ADI_NULL_PTR_RETURN(&device->common, sysrefSettings);
+
+#if ADI_AD9528_VERBOSE > 0
+    ADI_FUNCTION_ENTRY_LOG(&device->common, ADI_COMMON_LOG_HAL);
+#endif
+
+    device->devStateInfo.sysrefPatternMode = sysrefSettings->sysrefPatternMode;
+
+    recoveryAction = adi_ad9528_SpiByteRead(device, AD9528_ADDR_SYSREF_CTRL4, &reg403);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not read to register AD9528_ADDR_SYSREF_CTRL4");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    /* clear bit 0 to stop a continuous sysref if it is on. */
+    reg403 = reg403 & ~0x01; 
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL4, reg403);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_SYSREF_CTRL4");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    /* clear bits for pattern mode and Nshot mode bitfields */
+    reg403 = reg403 & ~0x3E; 
+    reg403 = reg403 | ((sysrefSettings->sysrefPatternMode & 0x3) << 4) | ((sysrefSettings->sysrefNshotMode & 0x7) << 1);
+    /* update internal sysref pattern mode and Nshot mode (number of pulses) */
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_SYSREF_CTRL4, reg403);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_SYSREF_CTRL4");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    /* SYSREF request bit x403[0] is left 0.  The next call to AD9528_requestSysref will start the SYSREF */
+    /* IO update to make all these settings valid in the 9528 */
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_IO_UPDATE, 0x01); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_IO_UPDATE");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+
+    return recoveryAction;
+}
+
+int32_t adi_ad9528_ClockOutputsEnable(adi_ad9528_Device_t *device, uint16_t clkEnable)
+{
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+
+    /* Check device pointer is not null */
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+#if ADI_AD9528_VERBOSE > 0
+    ADI_FUNCTION_ENTRY_LOG(&device->common, ADI_COMMON_LOG_HAL);
+#endif
+    
+    /* clkEnable: bit per clock output */
+    /* power down out[7:0] */
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_CH_POWERDOWN1, ~clkEnable & 0xFF); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_CH_POWERDOWN1");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    
+    /* power down out[13:8] */
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_CH_POWERDOWN2, ((~clkEnable >> 8) & 0x3F)); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_CH_POWERDOWN2");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    /* IO update to make all these settings valid in the 9528 */
+    recoveryAction = adi_ad9528_SpiByteWrite(device, AD9528_ADDR_IO_UPDATE, 0x01); 
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, recoveryAction, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "AD9528 could not write to register AD9528_ADDR_IO_UPDATE");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    
+    return recoveryAction;
+}
+
+int32_t adi_ad9528_PllLockDebounce(adi_ad9528_Device_t *device, uint32_t timeout_ms)
+{
+    uint8_t reg508 = 0;
+    uint8_t i = 0;
+    uint32_t numLoops = 0;
+    uint32_t lockCount = ADI_AD9528_PLL_DEBOUNCE_TIME_MS / ADI_AD9528_PLL_DEBOUNCE_INT_MS;
+    uint8_t lockFlag = 0;
+    int32_t recoveryAction = 0;
+
+    if (timeout_ms < ADI_AD9528_PLL_DEBOUNCE_TIME_MS)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_INV_PARAM, ADI_COMMON_ACT_ERR_CHECK_PARAM, NULL, "Timeout must be greater than ADI_AD9528_PLL_DEBOUNCE_TIME_MS");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+    else
+    {
+        /* Check lock status in 10ms intervals*/
+        numLoops = (uint32_t)ceil(((double)timeout_ms) / ADI_AD9528_PLL_DEBOUNCE_INT_MS);
+    }
+
+    /* read twice to refresh status bits */
+    recoveryAction = adi_ad9528_SpiByteRead(device, AD9528_ADDR_STATUS_READBACK0, &reg508);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_SPI_FAIL, recoveryAction, NULL, "Error reading SPI");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    
+    for (i = 0; i < numLoops; i++)
+    {
+        adi_ad9528_SpiByteRead(device, AD9528_ADDR_STATUS_READBACK0, &reg508);
+        ADI_ERROR_RETURN(device->common.error.newAction);
+        
+        if ((reg508 & device->lockStatusExpectedValue) != device->lockStatusExpectedValue)
+        {
+            lockCount = ADI_AD9528_PLL_DEBOUNCE_TIME_MS / ADI_AD9528_PLL_DEBOUNCE_INT_MS;
+        }
+        else
+        {
+            lockCount--;
+            if (lockCount == 0)
+            {
+                lockFlag = 1;
+                break;
+            }
+        }
+        
+        adi_common_hal_Wait_ms(&device->common, ADI_AD9528_PLL_DEBOUNCE_INT_MS);
+    }
+
+    if (lockFlag == 0)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_AD9528_ERR_PLL_LOCK_FAILED, ADI_COMMON_ACT_ERR_RESET_MODULE, NULL, "Ad9528 PLL Not locked");
+        return ADI_COMMON_ACT_ERR_RESET_MODULE;
+    }
+    
+    return ADI_COMMON_ACT_NO_ACTION;
+}
+
+int32_t adi_ad9528_PllLockStatusGet(adi_ad9528_Device_t *device, uint8_t *status)
+{
+    uint8_t reg508 = 0;
+    int32_t recoveryAction = 0;
+
+    /* read twice to refresh status bits */
+    recoveryAction = adi_ad9528_SpiByteRead(device, AD9528_ADDR_STATUS_READBACK0, &reg508);
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_SPI_FAIL, recoveryAction, NULL, "Error reading SPI");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    
+    adi_ad9528_SpiByteRead(device, AD9528_ADDR_STATUS_READBACK0, &reg508);
+    ADI_ERROR_RETURN(device->common.error.newAction);
+    
+    /* if status is a valid pointer, return the PLL status */
+    if (status != NULL)
+    {
+        *status = reg508;
+    }
+
+    /* PLLs 1 and 2 are locked and VCXO and REFA detected if reg508 has bits 5,2,1 and 0 set */
+    if ((reg508 & device->lockStatusExpectedValue) == device->lockStatusExpectedValue)
+    {
+        return ADI_COMMON_ACT_NO_ACTION;
+    }
+    else
+    {
+        return ADI_COMMON_ACT_ERR_RESET_MODULE;
+    }
+}

driver/rfic/rf/adrv9025/c_src/devices/ad9528/public/src/adi_ad9528_hal.c

@@ -0,0 +1,89 @@
+/**
+* \file adi_ad9528_hal.c
+* \brief Contains ADI AD9528 Clock Generator Hardware Abstraction functions
+*        Analog Devices maintains and provides updates to this code layer.
+*        The end user should not modify this file or any code in this directory.
+*/
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+#include "adi_ad9528_user.h"
+#include "adi_ad9528_hal.h"
+#include "adi_common_error.h"
+#include "adi_common_hal.h"
+
+
+int32_t adi_ad9528_SpiByteWrite(adi_ad9528_Device_t *device, uint16_t addr, uint8_t data)
+{
+    int32_t halError = 0;
+    int32_t i = 0;
+    uint8_t txData[3] = { 0 };
+
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+#if ADI_AD9528_VERBOSE > 0
+    ADI_FUNCTION_ENTRY_VARIABLE_LOG(&device->common, ADI_COMMON_LOG_SPI, "%s(0x%04X, 0x%02X)", addr, data);
+#endif
+
+    txData[0] = (uint8_t)(0x7F & (addr >> 8));
+    txData[1] = (uint8_t)(addr & 0x00FF);
+    txData[2] = data;
+
+    for (i = 0; i < ADI_AD9528_NUMBER_SPI_RETRY; i++)
+    {
+        halError = adi_hal_SpiWrite(device->common.devHalInfo, txData, 3);
+        if (halError == ADI_COMMON_HAL_OK)
+        {
+            break;
+        }
+    }
+
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_ADI_HAL, halError, ADI_COMMON_ACT_ERR_RESET_INTERFACE, NULL, "SpiWriteByte failed");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    return ADI_COMMON_ACT_NO_ACTION;
+}
+
+int32_t adi_ad9528_SpiByteRead(adi_ad9528_Device_t *device, uint16_t addr, uint8_t *data)
+{
+    int32_t trxHalAction = 0;
+    int32_t halError = 0;
+    int32_t i = 0;
+    uint8_t txData[3] = { 0 };
+    uint8_t rxData[3] = { 0 };
+
+    ADI_NULL_DEVICE_PTR_RETURN(device);
+
+    ADI_NULL_PTR_RETURN(&device->common, data);
+
+    txData[0] = (uint8_t)(0x80 | (addr >> 8));
+    txData[1] = (uint8_t)(addr & 0x00FF);
+    txData[2] = 0;
+
+    for (i = 0; i < ADI_AD9528_NUMBER_SPI_RETRY; i++)
+    {
+        halError = adi_hal_SpiRead(device->common.devHalInfo, txData, rxData, 3);
+        if (halError == ADI_COMMON_HAL_OK)
+        {
+            break;
+        }
+    }
+
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_ADI_HAL, halError, ADI_COMMON_ACT_ERR_RESET_INTERFACE, NULL, "SpiWriteByte failed");
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+    *data = rxData[2];
+    
+#if ADI_AD9528_VERBOSE > 0
+    ADI_FUNCTION_ENTRY_VARIABLE_LOG(&device->common, ADI_COMMON_LOG_SPI, "%s(0x%04X, 0x%02X)", addr, data);
+    if (trxHalAction != 0)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_ADI_HAL, trxHalAction, ADI_COMMON_ACT_WARN_RESET_LOG, NULL, "Logging failed");
+    }
+#endif
+
+    return ADI_COMMON_ACT_NO_ACTION;
+}
+

driver/rfic/rf/adrv9025/c_src/devices/ad9528/public/src/adi_ad9528_utilities.c

@@ -0,0 +1,564 @@
+/**
+* \file adi_ad9528_utilities.c
+* \brief Contains source code for AD9528 utility functions.
+*/
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+#include "adi_ad9528_user.h"
+#include "adi_ad9528_utilities.h"
+#include "adi_common_error.h"
+#include "adi_common_error_types.h"
+#include <stdint.h>
+#include <stddef.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+
+int32_t adi_ad9528_ConfigFileLoad(const char *configFile, adi_ad9528_Init_t *init)
+{
+    FILE *fp;
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+    char line[ADI_AD9528_MAX_BUFFER];
+    char *id_string;
+    uint8_t ad9528 = 0;
+    uint8_t outSource = 0;
+    uint8_t outBufferCtrl = 0;
+    uint8_t outAnalogDelay = 0;
+    uint8_t outDigitalDelay = 0;
+    uint8_t outChannelDiv = 0;
+    uint8_t outFrequency_Hz = 0;
+    //void *outArrayHelper = 0;
+    int32_t index = 0;
+    //uint8_t outArrayFillFlag = 0;
+    uint32_t int32;
+    int32_t ret;
+
+#ifdef __GNUC__
+    fp = fopen(configFile, "r");
+#else
+    fopen_s(&fp, configFile, "r");
+#endif
+
+    if (fp == NULL)
+    {
+        return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+    }
+
+    while (fgets(line, ADI_AD9528_MAX_BUFFER, fp))
+    {
+
+        if (!ad9528 && strstr(line, "<adi_ad9528_Device_t"))
+        {
+            id_string = strstr(line, "id=");
+            if (id_string)
+            {
+#ifdef __GNUC__
+                if (sscanf(id_string, "id=%u", &init->deviceId) != 1)
+                {
+                    (void)fclose(fp);
+                    return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+
+                }
+#else
+                if (sscanf_s(id_string, "id=%u", &init->deviceId) != 1)
+                {
+                    (void)fclose(fp);
+                    return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+
+                }
+#endif
+            }
+            else
+            {
+                init->deviceId = 0;
+            }
+            ad9528 = 1;
+            continue;
+        }
+
+        if (ad9528)
+        {
+            if (strstr(line, "</adi_ad9528_Device_t>"))
+            {
+                break;
+            }
+
+            if (!outSource && strstr(line, "<outSource>"))
+            {
+                outSource = 1;
+                //outArrayFillFlag = 1;
+                //outArrayHelper = init->outputSettings.outSource;
+                continue;
+            }
+            if (outSource && strstr(line, "</outSource>"))
+            {
+                outSource = 0;
+                //outArrayFillFlag = 0;
+                index = 0;
+                continue;
+            }
+
+            if (!outBufferCtrl && strstr(line, "<outBufferCtrl>"))
+            {
+                outBufferCtrl = 1;
+                //outArrayFillFlag = 1;
+                //outArrayHelper = init->outputSettings.outBufferCtrl;
+                continue;
+            }
+            if (outBufferCtrl && strstr(line, "</outBufferCtrl>"))
+            {
+                outBufferCtrl = 0;
+                //outArrayFillFlag = 0;
+                index = 0;
+                continue;
+            }
+
+            if (!outAnalogDelay && strstr(line, "<outAnalogDelay>"))
+            {
+                outAnalogDelay = 1;
+                //outArrayFillFlag = 1;
+                //outArrayHelper = init->outputSettings.outAnalogDelay;
+                continue;
+            }
+            if (outAnalogDelay && strstr(line, "</outAnalogDelay>"))
+            {
+                outAnalogDelay = 0;
+                //outArrayFillFlag = 0;
+                index = 0;
+                continue;
+            }
+
+            if (!outDigitalDelay && strstr(line, "<outDigitalDelay>"))
+            {
+                outDigitalDelay = 1;
+                //outArrayFillFlag = 1;
+                //outArrayHelper = init->outputSettings.outDigitalDelay;
+                continue;
+            }
+            if (outDigitalDelay && strstr(line, "</outDigitalDelay>"))
+            {
+                outDigitalDelay = 0;
+                //outArrayFillFlag = 0;
+                index = 0;
+                continue;
+            }
+
+            if (!outChannelDiv && strstr(line, "<outChannelDiv>"))
+            {
+                outChannelDiv = 1;
+                //outArrayFillFlag = 1;
+               // outArrayHelper = init->outputSettings.outChannelDiv;
+                continue;
+            }
+            if (outChannelDiv && strstr(line, "</outChannelDiv>"))
+            {
+                outChannelDiv = 0;
+                //outArrayFillFlag = 0;
+                index = 0;
+                continue;
+            }
+
+            if (!outFrequency_Hz && strstr(line, "<outFrequency_Hz>"))
+            {
+                outFrequency_Hz = 1;
+                //outArrayFillFlag = 1;
+                //outArrayHelper = init->outputSettings.outFrequency_Hz;
+                continue;
+            }
+            if (outFrequency_Hz && strstr(line, "</outFrequency_Hz>"))
+            {
+                outFrequency_Hz = 0;
+                //outArrayFillFlag = 0;
+                index = 0;
+                continue;
+            }
+
+            GET_TOKEN(init->spiSettings, msbFirst, ret, line, &int32, int32);
+            //GET_TOKEN(init->spiSettings, enSpiStreaming, ret, line, &int32, int32);
+            GET_TOKEN(init->spiSettings, autoIncAddrUp, ret, line, &int32, int32);
+            GET_TOKEN(init->spiSettings, fourWireMode, ret, line, &int32, int32);
+
+            GET_TOKEN(init->pll1Settings, refA_Frequency_Hz, ret, line, &int32, int32);
+            GET_TOKEN(init->pll1Settings, refA_Divider, ret, line, &int32, int32);
+            GET_TOKEN_CAST(init->pll1Settings, refA_bufferCtrl, adi_ad9528_RefBuffer_e, ret, line, &int32, int32);
+            GET_TOKEN(init->pll1Settings, refB_Frequency_Hz, ret, line, &int32, int32);
+            GET_TOKEN(init->pll1Settings, refB_Divider, ret, line, &int32, int32);
+            GET_TOKEN_CAST(init->pll1Settings, refB_bufferCtrl, adi_ad9528_RefBuffer_e, ret, line, &int32, int32);
+            GET_TOKEN(init->pll1Settings, vcxo_Frequency_Hz, ret, line, &int32, int32);
+            GET_TOKEN_CAST(init->pll1Settings, vcxoBufferCtrl, adi_ad9528_RefBuffer_e, ret, line, &int32, int32);
+            GET_TOKEN(init->pll1Settings, nDividerPll1, ret, line, &int32, int32);
+
+            GET_TOKEN_CAST(init->sysrefSettings, sysrefRequestMethod, adi_ad9528_SysrefRequestMethod_e, ret, line, &int32, int32);
+            GET_TOKEN_CAST(init->sysrefSettings, sysrefSource, adi_ad9528_SysrefSourceSelection_e, ret, line, &int32, int32);
+            GET_TOKEN_CAST(init->sysrefSettings, sysrefPinEdgeMode, adi_ad9528_SysrefPinEdgeMode_e, ret, line, &int32, int32);
+            GET_TOKEN_CAST(init->sysrefSettings, sysrefPinBufferMode, adi_ad9528_RefBuffer_e, ret, line, &int32, int32);
+            GET_TOKEN_CAST(init->sysrefSettings, sysrefPatternMode, adi_ad9528_SysrefPatternMode_e, ret, line, &int32, int32);
+            GET_TOKEN_CAST(init->sysrefSettings, sysrefNshotMode, adi_ad9528_SysrefNshotMode_e, ret, line, &int32, int32);
+            GET_TOKEN(init->sysrefSettings, sysrefDivide, ret, line, &int32, int32);
+
+            GET_TOKEN(init->pll2Settings, rfDivider, ret, line, &int32, int32);
+            GET_TOKEN(init->pll2Settings, n2Divider, ret, line, &int32, int32);
+            GET_TOKEN(init->pll2Settings, totalNdiv, ret, line, &int32, int32);
+
+            GET_TOKEN(init->outputSettings, outPowerDown, ret, line, &int32, int32);
+
+            if (outSource)
+            {
+                if (index >= ADI_AD9528_NUM_OUTPUT_CHANNELS)
+                {
+                    (void)fclose(fp);
+                    return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+                }
+                if (sscanf_s(line, " %d", &ret) == 1) {
+                    init->outputSettings.outSource[index++] = (adi_ad9528_OutSourceSel_e)ret;
+                    continue;
+                }
+            }
+
+            if (outBufferCtrl)
+            {
+                if (index >= ADI_AD9528_NUM_OUTPUT_CHANNELS)
+                {
+                    (void)fclose(fp);
+                    return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+                }
+                if (sscanf_s(line, " %d", &ret) == 1) {
+                    init->outputSettings.outBufferCtrl[index++] = (adi_ad9528_OutBufferControl_e)ret;
+                    continue;
+                }
+            }
+
+            if (outAnalogDelay)
+            {
+                if (index >= ADI_AD9528_NUM_OUTPUT_CHANNELS)
+                {
+                    (void)fclose(fp);
+                    return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+                }
+                if (sscanf_s(line, " %d", &ret) == 1) {
+                    init->outputSettings.outAnalogDelay[index++] = ret;
+                    continue;
+                }
+            }
+
+            if (outDigitalDelay)
+            {
+                if (index >= ADI_AD9528_NUM_OUTPUT_CHANNELS)
+                {
+                    (void)fclose(fp);
+                    return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+                }
+                if (sscanf_s(line, " %d", &ret) == 1) {
+                    init->outputSettings.outDigitalDelay[index++] = ret;
+                    continue;
+                }
+            }
+
+            if (outChannelDiv)
+            {
+                if (index >= ADI_AD9528_NUM_OUTPUT_CHANNELS)
+                {
+                    (void)fclose(fp);
+                    return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+                }
+                if (sscanf_s(line, " %d", &ret) == 1) {
+                    init->outputSettings.outChannelDiv[index++] = ret;
+                    continue;
+                }
+            }
+
+            if (outFrequency_Hz)
+            {
+                if (index >= ADI_AD9528_NUM_OUTPUT_CHANNELS)
+                {
+                    (void)fclose(fp);
+                    return ADI_COMMON_ACT_ERR_CHECK_PARAM;
+                }
+                if (sscanf_s(line, " %d", &ret) == 1) {
+                    init->outputSettings.outFrequency_Hz[index++] = ret;
+                    continue;
+                }
+            }
+        }
+    }
+
+    (void)fclose(fp);
+    return recoveryAction;
+}
+
+int32_t adi_ad9528_InitStructConfig(adi_ad9528_Device_t *device, adi_ad9528_ClockFrequencySettings_t *clockFrequencies, adi_ad9528_Init_t *init)
+{
+
+    int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
+    uint8_t i = 0;
+    uint8_t j = 0;
+    uint32_t pll1PfdFreq_Hz = 0;
+    uint8_t pll1Ndiv = 0;
+    uint8_t validPll1DivSetting = 0;
+    // ? remov warn by daya uint16_t refAdiv = 1;
+    uint8_t pll2RfDiv = 3; /* Valid values 3,4,5 */
+    uint16_t pll2Ndiv = 1; /* Valid values 1-256 */
+    uint16_t totalPll2NDiv = 0;
+    uint8_t pll2R1Div = 1; /* Valid values 1-31  */
+    uint32_t pll2InputFreq_Hz = 0;
+    uint64_t pll2VcoFreq_Hz = 0;
+    uint64_t pll2VcoDivRFFreq_Hz = 0;
+    uint16_t pll2NdivStart = 0;
+    uint8_t validPll2DivSetting = 0;
+    uint8_t validPll2ChannelDivSetting = 0;
+    uint64_t chDivU64 = 0;
+    uint64_t sysrefRetimingClock_Hz = 0;
+
+    static const uint64_t PLL2_MIN_VCO_FREQ_HZ = 3450000000ULL;
+    static const uint64_t PLL2_MAX_VCO_FREQ_HZ = 4025000000ULL;
+    static const uint64_t SYSREF_MAX_RETIMING_CLOCK_FREQ_HZ = 1000000000ULL;
+    
+    init->outputSettings.outPowerDown = 0;
+    /*******************************************************************
+    * PLL1 Settings
+    *******************************************************************
+    */
+
+
+    if (clockFrequencies->refAFrequency_Hz == 0)
+    {
+        /* Bypass PLL1, routing VCXO out of PLL1 */
+        init->pll1Settings.nDividerPll1 = 0; //This init function always runs PLL1 at 30.72MHz Pfd rate
+        init->pll1Settings.refA_bufferCtrl = ADI_AD9528_DISABLED;        //DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
+        init->pll1Settings.refA_Divider = 1;
+        init->pll1Settings.refA_Frequency_Hz = 0;
+        init->pll1Settings.refB_bufferCtrl = ADI_AD9528_DISABLED;            //DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
+        init->pll1Settings.refB_Divider = 1;
+        init->pll1Settings.refB_Frequency_Hz = 0;
+        init->pll1Settings.vcxoBufferCtrl = ADI_AD9528_DIFFERENTIAL;    //DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
+        init->pll1Settings.vcxo_Frequency_Hz = clockFrequencies->vcxoFrequency_Hz;
+    }
+    else
+    {
+        /* find valid PLL1 Ndiv and REFA div */
+        for (pll1Ndiv = 1; pll1Ndiv < 20; pll1Ndiv++)
+        {
+            pll1PfdFreq_Hz = clockFrequencies->vcxoFrequency_Hz / pll1Ndiv;
+
+            if ((pll1PfdFreq_Hz <= 110000000) && (pll1PfdFreq_Hz >= 1000000) &&
+                (pll1PfdFreq_Hz <= clockFrequencies->refAFrequency_Hz) &&
+                (clockFrequencies->refAFrequency_Hz % pll1PfdFreq_Hz == 0))
+            {
+                validPll1DivSetting = 1;
+                // ? remov warn by daya refAdiv = clockFrequencies->refAFrequency_Hz / pll1PfdFreq_Hz;
+                break;
+            }
+        }
+
+        if (validPll1DivSetting == 0)
+        {
+            ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ACT_ERR_CHECK_PARAM, ADI_COMMON_ERR_INV_PARAM, NULL, "Cannot find valid settings for PLL1");
+            ADI_ERROR_RETURN(device->common.error.newAction);
+        }
+        
+        init->pll1Settings.nDividerPll1 = 4; //This init function always runs PLL1 at 30.72MHz Pfd rate
+        init->pll1Settings.refA_bufferCtrl = ADI_AD9528_DIFFERENTIAL;        //DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
+        init->pll1Settings.refA_Divider = 1;
+        init->pll1Settings.refA_Frequency_Hz = 30720000;
+        init->pll1Settings.refB_bufferCtrl = ADI_AD9528_DISABLED;            //DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
+        init->pll1Settings.refB_Divider = 1;
+        init->pll1Settings.refB_Frequency_Hz = 0;
+
+        init->pll1Settings.vcxoBufferCtrl = ADI_AD9528_SINGLE_ENDED;    //DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
+        init->pll1Settings.vcxo_Frequency_Hz = 122880000; // clockFrequencies->vcxoFrequency_Hz;
+    }
+    
+    
+    
+
+    /*******************************************************************
+    * PLL2 Settings
+    *******************************************************************
+    */
+
+    /*******************************************************************
+    * Output Distribution Settings
+    * 9369CE02A uses the following clock outputs
+    * OUT 1: FPGA REFCLK
+    * OUT 3: FPGA SYSREF
+    * OUT 12: DUT SYSREF
+    * OUT 13: DUT REFCLK
+    *******************************************************************
+    */
+
+    /* PLL 2 input clock can be several different things.  Currently hard coded by this init function to use
+    * PLL 1 output (VCXO Frequency) with no scaling
+    */
+    validPll2DivSetting = 0;
+
+    if ((init->pll1Settings.vcxo_Frequency_Hz == 0) ||
+        (init->pll1Settings.vcxo_Frequency_Hz > 400000000))
+    {
+        /* TODO: VCXO max is 1200MHz if VCXO is in buffer mode */
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ACT_ERR_CHECK_PARAM,
+            ADI_COMMON_ERR_INV_PARAM, init->pll1Settings.vcxo_Frequency_Hz,
+            "Invalid VCXO Frequency");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+    
+    for (pll2R1Div = 1; pll2R1Div <= 31; pll2R1Div++)
+    {
+        pll2InputFreq_Hz = init->pll1Settings.vcxo_Frequency_Hz / pll2R1Div;
+
+        /* Sweep PLL2 Divider settings to find something that has a valid integer divide (3,4,5)*/
+        for (pll2RfDiv = 3; pll2RfDiv <= 5; pll2RfDiv++)
+        {
+            pll2NdivStart = (uint16_t)(PLL2_MIN_VCO_FREQ_HZ / pll2RfDiv / pll2InputFreq_Hz);
+            /* find valid PLL2 Ndiv (1-256) */
+            for (pll2Ndiv = pll2NdivStart; pll2Ndiv <= 256; pll2Ndiv++)
+            {
+                totalPll2NDiv = pll2RfDiv * pll2Ndiv;
+                if (totalPll2NDiv < 16)
+                {
+                    /* Continue to next PLL2 N div */
+                    continue;
+                }
+                
+                pll2VcoFreq_Hz = (uint64_t)pll2InputFreq_Hz * totalPll2NDiv;
+
+                if (pll2VcoFreq_Hz < PLL2_MIN_VCO_FREQ_HZ)
+                {
+                    /* Continue to next PLL2 N div */
+                    continue;
+                }
+                else if (pll2VcoFreq_Hz > PLL2_MAX_VCO_FREQ_HZ)
+                {
+                    /* Break to next PLL2 RF div */
+                    break;
+                }
+                
+                /* Loop through all desired output settings to make sure
+                *  this PLL2 setting makes them all possible
+                */
+                validPll2ChannelDivSetting = 0;
+                pll2VcoDivRFFreq_Hz = pll2VcoFreq_Hz / pll2RfDiv;
+                for (i = 0; i < 14; i++)
+                {
+                    if ((clockFrequencies->outputClock_Hz[i] != 0) && 
+                        ((clockFrequencies->outSource[i] == ADI_AD9528_CHANNEL_DIV) || (clockFrequencies->outSource[i] == ADI_AD9528_SYSREF)) &&
+                        ((pll2VcoDivRFFreq_Hz % clockFrequencies->outputClock_Hz[i]) != 0))
+                    {
+                        validPll2ChannelDivSetting = 1;
+                        break;
+                    }
+                }
+                    
+                if (validPll2ChannelDivSetting == 0)
+                {
+
+                    for (i = 0; i < 14; i++)
+                    {
+                        if (clockFrequencies->outputClock_Hz[i] != 0)
+                        {
+                            init->outputSettings.outPowerDown |= (1 << i);
+
+                            if (clockFrequencies->outSource[i] == ADI_AD9528_CHANNEL_DIV) 
+                            {
+                                chDivU64 = (pll2VcoDivRFFreq_Hz / clockFrequencies->outputClock_Hz[i]);
+
+                                if ((chDivU64 < 1) || (chDivU64 > 256))
+                                {
+                                    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ACT_ERR_CHECK_PARAM, ADI_COMMON_ERR_INV_PARAM, NULL, "Cannot find valid settings for Channel divider");
+                                    ADI_ERROR_RETURN(device->common.error.newAction);
+                                }
+                                else
+                                {
+                                    init->outputSettings.outChannelDiv[i] = (uint16_t)(chDivU64);
+                                    init->outputSettings.outAnalogDelay[i] = 0; // daya debug
+                                    init->outputSettings.outDigitalDelay[i] = 0;// daya debug
+                                }
+                            }
+                            else if (clockFrequencies->outSource[i] == ADI_AD9528_SYSREF)
+                            {
+                                /* At this point we already guaranteed that pll2VcoDivRFFreq_Hz is multiple of clockFrequencies->outputClock_Hz[i] */
+                                /* Iterate over all possible divider values, try to find minimum possible divider(i.e.maximize retiming clk freq)*/
+                                for(j = 1; j <= 255; j++)
+                                {
+                                    if((pll2VcoDivRFFreq_Hz % j) == 0)
+                                    {
+                                        sysrefRetimingClock_Hz = pll2VcoDivRFFreq_Hz / j;
+                                        if((sysrefRetimingClock_Hz < SYSREF_MAX_RETIMING_CLOCK_FREQ_HZ) && ((sysrefRetimingClock_Hz % clockFrequencies->outputClock_Hz[i]) == 0))
+                                        {
+                                            init->outputSettings.outChannelDiv[i] = 10; // j;
+                                            init->outputSettings.outAnalogDelay[i] = (0x10 | 15);  // daya debug
+                                            init->outputSettings.outDigitalDelay[i] = 5;           // daya debug
+                                            break;
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        
+                        if (init->outputSettings.outChannelDiv[i] == 0)
+                        {
+                            init->outputSettings.outChannelDiv[i] = 20; /* Unused channel output divider, set to a valid value */
+                        }
+                        
+                        init->outputSettings.outSource[i] = clockFrequencies->outSource[i];
+                        init->outputSettings.outFrequency_Hz[i] = clockFrequencies->outputClock_Hz[i];
+                        
+                        /* currently hardcoded to default values */
+                        init->outputSettings.outBufferCtrl[i] = ADI_AD9528_LVDS; /* LVDS, LVDS_BOOST, HSTL */
+                        // init->outputSettings.outAnalogDelay[i] = 0;   // daya debug
+                        // init->outputSettings.outDigitalDelay[i] = 0;  // daya debug
+                    }
+
+
+                    
+                    /* Only set this to valid after checking the output clock dividers above */
+                    init->pll2Settings.rfDivider = pll2RfDiv;
+                    init->pll2Settings.totalNdiv = pll2RfDiv * pll2Ndiv;
+                    init->pll2Settings.n2Divider = pll2Ndiv;
+                    init->pll2Settings.r1Divider = pll2R1Div;
+                    validPll2DivSetting = 1;
+                    break;
+                }
+            }
+
+            if (validPll2DivSetting == 1)
+            {
+                break;
+            }
+        }
+
+        if (validPll2DivSetting == 1)
+        {
+            break;
+        }
+    }
+
+    if (validPll2DivSetting == 0)
+    {
+        ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ACT_ERR_CHECK_PARAM, ADI_COMMON_ERR_INV_PARAM, NULL, "Cannot find valid settings for PLL2");
+        ADI_ERROR_RETURN(device->common.error.newAction);
+    }
+
+    /* loop above asserted those bits for used output channels but powerdown bits should be negated */
+    init->outputSettings.outPowerDown = (uint16_t)(~init->outputSettings.outPowerDown);
+    init->sysrefSettings.sysrefDivide = 32;                                    //SYSREF frequency = VCXO / 2 / sysrefDivde
+    init->sysrefSettings.sysrefNshotMode = ADI_AD9528_EIGHT_PULSES;            //ONE_PULSE=0, TWO_PULSES=2, FOUR_PULSES=3, SIX_PULSES=4, EIGHT_PULSES=5
+    init->sysrefSettings.sysrefPatternMode = ADI_AD9528_NSHOT; // ADI_AD9528_NSHOT;  ; //NSHOT=0, CONTINUOUS=1, PRBS=2, STOP=3
+    init->sysrefSettings.sysrefPinBufferMode = ADI_AD9528_DIFFERENTIAL;           //DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
+    init->sysrefSettings.sysrefPinEdgeMode = ADI_AD9528_RISING_EDGE;    //LEVEL_ACTIVE_HIGH=0, LEVEL_ACTIVE_LOW=1, RISING_EDGE=2, FALLING_EDGE=3
+    init->sysrefSettings.sysrefRequestMethod = ADI_AD9528_SPI;                //SPI=0,PIN=1
+    init->sysrefSettings.sysrefSource = ADI_AD9528_INTERNAL;                  //EXTERNAL=0, EXT_RESAMPLED=1, INTERNAL=2
+
+    /* Default timeout set to 1sec */
+    init->pllLockTimeout_ms = 1000;
+
+    /* Default SPI settings */
+    init->spiSettings.autoIncAddrUp = 1;
+    init->spiSettings.fourWireMode = 1;
+    init->spiSettings.msbFirst = 1;
+
+    return recoveryAction;
+}

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/makefile

@@ -0,0 +1,37 @@
+LIB_ADI_ADRV9025_DEVICE = libadi_adrv9025.a
+#CC = aarch64-linux-gnu-gcc
+ADI_ADRV9025_SRC = ./public/src
+ADI_ADRV9025_PRIVATE_SRC = ./private/src
+ARFLAGS = -rv
+CFLAGS = -Werror -Wall -I./public/include -I../../platforms/ -I../../common -I../../common/adi_error -I../../common/adi_logging -I../../common/adi_hal -I../../../os
+ADI_PLATFORM_SRC = ../../platforms
+ADI_COMMON_SRC = ../../common
+EXT = c
+
+SRC = $(wildcard $(ADI_ADRV9025_PRIVATE_SRC)/*.$(EXT)) \
+	$(wildcard $(ADI_ADRV9025_SRC)/*.$(EXT))
+
+OBJS = $(SRC:.$(EXT)=.o)
+
+all: adi_platform_lib \
+	adi_common_lib \
+	$(LIB_ADI_ADRV9025_DEVICE)
+
+.$(EXT).o:
+	$(CC) $(CFLAGS) -o $@ -c $<
+
+$(LIB_ADI_ADRV9025_DEVICE): $(OBJS)
+	ar $(ARFLAGS) $(LIB_ADI_ADRV9025_DEVICE) $(OBJS)
+
+adi_platform_lib:
+	$(MAKE) -C $(ADI_PLATFORM_SRC)
+
+adi_common_lib:
+	$(MAKE) -C $(ADI_COMMON_SRC)
+
+clean:
+	rm -rf $(ADI_ADRV9025_SRC)/*.o
+	rm -rf $(ADI_ADRV9025_PRIVATE_SRC)/*.o
+	rm -rf *.a
+	$(MAKE) -C $(ADI_PLATFORM_SRC) clean
+	$(MAKE) -C $(ADI_COMMON_SRC) clean

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_analog_orx_mem_map.h

@@ -0,0 +1,31 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_analog_orx_mem_map.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_ANALOG_ORX_MEM_MAP_H__
+#define __ADRV9025_BF_ANALOG_ORX_MEM_MAP_H__
+#include "./../../private/include/adrv9025_bf_analog_orx_mem_map_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_AnalogOrxMemMapLomuxSelBfGet(adi_adrv9025_Device_t*               device,
+                                              adrv9025_BfAnalogOrxMemMapChanAddr_e baseAddr,
+                                              uint8_t*                             bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_analog_orx_mem_map_types.h

@@ -0,0 +1,35 @@
+/**
+ * \file adrv9025_bf_analog_orx_mem_map_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_ANALOG_ORX_MEM_MAP_TYPES_H__
+#define __ADRV9025_BF_ANALOG_ORX_MEM_MAP_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfAnalogOrxMemMapChanAddr
+{
+    ADRV9025_BF_ANALOG_ORX_CH0 = 0x4C00,
+    ADRV9025_BF_ANALOG_ORX_CH1 = 0x5400
+} adrv9025_BfAnalogOrxMemMapChanAddr_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ADRV9025_BF_ANALOG_ORX_MEM_MAP_TYPES_H__
+
+/*  EOF: adrv9025_bf_analog_orx_mem_map_types.h */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_analog_rx_mem_map.h

@@ -0,0 +1,55 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_analog_rx_mem_map.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_ANALOG_RX_MEM_MAP_H__
+#define __ADRV9025_BF_ANALOG_RX_MEM_MAP_H__
+#include "./../../private/include/adrv9025_bf_analog_rx_mem_map_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_AnalogRxMemMapRxBlockDetDecayBfSet(adi_adrv9025_Device_t*              device,
+                                                    adrv9025_BfAnalogRxMemMapChanAddr_e baseAddr,
+                                                    uint8_t                             bfValue);
+
+int32_t adrv9025_AnalogRxMemMapRxBlockDetLlbthBfSet(adi_adrv9025_Device_t*              device,
+                                                    adrv9025_BfAnalogRxMemMapChanAddr_e baseAddr,
+                                                    uint8_t                             channelId,
+                                                    uint8_t                             bfValue);
+
+int32_t adrv9025_AnalogRxMemMapRxBlockDetLlbthBfGet(adi_adrv9025_Device_t*              device,
+                                                    adrv9025_BfAnalogRxMemMapChanAddr_e baseAddr,
+                                                    uint8_t                             channelId,
+                                                    uint8_t*                            bfValue);
+
+int32_t adrv9025_AnalogRxMemMapRxBlockDetUlbthBfSet(adi_adrv9025_Device_t*              device,
+                                                    adrv9025_BfAnalogRxMemMapChanAddr_e baseAddr,
+                                                    uint8_t                             channelId,
+                                                    uint8_t                             bfValue);
+
+int32_t adrv9025_AnalogRxMemMapRxBlockDetUlbthBfGet(adi_adrv9025_Device_t*              device,
+                                                    adrv9025_BfAnalogRxMemMapChanAddr_e baseAddr,
+                                                    uint8_t                             channelId,
+                                                    uint8_t*                            bfValue);
+
+int32_t adrv9025_AnalogRxMemMapRxTiaForceUpdateBfSet(adi_adrv9025_Device_t*              device,
+                                                     adrv9025_BfAnalogRxMemMapChanAddr_e baseAddr,
+                                                     uint8_t                             bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_analog_rx_mem_map_types.h

@@ -0,0 +1,38 @@
+/**
+ * \file adrv9025_bf_analog_rx_mem_map_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_ANALOG_RX_MEM_MAP_TYPES_H__
+#define __ADRV9025_BF_ANALOG_RX_MEM_MAP_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfAnalogRxMemMapChanAddr
+{
+    ADRV9025_BF_ALL_ANALOG_RX = 0xC00,
+    ADRV9025_BF_ANALOG_RX_CH1 = 0x2C00,
+    ADRV9025_BF_ANALOG_RX_CH2 = 0x3400,
+    ADRV9025_BF_ANALOG_RX_CH3 = 0x3C00,
+    ADRV9025_BF_ANALOG_RX_CH0 = 0x4400
+} adrv9025_BfAnalogRxMemMapChanAddr_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ADRV9025_BF_ANALOG_RX_MEM_MAP_TYPES_H__ */
+
+/*  EOF: adrv9025_bf_analog_rx_mem_map_types.h */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_analog_tx_mem_map.h

@@ -0,0 +1,79 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_analog_tx_mem_map.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_ANALOG_TX_MEM_MAP_H__
+#define __ADRV9025_BF_ANALOG_TX_MEM_MAP_H__
+#include "./../../private/include/adrv9025_bf_analog_tx_mem_map_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_AnalogTxMemMapAuxdac0BfSet(adi_adrv9025_Device_t*              device,
+                                            adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                            uint16_t                            bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac0BfGet(adi_adrv9025_Device_t*              device,
+                                            adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                            uint16_t*                           bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac0ConfigBfSet(adi_adrv9025_Device_t*              device,
+                                                  adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                                  uint8_t                             bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac1BfSet(adi_adrv9025_Device_t*              device,
+                                            adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                            uint16_t                            bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac1BfGet(adi_adrv9025_Device_t*              device,
+                                            adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                            uint16_t*                           bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac1ConfigBfSet(adi_adrv9025_Device_t*              device,
+                                                  adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                                  uint8_t                             bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac2BfSet(adi_adrv9025_Device_t*              device,
+                                            adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                            uint16_t                            bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac2BfGet(adi_adrv9025_Device_t*              device,
+                                            adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                            uint16_t*                           bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac2ConfigBfSet(adi_adrv9025_Device_t*              device,
+                                                  adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                                  uint8_t                             bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac3BfSet(adi_adrv9025_Device_t*              device,
+                                            adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                            uint16_t                            bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac3BfGet(adi_adrv9025_Device_t*              device,
+                                            adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                            uint16_t*                           bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdac3ConfigBfSet(adi_adrv9025_Device_t*              device,
+                                                  adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                                  uint8_t                             bfValue);
+
+int32_t adrv9025_AnalogTxMemMapAuxdacLatchEnBfSet(adi_adrv9025_Device_t*              device,
+                                                  adrv9025_BfAnalogTxMemMapChanAddr_e baseAddr,
+                                                  uint8_t                             bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_analog_tx_mem_map_types.h

@@ -0,0 +1,38 @@
+/**
+ * \file adrv9025_bf_analog_tx_mem_map_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_ANALOG_TX_MEM_MAP_TYPES_H__
+#define __ADRV9025_BF_ANALOG_TX_MEM_MAP_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfAnalogTxMemMapChanAddr
+{
+    ADRV9025_BF_ALL_ANALOG_TX = 0xE00,
+    ADRV9025_BF_ANALOG_TX_CH1 = 0x5C00,
+    ADRV9025_BF_ANALOG_TX_CH2 = 0x5E00,
+    ADRV9025_BF_ANALOG_TX_CH3 = 0x6000,
+    ADRV9025_BF_ANALOG_TX_CH0 = 0x6200
+} adrv9025_BfAnalogTxMemMapChanAddr_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ADRV9025_BF_ANALOG_TX_MEM_MAP_TYPES_H__
+
+/*  EOF: adrv9025_bf_analog_tx_mem_map_types.h */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_core.h

@@ -0,0 +1,439 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_core.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_CORE_H__
+#define __ADRV9025_BF_CORE_H__
+#include "./../../private/include/adrv9025_bf_core_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_CoreArmCommandBusyBfGet(adi_adrv9025_Device_t*    device,
+                                         adrv9025_BfCoreChanAddr_e baseAddr,
+                                         uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreArmDCommandBusyBfGet(adi_adrv9025_Device_t*    device,
+                                          adrv9025_BfCoreChanAddr_e baseAddr,
+                                          uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreArmM3RunBfSet(adi_adrv9025_Device_t*    device,
+                                   adrv9025_BfCoreChanAddr_e baseAddr,
+                                   uint8_t                   bfValue);
+
+int32_t adrv9025_CoreArmOverrideControlBfSet(adi_adrv9025_Device_t*    device,
+                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                             uint8_t                   bfValue);
+
+int32_t adrv9025_CoreArmOverrideControlBfGet(adi_adrv9025_Device_t*    device,
+                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                             uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreAuxAdcClkDivide1BfSet(adi_adrv9025_Device_t*    device,
+                                           adrv9025_BfCoreChanAddr_e baseAddr,
+                                           uint8_t                   bfValue);
+
+int32_t adrv9025_CoreAuxAdcClkDivide1BfGet(adi_adrv9025_Device_t*    device,
+                                           adrv9025_BfCoreChanAddr_e baseAddr,
+                                           uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreAuxAdcClkDivide2BfSet(adi_adrv9025_Device_t*    device,
+                                           adrv9025_BfCoreChanAddr_e baseAddr,
+                                           uint8_t                   bfValue);
+
+int32_t adrv9025_CoreAuxAdcClkDivide2BfGet(adi_adrv9025_Device_t*    device,
+                                           adrv9025_BfCoreChanAddr_e baseAddr,
+                                           uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreAuxAdcClkPd1BfSet(adi_adrv9025_Device_t*    device,
+                                       adrv9025_BfCoreChanAddr_e baseAddr,
+                                       uint8_t                   bfValue);
+
+int32_t adrv9025_CoreAuxAdcClkPd2BfSet(adi_adrv9025_Device_t*    device,
+                                       adrv9025_BfCoreChanAddr_e baseAddr,
+                                       uint8_t                   bfValue);
+
+int32_t adrv9025_CoreEnCtrl0BfSet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t                   bfValue);
+
+int32_t adrv9025_CoreEnCtrl0BfGet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreEnCtrl1BfSet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t                   bfValue);
+
+int32_t adrv9025_CoreEnCtrl1BfGet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreEnCtrl2BfSet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t                   bfValue);
+
+int32_t adrv9025_CoreEnCtrl2BfGet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreEnCtrl3BfSet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t                   bfValue);
+
+int32_t adrv9025_CoreEnCtrl3BfGet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreEnCtrl4BfSet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t                   bfValue);
+
+int32_t adrv9025_CoreEnCtrl4BfGet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreEnCtrl5BfSet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t                   bfValue);
+
+int32_t adrv9025_CoreEnCtrl5BfGet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreEnCtrl6BfSet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t                   bfValue);
+
+int32_t adrv9025_CoreEnCtrl6BfGet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreEnCtrl7BfSet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t                   bfValue);
+
+int32_t adrv9025_CoreEnCtrl7BfGet(adi_adrv9025_Device_t*    device,
+                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                  uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreGpInterruptsMaskPin0BfSet(adi_adrv9025_Device_t*    device,
+                                               adrv9025_BfCoreChanAddr_e baseAddr,
+                                               uint64_t                  bfValue);
+
+int32_t adrv9025_CoreGpInterruptsMaskPin0BfGet(adi_adrv9025_Device_t*    device,
+                                               adrv9025_BfCoreChanAddr_e baseAddr,
+                                               uint64_t*                 bfValue);
+
+int32_t adrv9025_CoreGpInterruptsMaskPin1BfSet(adi_adrv9025_Device_t*    device,
+                                               adrv9025_BfCoreChanAddr_e baseAddr,
+                                               uint64_t                  bfValue);
+
+int32_t adrv9025_CoreGpInterruptsMaskPin1BfGet(adi_adrv9025_Device_t*    device,
+                                               adrv9025_BfCoreChanAddr_e baseAddr,
+                                               uint64_t*                 bfValue);
+
+int32_t adrv9025_CoreGpInterruptsStatusWordBfGet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint64_t*                 bfValue);
+
+int32_t adrv9025_CoreGpInterruptsStickyBitMaskBfSet(adi_adrv9025_Device_t*    device,
+                                                    adrv9025_BfCoreChanAddr_e baseAddr,
+                                                    uint64_t                  bfValue);
+
+int32_t adrv9025_CoreGpInterruptsStickyBitMaskBfGet(adi_adrv9025_Device_t*    device,
+                                                    adrv9025_BfCoreChanAddr_e baseAddr,
+                                                    uint64_t*                 bfValue);
+
+int32_t adrv9025_CoreGpioAnalogDirectionControlOeBfSet(adi_adrv9025_Device_t*    device,
+                                                       adrv9025_BfCoreChanAddr_e baseAddr,
+                                                       uint8_t                   bfValue);
+
+int32_t adrv9025_CoreGpioAnalogDirectionControlOeBfGet(adi_adrv9025_Device_t*    device,
+                                                       adrv9025_BfCoreChanAddr_e baseAddr,
+                                                       uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreGpioAnalogLowerNibbleSourceControlBfSet(adi_adrv9025_Device_t*    device,
+                                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                                             uint8_t                   bfValue);
+
+int32_t adrv9025_CoreGpioAnalogLowerNibbleSourceControlBfGet(adi_adrv9025_Device_t*    device,
+                                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                                             uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreGpioAnalogUpperNibbleSourceControlBfSet(adi_adrv9025_Device_t*    device,
+                                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                                             uint8_t                   bfValue);
+
+int32_t adrv9025_CoreGpioAnalogUpperNibbleSourceControlBfGet(adi_adrv9025_Device_t*    device,
+                                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                                             uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreGpioDirectionControlOeBfSet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint32_t                  bfValue);
+
+int32_t adrv9025_CoreGpioDirectionControlOeBfGet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint32_t*                 bfValue);
+
+int32_t adrv9025_CoreGpioExtraBitsSourceControlBfSet(adi_adrv9025_Device_t*    device,
+                                                     adrv9025_BfCoreChanAddr_e baseAddr,
+                                                     uint8_t                   bfValue);
+
+int32_t adrv9025_CoreGpioExtraBitsSourceControlBfGet(adi_adrv9025_Device_t*    device,
+                                                     adrv9025_BfCoreChanAddr_e baseAddr,
+                                                     uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreGpioLowerByteLowerNibbleSourceControlBfSet(adi_adrv9025_Device_t*    device,
+                                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                uint8_t                   bfValue);
+
+int32_t adrv9025_CoreGpioLowerByteLowerNibbleSourceControlBfGet(adi_adrv9025_Device_t*    device,
+                                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreGpioLowerByteUpperNibbleSourceControlBfSet(adi_adrv9025_Device_t*    device,
+                                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                uint8_t                   bfValue);
+
+int32_t adrv9025_CoreGpioLowerByteUpperNibbleSourceControlBfGet(adi_adrv9025_Device_t*    device,
+                                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreGpioSpiReadBfGet(adi_adrv9025_Device_t*    device,
+                                      adrv9025_BfCoreChanAddr_e baseAddr,
+                                      uint32_t*                 bfValue);
+
+int32_t adrv9025_CoreGpioSpiSourceBfSet(adi_adrv9025_Device_t*    device,
+                                        adrv9025_BfCoreChanAddr_e baseAddr,
+                                        uint32_t                  bfValue);
+
+int32_t adrv9025_CoreGpioSpiSourceBfGet(adi_adrv9025_Device_t*    device,
+                                        adrv9025_BfCoreChanAddr_e baseAddr,
+                                        uint32_t*                 bfValue);
+
+int32_t adrv9025_CoreGpioUpperByteLowerNibbleSourceControlBfSet(adi_adrv9025_Device_t*    device,
+                                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                uint8_t                   bfValue);
+
+int32_t adrv9025_CoreGpioUpperByteLowerNibbleSourceControlBfGet(adi_adrv9025_Device_t*    device,
+                                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreGpioUpperByteUpperNibbleSourceControlBfSet(adi_adrv9025_Device_t*    device,
+                                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                uint8_t                   bfValue);
+
+int32_t adrv9025_CoreGpioUpperByteUpperNibbleSourceControlBfGet(adi_adrv9025_Device_t*    device,
+                                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreMonitorOutBfSet(adi_adrv9025_Device_t*    device,
+                                     adrv9025_BfCoreChanAddr_e baseAddr,
+                                     uint8_t                   bfValue);
+
+int32_t adrv9025_CoreMonitorOutBfGet(adi_adrv9025_Device_t*    device,
+                                     adrv9025_BfCoreChanAddr_e baseAddr,
+                                     uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreOrxEnableBfSet(adi_adrv9025_Device_t*    device,
+                                    adrv9025_BfCoreChanAddr_e baseAddr,
+                                    uint8_t                   bfValue);
+
+int32_t adrv9025_CoreOrxEnableBfGet(adi_adrv9025_Device_t*    device,
+                                    adrv9025_BfCoreChanAddr_e baseAddr,
+                                    uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreOrxPinModeEnableBfSet(adi_adrv9025_Device_t*    device,
+                                           adrv9025_BfCoreChanAddr_e baseAddr,
+                                           uint8_t                   bfValue);
+
+int32_t adrv9025_CoreOrxPinModeEnableBfGet(adi_adrv9025_Device_t*    device,
+                                           adrv9025_BfCoreChanAddr_e baseAddr,
+                                           uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreOrxPinModeUsingSpiSelectBfSet(adi_adrv9025_Device_t*    device,
+                                                   adrv9025_BfCoreChanAddr_e baseAddr,
+                                                   uint8_t                   bfValue);
+
+int32_t adrv9025_CoreOrxPinModeUsingSpiSelectBfGet(adi_adrv9025_Device_t*    device,
+                                                   adrv9025_BfCoreChanAddr_e baseAddr,
+                                                   uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreOrxSelectInPinModeBfSet(adi_adrv9025_Device_t*    device,
+                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                             uint8_t                   bfValue);
+
+int32_t adrv9025_CoreOrxSelectInPinModeBfGet(adi_adrv9025_Device_t*    device,
+                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                             uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreOrxSingleChannelModeBfSet(adi_adrv9025_Device_t*    device,
+                                               adrv9025_BfCoreChanAddr_e baseAddr,
+                                               uint8_t                   bfValue);
+
+int32_t adrv9025_CoreOrxSingleChannelModeBfGet(adi_adrv9025_Device_t*    device,
+                                               adrv9025_BfCoreChanAddr_e baseAddr,
+                                               uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreOrxSingleChannelMode1aBfSet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t                   bfValue);
+
+int32_t adrv9025_CoreOrxSingleChannelMode1aBfGet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreOrxSingleChannelMode1aHighChannelEnableBfSet(adi_adrv9025_Device_t*    device,
+                                                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                  uint8_t                   bfValue);
+
+int32_t adrv9025_CoreOrxSingleChannelMode1aHighChannelEnableBfGet(adi_adrv9025_Device_t*    device,
+                                                                  adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                  uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreOrxSingleChannelMode1aLowChannelEnableBfSet(adi_adrv9025_Device_t*    device,
+                                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                 uint8_t                   bfValue);
+
+int32_t adrv9025_CoreOrxSingleChannelMode1aLowChannelEnableBfGet(adi_adrv9025_Device_t*    device,
+                                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                                 uint8_t*                  bfValue);
+
+int32_t adrv9025_CorePdAuxdacBfSet(adi_adrv9025_Device_t*    device,
+                                   adrv9025_BfCoreChanAddr_e baseAddr,
+                                   uint8_t                   bfValue);
+
+int32_t adrv9025_CorePdAuxdacBfGet(adi_adrv9025_Device_t*    device,
+                                   adrv9025_BfCoreChanAddr_e baseAddr,
+                                   uint8_t*                  bfValue);
+
+int32_t adrv9025_CorePinSelectSettlingDelayBfSet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t                   bfValue);
+
+int32_t adrv9025_CorePinSelectSettlingDelayBfGet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxOrxAnySourceMuxSel10BfSet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t                   bfValue);
+
+int32_t adrv9025_CoreRxOrxAnySourceMuxSel10BfGet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxOrxAnySourceMuxSel32BfSet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t                   bfValue);
+
+int32_t adrv9025_CoreRxOrxAnySourceMuxSel32BfGet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxOrxAnySourceMuxSel54BfSet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t                   bfValue);
+
+int32_t adrv9025_CoreRxOrxAnySourceMuxSel54BfGet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxOrxAnySourceMuxSel76BfSet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t                   bfValue);
+
+int32_t adrv9025_CoreRxOrxAnySourceMuxSel76BfGet(adi_adrv9025_Device_t*    device,
+                                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                                 uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxSync1PadLvdsModeBfGet(adi_adrv9025_Device_t*    device,
+                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                             uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxSync1PadLvdsPnInvBfGet(adi_adrv9025_Device_t*    device,
+                                              adrv9025_BfCoreChanAddr_e baseAddr,
+                                              uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxSync2PadLvdsModeBfGet(adi_adrv9025_Device_t*    device,
+                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                             uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxSync2PadLvdsPnInvBfGet(adi_adrv9025_Device_t*    device,
+                                              adrv9025_BfCoreChanAddr_e baseAddr,
+                                              uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxSync3PadLvdsModeBfGet(adi_adrv9025_Device_t*    device,
+                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                             uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreRxSync3PadLvdsPnInvBfGet(adi_adrv9025_Device_t*    device,
+                                              adrv9025_BfCoreChanAddr_e baseAddr,
+                                              uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreSpi2EnBfSet(adi_adrv9025_Device_t*    device,
+                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                 uint8_t                   bfValue);
+
+int32_t adrv9025_CoreSpi2EnBfGet(adi_adrv9025_Device_t*    device,
+                                 adrv9025_BfCoreChanAddr_e baseAddr,
+                                 uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreStreamProcGpioPinMaskBfSet(adi_adrv9025_Device_t*    device,
+                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                uint16_t                  bfValue);
+
+int32_t adrv9025_CoreStreamProcGpioPinMaskBfGet(adi_adrv9025_Device_t*    device,
+                                                adrv9025_BfCoreChanAddr_e baseAddr,
+                                                uint16_t*                 bfValue);
+
+int32_t adrv9025_CoreTxAttenUpdCoreSpiBfSet(adi_adrv9025_Device_t*    device,
+                                            adrv9025_BfCoreChanAddr_e baseAddr,
+                                            uint8_t                   bfValue);
+
+int32_t adrv9025_CoreTxAttenUpdCoreSpiEnBfSet(adi_adrv9025_Device_t*    device,
+                                              adrv9025_BfCoreChanAddr_e baseAddr,
+                                              uint8_t                   bfValue);
+
+int32_t adrv9025_CoreTxAttenUpdCoreSpiEnBfGet(adi_adrv9025_Device_t*    device,
+                                              adrv9025_BfCoreChanAddr_e baseAddr,
+                                              uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreTxSync1PadLvdsModeBfGet(adi_adrv9025_Device_t*    device,
+                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                             uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreTxSync1PadLvdsPnInvBfGet(adi_adrv9025_Device_t*    device,
+                                              adrv9025_BfCoreChanAddr_e baseAddr,
+                                              uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreTxSync2PadLvdsModeBfGet(adi_adrv9025_Device_t*    device,
+                                             adrv9025_BfCoreChanAddr_e baseAddr,
+                                             uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreTxSync2PadLvdsPnInvBfGet(adi_adrv9025_Device_t*    device,
+                                              adrv9025_BfCoreChanAddr_e baseAddr,
+                                              uint8_t*                  bfValue);
+
+int32_t adrv9025_CoreTxSyncDrvSelectBfGet(adi_adrv9025_Device_t*    device,
+                                          adrv9025_BfCoreChanAddr_e baseAddr,
+                                          uint8_t*                  bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_core_types.h

@@ -0,0 +1,34 @@
+/**
+ * \file adrv9025_bf_core_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_CORE_TYPES_H__
+#define __ADRV9025_BF_CORE_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfCoreChanAddr
+{
+    ADRV9025_BF_CORE = 0x0
+} adrv9025_BfCoreChanAddr_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ADRV9025_BF_CORE_TYPES_H__ */
+
+/*  EOF: adrv9025_bf_core_types.h */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_deser.h

@@ -0,0 +1,47 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_deser.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_DESER_H__
+#define __ADRV9025_BF_DESER_H__
+#include "./../../private/include/adrv9025_bf_deser_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_DeserCbusAddrDesRcBfSet(adi_adrv9025_Device_t*     device,
+                                         adrv9025_BfDeserChanAddr_e baseAddr,
+                                         uint8_t                    bfValue);
+
+int32_t adrv9025_DeserCbusRdataDesRsBfGet(adi_adrv9025_Device_t*     device,
+                                          adrv9025_BfDeserChanAddr_e baseAddr,
+                                          uint8_t*                   bfValue);
+
+int32_t adrv9025_DeserCbusRenDesRcChBfSet(adi_adrv9025_Device_t*     device,
+                                          adrv9025_BfDeserChanAddr_e baseAddr,
+                                          uint8_t                    bfValue);
+
+int32_t adrv9025_DeserCbusWdataDesRcBfSet(adi_adrv9025_Device_t*     device,
+                                          adrv9025_BfDeserChanAddr_e baseAddr,
+                                          uint8_t                    bfValue);
+
+int32_t adrv9025_DeserCbusWstrobeDesRcChBfSet(adi_adrv9025_Device_t*     device,
+                                              adrv9025_BfDeserChanAddr_e baseAddr,
+                                              uint8_t                    bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_deser_types.h

@@ -0,0 +1,49 @@
+/**
+ * \file adrv9025_bf_deser_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transciever device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_DESER_TYPES_H__
+#define __ADRV9025_BF_DESER_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfDeserChanAddr
+{
+     ADRV9025_BF_JESD_DESERIALIZER    =    0x6800
+} adrv9025_BfDeserChanAddr_e;
+
+/**
+ * \brief Enumeration for rxdivrateLcpllRc
+ */
+typedef enum adrv9025_BfDeserRxdivrateLcpllRc
+{
+    ADRV9025_BF_DESER_RXDIVRATE_LCPLL_RC_8          =    8   /*!< Half-rate CDR; 1X oversampling                                                                                                             */
+} adrv9025_BfDeserRxdivrateLcpllRc_e;
+/**
+ * \brief Enumeration for rxdivrateLcpllRs
+ */
+typedef enum adrv9025_BfDeserRxdivrateLcpllRs
+{
+    ADRV9025_BF_DESER_RXDIVRATE_LCPLL_RS_8          =    8   /*!< Half-rate CDR; 1X oversampling                                                                                                             */
+} adrv9025_BfDeserRxdivrateLcpllRs_e;
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ADRV9025_BF_DESER_TYPES_H__
+
+/*  EOF: adrv9025_bf_deser_types.h */
+

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_hal.h

@@ -0,0 +1,268 @@
+#ifndef ADRV9025_BF_HAL_H_
+#define ADRV9025_BF_HAL_H_
+
+#include <stdint.h>
+#include <stddef.h>
+
+#include "adi_adrv9025.h"
+#include "adi_common_hal.h"
+#include "./../../private/include/adrv9025_bf_hal_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* \brief allows the user to set the Write cache state.
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure.
+* \param wrCacheState the cache state to be set.
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfWriteCacheEn(adi_adrv9025_Device_t*      device,
+                                adrv9025_Bf_WrCache_State_e wrCacheState);
+
+/**
+* \brief allows the user to set the read cache state.
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure.
+* \param rdCacheState the cache state to be set.
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfReadCacheEn(adi_adrv9025_Device_t*      device,
+                               adrv9025_Bf_RdCache_State_e rdCacheState);
+
+/**
+* \brief ensures the cache is empty. if not it writes the cache to the part.
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure.
+*
+* \retval ADRV9025_ Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfReadCacheInit(adi_adrv9025_Device_t* device);
+
+/**
+* \brief ensures the cache is empty. if not it writes the cache to the part.
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure.
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfWriteCacheInit(adi_adrv9025_Device_t* device);
+
+/**
+* \brief Used to read a register.
+* Merges the write if merging is on
+* Caches the write if caching is on,
+* Immediately writes the value if caching is off.
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep{SPIARRAYSIZE}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure
+* \param addr The address of the Register to read.
+* \param regVal The value to be written to the register.
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfByteWrite(adi_adrv9025_Device_t* device,
+                             uint16_t               addr,
+                             uint8_t                regVal);
+
+/**
+* \brief Used to read a register.
+* Caches the read if caching is on, immediately reads the value with caching off.
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep{ADRV9025_BF_RDCACHE_ARRAY_TRIP_SIZE}
+* \dep{SPIARRAYSIZE}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure
+* \param addr The address of the Register to read.
+* \param regVal The value of the register just read.
+* \param endOfBf when using read caching the upper nibble of this field indicates the end of bitfield with the Value F.
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfByteRead(adi_adrv9025_Device_t* device,
+                            uint16_t               addr,
+                            uint8_t*               regVal,
+                            uint8_t                endOfBf);
+
+/**
+* \brief Used to write to a sub part of a register.
+* Caches the write if caching is on, immediately writes the value with caching off.
+* Uses the HW_RMW function if the HW_RMW is enabled otherwise used a spi transaction to read the register
+* and a spi write transaction to write the modified byte back to the register.
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep{SPIARRAYSIZE}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure
+* \param addr The Register address that contains the field.
+* \param fieldVal The value of the field to be written.
+* \param mask The mask to use when inserting the data into the register.
+* \param startBit The location of the first bit of the field within the register.
+* when using read caching the upper nibble of this field indicates the end of bitfield with the Value F.
+* This value is used to shift the value so that it aligns with the location of the field within the register.
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfFieldWrite(adi_adrv9025_Device_t* device,
+                              uint16_t               addr,
+                              uint8_t                fieldVal,
+                              uint8_t                mask,
+                              uint8_t                startBit);
+
+/**
+* \brief Used to read a sub part of a register
+* caches the read if caching is on, immediately read the value with caching off
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep{ADRV9025_BF_RDCACHE_ARRAY_TRIP_SIZE}
+* \dep{SPIARRAYSIZE}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure
+* \param addr The Register address that contains the field.
+* \param fieldVal The value of the field to be written.
+* \param mask The mask to use when inserting the data into the register.
+* \param startBit The location of the first bit of the field within the register.
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfFieldRead(adi_adrv9025_Device_t* device,
+                             uint16_t               addr,
+                             uint8_t*               fieldVal,
+                             uint8_t                mask,
+                             uint8_t                startBit);
+
+/**
+* \brief Used by the bitField API to ensure the cache is flushed when using BitField Caching
+* and to assemble the register bytes when caching is not used.
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure
+* \param rxBfData The raw data read from the registers prior to concatenation.
+* \param numRdBfData The number of elements used in the rdBfData.
+* \param rdData The assembled bitfield value.
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfReadAssembleData(adi_adrv9025_Device_t* device,
+                                    uint8_t*               rxBfData,
+                                    uint8_t                numRdBfData,
+                                    uint64_t*              rdData);
+
+/**
+* \brief Used to send multiple spi register reads in one spi transaction.
+*  multiple register data and sub register data is concatenated and shifted appropriately.
+*
+* warning ensure the rdData is big enough to contain the expected number of bitfield values
+*
+* \dep_begin
+* \dep{SPIARRAYSIZE}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure
+* \param rdData The bytefield data being returned in the order it was read.
+* \param numRxBitFields The number of bitfields being returned
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfReadCacheFlush(adi_adrv9025_Device_t* device,
+                                  uint64_t*              rdData,
+                                  uint16_t*              numRxBitFields);
+
+/**
+* \brief Used to send multiple spi register writes in one spi transaction.
+*  if the spi buffer size is exceeded the data will be sent in buffer size blocks.
+*  Only full bytes are written ie there are no RMW operations
+*
+* \dep_begin
+* \dep{device->common.cacheInfo}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device data structure
+*
+* \retval ADRV9025_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADRV9025_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADRV9025_ACT_ERR_RESET_SPI Recovery action for SPI reset required
+* \retval ADRV9025_ACT_NO_ACTION Function completed successfully, no action required
+*
+*/
+int32_t adrv9025_BfWriteCacheFlush(adi_adrv9025_Device_t* device);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ADRV9025_BF_HAL_H_ */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_hal_types.h

@@ -0,0 +1,45 @@
+/**
+* \brief Contains BitField definitions to support ADRV9025 transciever device.
+*
+*/
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef __ADRV9025_BF_HAL_TYPES_H__
+#define __ADRV9025_BF_HAL_TYPES_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* \brief Enum of all possible states of SPI write Caching.
+*/
+typedef enum adrv9025_Bf_WrCache_State
+{
+    ADRV9025_WR_CACHE_OFF       = 0x0,  /*!< disable caching. spi writes will occur immediately and HW-RMW will not be used*/
+    ADRV9025_WR_HW_RMW_ON       = 0x1,  /*!< use the Hardware Read-Modify-write if it is enabled.*/
+    ADRV9025_WR_BF_CACHE_ON     = 0x2,  /*!< use caching only within a bitfield function. cache is auto flushed at the end of the function.*/
+    ADRV9025_WR_GBL_CACHE_ON    = 0x4,  /*!< use caching for multiple bitfield functions. cache is auto flushed when cache is full.*/
+    ADRV9025_WR_GBL_MERGE_ON    = 0x8   /*!< use merging to combine multiple bitfield field functions. cache is auto flushed when cache is full.*/
+} adrv9025_Bf_WrCache_State_e;
+ 
+/**
+* \brief Enum of all possible states of SPI Read Caching .
+*/
+typedef enum adrv9025_Bf_RdCache_State
+{
+    ADRV9025_RD_CACHE_OFF       = 0x0,  /*!< disable caching. spi reads will occurr immediately*/
+    ADRV9025_RD_BF_CACHE_ON     = 0x1,  /*!< use caching only within a bitfield function. cache is auto flushed at the end of the function.*/
+    ADRV9025_RD_GBL_CACHE_ON    = 0x2   /*!< use caching for multiple bitfield functions. the user must managing flushing*/
+} adrv9025_Bf_RdCache_State_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ADRV9025_BF_HAL_TYPES_H__

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_jesd_common.h

@@ -0,0 +1,115 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_jesd_common.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_JESD_COMMON_H__
+#define __ADRV9025_BF_JESD_COMMON_H__
+#include "./../../private/include/adrv9025_bf_jesd_common_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_JesdCommonJrxTestLaneClearErrorsBfSet(adi_adrv9025_Device_t*          device,
+                                                       adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                       uint8_t                         bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestLaneErrorCountBfGet(adi_adrv9025_Device_t*          device,
+                                                      adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                      uint8_t                         channelId,
+                                                      uint32_t*                       bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestLaneErrorFlagBfGet(adi_adrv9025_Device_t*          device,
+                                                     adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                     uint8_t                         channelId,
+                                                     uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestLaneInvBfGet(adi_adrv9025_Device_t*          device,
+                                               adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                               uint8_t                         channelId,
+                                               uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestLaneInvalidDataFlagBfGet(adi_adrv9025_Device_t*          device,
+                                                           adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                           uint8_t                         channelId,
+                                                           uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestLaneUpdateErrorCountBfSet(adi_adrv9025_Device_t*          device,
+                                                            adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                            uint8_t                         bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestModeBfSet(adi_adrv9025_Device_t*          device,
+                                            adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                            uint8_t                         bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestModeBfGet(adi_adrv9025_Device_t*          device,
+                                            adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                            uint8_t*                        bfValue);
+ 
+int32_t adrv9025_JesdCommonJrxTestSampleClearErrorsBfSet(adi_adrv9025_Device_t*          device,
+                                                         adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                         uint8_t                         bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestSampleClearErrorsBfGet(adi_adrv9025_Device_t*          device,
+                                                         adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                         uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestSampleErrorCountBfGet(adi_adrv9025_Device_t*          device,
+                                                        adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                        uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestSampleErrorFlagBfGet(adi_adrv9025_Device_t*          device,
+                                                       adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                       uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestSampleUpdateErrorCountBfSet(adi_adrv9025_Device_t*          device,
+                                                              adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                              uint8_t                         bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestSourceBfSet(adi_adrv9025_Device_t*          device,
+                                              adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                              uint8_t                         bfValue);
+
+int32_t adrv9025_JesdCommonJrxTestSourceBfGet(adi_adrv9025_Device_t*          device,
+                                              adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                              uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJtxLinkEnBfGet(adi_adrv9025_Device_t*          device,
+                                          adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                          uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJtxOverrideSrstEnBfSet(adi_adrv9025_Device_t*          device,
+                                                  adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                  uint8_t                         bfValue);
+
+int32_t adrv9025_JesdCommonJtxOverrideSrstEnBfGet(adi_adrv9025_Device_t*          device,
+                                                  adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                  uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJtxTriggerSrstNBfSet(adi_adrv9025_Device_t*          device,
+                                                adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                uint8_t                         bfValue);
+
+int32_t adrv9025_JesdCommonJtxTriggerSrstNBfGet(adi_adrv9025_Device_t*          device,
+                                                adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                                uint8_t*                        bfValue);
+
+int32_t adrv9025_JesdCommonJrxLinkEnBfGet(adi_adrv9025_Device_t*          device,
+                                          adrv9025_BfJesdCommonChanAddr_e baseAddr,
+                                          uint8_t*                        bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_jesd_common_types.h

@@ -0,0 +1,34 @@
+/**
+ * \file adrv9025_bf_jesd_common_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_JESD_COMMON_TYPES_H__
+#define __ADRV9025_BF_JESD_COMMON_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfJesdCommonChanAddr
+{
+    ADRV9025_BF_JESD_COMMON = 0x6600
+} adrv9025_BfJesdCommonChanAddr_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ADRV9025_BF_JESD_COMMON_TYPES_H__ */
+
+/*  EOF: adrv9025_bf_jesd_common_types.h */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_jrx_link.h

@@ -0,0 +1,374 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_jrx_link.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_JRX_LINK_H__
+#define __ADRV9025_BF_JRX_LINK_H__
+#include "./../../private/include/adrv9025_bf_jrx_link_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_JrxLinkJrxChksumCfgBfGet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      channelId,
+                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxConvSelBfSet(adi_adrv9025_Device_t*       device,
+                                        adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                        uint8_t                      channelId,
+                                        uint8_t                      bfValue);
+
+int32_t adrv9025_JrxLinkJrxConvSelBfGet(adi_adrv9025_Device_t*       device,
+                                        adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                        uint8_t                      channelId,
+                                        uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxCsCfgBfGet(adi_adrv9025_Device_t*       device,
+                                      adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                      uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDidCfgBfGet(adi_adrv9025_Device_t*       device,
+                                       adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                       uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bBdCntBfGet(adi_adrv9025_Device_t*       device,
+                                            adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                            uint8_t                      channelId,
+                                            uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bBdeBfGet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      channelId,
+                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bCgsBfGet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      channelId,
+                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bCksBfGet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      channelId,
+                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bEcntEnaBfSet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                              uint8_t                      channelId,
+                                              uint8_t                      bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bEcntEnaBfGet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                              uint8_t                      channelId,
+                                              uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bEcntRstBfSet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                              uint8_t                      channelId,
+                                              uint8_t                      bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bEcntTchBfSet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                              uint8_t                      channelId,
+                                              uint8_t                      bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bEcntTchBfGet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                              uint8_t                      channelId,
+                                              uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bEofEventBfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bEomfEventBfGet(adi_adrv9025_Device_t*       device,
+                                                adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                uint8_t                      channelId,
+                                                uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bEthBfSet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bFsBfGet(adi_adrv9025_Device_t*       device,
+                                         adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                         uint8_t                      channelId,
+                                         uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bFsLostBfGet(adi_adrv9025_Device_t*       device,
+                                             adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                             uint8_t                      channelId,
+                                             uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bIldBfGet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      channelId,
+                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bIlsBfGet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      channelId,
+                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bIrqClrBfSet(adi_adrv9025_Device_t*       device,
+                                             adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                             uint16_t                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bIrqClrBfGet(adi_adrv9025_Device_t*       device,
+                                             adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                             uint16_t*                    bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bIrqVecBfGet(adi_adrv9025_Device_t*       device,
+                                             adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                             uint8_t                      channelId,
+                                             uint16_t*                    bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg0BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg1BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg10BfGet(adi_adrv9025_Device_t*       device,
+                                                adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                uint8_t                      channelId,
+                                                uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg13BfGet(adi_adrv9025_Device_t*       device,
+                                                adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                uint8_t                      channelId,
+                                                uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg2BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg3BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg4BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg5BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg6BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg7BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg8BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bL0Rxcfg9BfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bNitBfGet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      channelId,
+                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bNitCntBfGet(adi_adrv9025_Device_t*       device,
+                                             adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                             uint8_t                      channelId,
+                                             uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bSyncNBfGet(adi_adrv9025_Device_t*       device,
+                                            adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                            uint8_t                      channelId,
+                                            uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bUekBfGet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      channelId,
+                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bUekCntBfGet(adi_adrv9025_Device_t*       device,
+                                             adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                             uint8_t                      channelId,
+                                             uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bUserDataBfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint8_t                      channelId,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204bValidCksumBfGet(adi_adrv9025_Device_t*       device,
+                                                 adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                 uint8_t                      channelId,
+                                                 uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204cMbReqdCfgBfGet(adi_adrv9025_Device_t*       device,
+                                                adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204cStateGet(adi_adrv9025_Device_t*       device,
+                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                          uint8_t                      channelId,
+                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204hIrqClrBfSet(adi_adrv9025_Device_t*       device,
+                                             adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                             uint16_t                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxDl204hIrqClrBfGet(adi_adrv9025_Device_t*       device,
+                                             adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                             uint16_t*                    bfValue);
+
+int32_t adrv9025_JrxLinkJrxDscrCfgBfGet(adi_adrv9025_Device_t*       device,
+                                        adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                        uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxFCfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxHdCfgBfGet(adi_adrv9025_Device_t*       device,
+                                      adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                      uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxKCfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxLCfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxLidCfgBfGet(adi_adrv9025_Device_t*       device,
+                                       adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                       uint8_t                      channelId,
+                                       uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxLinkLaneSelBfGet(adi_adrv9025_Device_t*       device,
+                                            adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                            uint8_t                      channelId,
+                                            uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxLinkTypeBfGet(adi_adrv9025_Device_t*       device,
+                                         adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                         uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxMCfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxNCfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxNpCfgBfGet(adi_adrv9025_Device_t*       device,
+                                      adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                      uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxSCfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxSyncNSelBfGet(adi_adrv9025_Device_t*       device,
+                                         adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                         uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxSysrefForRelinkBfGet(adi_adrv9025_Device_t*       device,
+                                                adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxSysrefForStartupBfGet(adi_adrv9025_Device_t*       device,
+                                                 adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                 uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplPhaseAdjustBfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                               uint16_t*                    bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplSysrefIgnoreWhenLinkedBfGet(adi_adrv9025_Device_t*       device,
+                                                          adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplSysrefMaskBfSet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                              uint8_t                      bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplSysrefMaskBfGet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                              uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplSysrefNShotCountBfGet(adi_adrv9025_Device_t*       device,
+                                                    adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                    uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplSysrefNShotEnableBfGet(adi_adrv9025_Device_t*       device,
+                                                     adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplSysrefRcvdBfGet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                              uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplUsrDataRdyBfGet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                              uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplBufDepthBfGet(adi_adrv9025_Device_t       *device,
+                                            adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                            uint8_t                      channelId,
+                                            uint8_t                     *bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplBufProtectionBfGet(adi_adrv9025_Device_t       *device,
+                                                 adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                 uint8_t                     *bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplBufProtectEnBfSet(adi_adrv9025_Device_t       *device,
+                                                adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                uint8_t                      bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplBufProtectEnBfGet(adi_adrv9025_Device_t       *device,
+                                                adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                                uint8_t*                     bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplPhaseAdjustBfSet(adi_adrv9025_Device_t        *device,
+                                               adrv9025_BfJrxLinkChanAddr_e  baseAddr,
+                                               uint16_t                      bfValue);
+
+int32_t adrv9025_JrxLinkJrxTplPhaseDiffBfGet(adi_adrv9025_Device_t       *device,
+                                             adrv9025_BfJrxLinkChanAddr_e baseAddr,
+                                             uint8_t                      channelId,
+                                             uint8_t                     *bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_jrx_link_types.h

@@ -0,0 +1,35 @@
+/**
+ * \file adrv9025_bf_jrx_link_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_JRX_LINK_TYPES_H__
+#define __ADRV9025_BF_JRX_LINK_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfJrxLinkChanAddr
+{
+    ADRV9025_BF_JRX_LINK0 = 0x6A00,
+    ADRV9025_BF_JRX_LINK1 = 0x6C00
+} adrv9025_BfJrxLinkChanAddr_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ADRV9025_BF_JRX_LINK_TYPES_H__
+
+/*  EOF: adrv9025_bf_jrx_link_types.h */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_jtx_link.h

@@ -0,0 +1,168 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_jtx_link.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_JTX_LINK_H__
+#define __ADRV9025_BF_JTX_LINK_H__
+#include "./../../private/include/adrv9025_bf_jtx_link_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_JtxLinkJtxBidCfgBfGet(adi_adrv9025_Device_t*       device,
+                                       adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                       uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxConvSelBfSet(adi_adrv9025_Device_t*       device,
+                                        adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                        uint8_t                      channelId,
+                                        uint8_t                      bfValue);
+
+int32_t adrv9025_JtxLinkJtxConvSelBfGet(adi_adrv9025_Device_t*       device,
+                                        adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                        uint8_t                      channelId,
+                                        uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxDidCfgBfGet(adi_adrv9025_Device_t*       device,
+                                       adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                       uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxDl204bStateBfGet(adi_adrv9025_Device_t*       device,
+                                            adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                            uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxDl204bSyncNBfGet(adi_adrv9025_Device_t*       device,
+                                            adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                            uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxDl204bSyncNeCountBfGet(adi_adrv9025_Device_t*       device,
+                                                  adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                                  uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxDl204cSysrefRcvdGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                               uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxECfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxFCfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxKCfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxLaneInvBfSet(adi_adrv9025_Device_t*       device,
+                                        adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                        uint8_t                      channelId,
+                                        uint8_t                      bfValue);
+
+int32_t adrv9025_JtxLinkJtxLaneInvBfGet(adi_adrv9025_Device_t*       device,
+                                        adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                        uint8_t                      channelId,
+                                        uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxLaneSelBfGet(adi_adrv9025_Device_t*       device,
+                                        adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                        uint8_t                      channelId,
+                                        uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxLidCfgBfGet(adi_adrv9025_Device_t*       device,
+                                       adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                       uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxMCfgBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxNpCfgBfGet(adi_adrv9025_Device_t*       device,
+                                      adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                      uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxScrCfgBfGet(adi_adrv9025_Device_t*       device,
+                                       adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                       uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxSyncNSelBfGet(adi_adrv9025_Device_t*       device,
+                                         adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                         uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxSysrefForRelinkBfGet(adi_adrv9025_Device_t*       device,
+                                                adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                                uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxSysrefForStartupBfGet(adi_adrv9025_Device_t*       device,
+                                                 adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                                 uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxTestGenModeBfSet(adi_adrv9025_Device_t*       device,
+                                            adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                            uint8_t                      bfValue);
+
+int32_t adrv9025_JtxLinkJtxTestGenModeBfGet(adi_adrv9025_Device_t*       device,
+                                            adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                            uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxTestGenSelBfSet(adi_adrv9025_Device_t*       device,
+                                           adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                           uint8_t                      bfValue);
+
+int32_t adrv9025_JtxLinkJtxTestGenSelBfGet(adi_adrv9025_Device_t*       device,
+                                           adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                           uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxTplCfgInvalidBfGet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                              uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxTplPhaseAdjustBfGet(adi_adrv9025_Device_t*       device,
+                                               adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                               uint16_t*                    bfValue);
+
+int32_t adrv9025_JtxLinkJtxTplSysrefIgnoreWhenLinkedBfGet(adi_adrv9025_Device_t*       device,
+                                                          adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                                          uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxTplSysrefMaskBfSet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                              uint8_t                      bfValue);
+
+int32_t adrv9025_JtxLinkJtxTplSysrefMaskBfGet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                              uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxTplSysrefNShotCountBfGet(adi_adrv9025_Device_t*       device,
+                                                    adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                                    uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxTplSysrefNShotEnableBfGet(adi_adrv9025_Device_t*       device,
+                                                     adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                                     uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxTplSysrefPhaseErrBfGet(adi_adrv9025_Device_t*       device,
+                                                  adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                                  uint8_t*                     bfValue);
+
+int32_t adrv9025_JtxLinkJtxTplSysrefRcvdBfGet(adi_adrv9025_Device_t*       device,
+                                              adrv9025_BfJtxLinkChanAddr_e baseAddr,
+                                              uint8_t*                     bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_jtx_link_types.h

@@ -0,0 +1,36 @@
+/**
+ * \file adrv9025_bf_jtx_link_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_JTX_LINK_TYPES_H__
+#define __ADRV9025_BF_JTX_LINK_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfJtxLinkChanAddr
+{
+    ADRV9025_BF_JTX_LINK0 = 0x6E00,
+    ADRV9025_BF_JTX_LINK1 = 0x7000,
+    ADRV9025_BF_JTX_LINK2 = 0x7200
+} adrv9025_BfJtxLinkChanAddr_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ADRV9025_BF_JTX_LINK_TYPES_H__
+
+/*  EOF: adrv9025_bf_jtx_link_types.h */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_orx.h

@@ -0,0 +1,367 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_orx.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_ORX_H__
+#define __ADRV9025_BF_ORX_H__
+#include "./../../private/include/adrv9025_bf_orx_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_OrxAgcEnableFastRecoveryLoopBfSet(adi_adrv9025_Device_t*   device,
+                                                   adrv9025_BfOrxChanAddr_e baseAddr,
+                                                   uint8_t                  bfValue);
+
+int32_t adrv9025_OrxAuxAdcDecimationCtlBfSet(adi_adrv9025_Device_t*   device,
+                                             adrv9025_BfOrxChanAddr_e baseAddr,
+                                             uint8_t                  bfValue);
+
+int32_t adrv9025_OrxAuxAdcPdBfSet(adi_adrv9025_Device_t*   device,
+                                  adrv9025_BfOrxChanAddr_e baseAddr,
+                                  uint8_t                  bfValue);
+
+int32_t adrv9025_OrxAuxAdcPdBfGet(adi_adrv9025_Device_t*   device,
+                                  adrv9025_BfOrxChanAddr_e baseAddr,
+                                  uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxAuxAdcReadBfGet(adi_adrv9025_Device_t*   device,
+                                    adrv9025_BfOrxChanAddr_e baseAddr,
+                                    uint16_t*                bfValue);
+
+int32_t adrv9025_OrxAuxAdcReadbackLockBfSet(adi_adrv9025_Device_t*   device,
+                                            adrv9025_BfOrxChanAddr_e baseAddr,
+                                            uint8_t                  bfValue);
+
+int32_t adrv9025_OrxAuxAdcResetBfSet(adi_adrv9025_Device_t*   device,
+                                     adrv9025_BfOrxChanAddr_e baseAddr,
+                                     uint8_t                  bfValue);
+
+int32_t adrv9025_OrxAuxAdcSelBfSet(adi_adrv9025_Device_t*   device,
+                                   adrv9025_BfOrxChanAddr_e baseAddr,
+                                   uint8_t                  bfValue);
+
+int32_t adrv9025_OrxAuxAdcSelBfGet(adi_adrv9025_Device_t*   device,
+                                   adrv9025_BfOrxChanAddr_e baseAddr,
+                                   uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxBbdcLoopback1TrackingEnableBfSet(adi_adrv9025_Device_t*   device,
+                                                     adrv9025_BfOrxChanAddr_e baseAddr,
+                                                     uint8_t                  bfValue);
+
+int32_t adrv9025_OrxBbdcLoopback1TrackingEnableBfGet(adi_adrv9025_Device_t*   device,
+                                                     adrv9025_BfOrxChanAddr_e baseAddr,
+                                                     uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxBbdcLoopback2TrackingEnableBfSet(adi_adrv9025_Device_t*   device,
+                                                     adrv9025_BfOrxChanAddr_e baseAddr,
+                                                     uint8_t                  bfValue);
+
+int32_t adrv9025_OrxBbdcLoopback2TrackingEnableBfGet(adi_adrv9025_Device_t*   device,
+                                                     adrv9025_BfOrxChanAddr_e baseAddr,
+                                                     uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxBbdcLoopbackMShiftBfSet(adi_adrv9025_Device_t*   device,
+                                            adrv9025_BfOrxChanAddr_e baseAddr,
+                                            uint8_t                  bfValue);
+
+int32_t adrv9025_OrxBbdcLoopbackMShiftBfGet(adi_adrv9025_Device_t*   device,
+                                            adrv9025_BfOrxChanAddr_e baseAddr,
+                                            uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxBbdcMShiftBfSet(adi_adrv9025_Device_t*   device,
+                                    adrv9025_BfOrxChanAddr_e baseAddr,
+                                    uint8_t                  bfValue);
+
+int32_t adrv9025_OrxBbdcMShiftBfGet(adi_adrv9025_Device_t*   device,
+                                    adrv9025_BfOrxChanAddr_e baseAddr,
+                                    uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxBbdcOrx2MShiftBfSet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t                  bfValue);
+
+int32_t adrv9025_OrxBbdcOrx2MShiftBfGet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxBbdcOrx2TrackingEnableBfSet(adi_adrv9025_Device_t*   device,
+                                                adrv9025_BfOrxChanAddr_e baseAddr,
+                                                uint8_t                  bfValue);
+
+int32_t adrv9025_OrxBbdcOrx2TrackingEnableBfGet(adi_adrv9025_Device_t*   device,
+                                                adrv9025_BfOrxChanAddr_e baseAddr,
+                                                uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxBbdcTrackingEnableBfSet(adi_adrv9025_Device_t*   device,
+                                            adrv9025_BfOrxChanAddr_e baseAddr,
+                                            uint8_t                  bfValue);
+
+int32_t adrv9025_OrxBbdcTrackingEnableBfGet(adi_adrv9025_Device_t*   device,
+                                            adrv9025_BfOrxChanAddr_e baseAddr,
+                                            uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxDecPowerBfGet(adi_adrv9025_Device_t*   device,
+                                  adrv9025_BfOrxChanAddr_e baseAddr,
+                                  uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxDynamicSlicerAgcSyncEnableBfSet(adi_adrv9025_Device_t*   device,
+                                                    adrv9025_BfOrxChanAddr_e baseAddr,
+                                                    uint8_t                  bfValue);
+
+int32_t adrv9025_OrxDynamicSlicerAgcSyncEnableBfGet(adi_adrv9025_Device_t*   device,
+                                                    adrv9025_BfOrxChanAddr_e baseAddr,
+                                                    uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxDynamicSlicerModeEnBfSet(adi_adrv9025_Device_t*   device,
+                                             adrv9025_BfOrxChanAddr_e baseAddr,
+                                             uint8_t                  bfValue);
+
+int32_t adrv9025_OrxDynamicSlicerModeEnBfGet(adi_adrv9025_Device_t*   device,
+                                             adrv9025_BfOrxChanAddr_e baseAddr,
+                                             uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxDynamicSlicerResendBfSet(adi_adrv9025_Device_t*   device,
+                                             adrv9025_BfOrxChanAddr_e baseAddr,
+                                             uint8_t                  bfValue);
+
+int32_t adrv9025_OrxDynamicSlicerSyncHeadBfSet(adi_adrv9025_Device_t*   device,
+                                               adrv9025_BfOrxChanAddr_e baseAddr,
+                                               uint32_t                 bfValue);
+
+int32_t adrv9025_OrxDynamicSlicerSyncHeadBfGet(adi_adrv9025_Device_t*   device,
+                                               adrv9025_BfOrxChanAddr_e baseAddr,
+                                               uint32_t*                bfValue);
+
+int32_t adrv9025_OrxFpEnBfSet(adi_adrv9025_Device_t*   device,
+                              adrv9025_BfOrxChanAddr_e baseAddr,
+                              uint8_t                  bfValue);
+
+int32_t adrv9025_OrxFpEnBfGet(adi_adrv9025_Device_t*   device,
+                              adrv9025_BfOrxChanAddr_e baseAddr,
+                              uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxFpExponentBitsBfSet(adi_adrv9025_Device_t*         device,
+                                        adrv9025_BfOrxChanAddr_e       baseAddr,
+                                        adrv9025_BfOrxFpExponentBits_e bfValue);
+
+int32_t adrv9025_OrxFpExponentBitsBfGet(adi_adrv9025_Device_t*          device,
+                                        adrv9025_BfOrxChanAddr_e        baseAddr,
+                                        adrv9025_BfOrxFpExponentBits_e* bfValue);
+
+int32_t adrv9025_OrxFpFloatDataFormatBfSet(adi_adrv9025_Device_t*   device,
+                                           adrv9025_BfOrxChanAddr_e baseAddr,
+                                           uint8_t                  bfValue);
+
+int32_t adrv9025_OrxFpFloatDataFormatBfGet(adi_adrv9025_Device_t*   device,
+                                           adrv9025_BfOrxChanAddr_e baseAddr,
+                                           uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxFpHideLeadingOnesBfSet(adi_adrv9025_Device_t*   device,
+                                           adrv9025_BfOrxChanAddr_e baseAddr,
+                                           uint8_t                  bfValue);
+
+int32_t adrv9025_OrxFpHideLeadingOnesBfGet(adi_adrv9025_Device_t*   device,
+                                           adrv9025_BfOrxChanAddr_e baseAddr,
+                                           uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxFpIntDataAttenBfSet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t                  bfValue);
+
+int32_t adrv9025_OrxFpIntDataAttenBfGet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxFpNanEncEnBfSet(adi_adrv9025_Device_t*   device,
+                                    adrv9025_BfOrxChanAddr_e baseAddr,
+                                    uint8_t                  bfValue);
+
+int32_t adrv9025_OrxFpNanEncEnBfGet(adi_adrv9025_Device_t*   device,
+                                    adrv9025_BfOrxChanAddr_e baseAddr,
+                                    uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxFpRoundModeBfSet(adi_adrv9025_Device_t*      device,
+                                     adrv9025_BfOrxChanAddr_e    baseAddr,
+                                     adrv9025_BfOrxFpRoundMode_e bfValue);
+
+int32_t adrv9025_OrxFpRoundModeBfGet(adi_adrv9025_Device_t*       device,
+                                     adrv9025_BfOrxChanAddr_e     baseAddr,
+                                     adrv9025_BfOrxFpRoundMode_e* bfValue);
+
+int32_t adrv9025_OrxGainCompEnableBfSet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t                  bfValue);
+
+int32_t adrv9025_OrxGainCompEnableBfGet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxGainCompForExtGainBfSet(adi_adrv9025_Device_t*   device,
+                                            adrv9025_BfOrxChanAddr_e baseAddr,
+                                            uint8_t                  bfValue);
+
+int32_t adrv9025_OrxGainCompForExtGainBfGet(adi_adrv9025_Device_t*   device,
+                                            adrv9025_BfOrxChanAddr_e baseAddr,
+                                            uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxGainCompForTempGainBfSet(adi_adrv9025_Device_t*   device,
+                                             adrv9025_BfOrxChanAddr_e baseAddr,
+                                             uint8_t                  bfValue);
+
+int32_t adrv9025_OrxGainCompForTempGainBfGet(adi_adrv9025_Device_t*   device,
+                                             adrv9025_BfOrxChanAddr_e baseAddr,
+                                             uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxIntDataFormatBfSet(adi_adrv9025_Device_t*   device,
+                                       adrv9025_BfOrxChanAddr_e baseAddr,
+                                       uint8_t                  bfValue);
+
+int32_t adrv9025_OrxIntDataFormatBfGet(adi_adrv9025_Device_t*   device,
+                                       adrv9025_BfOrxChanAddr_e baseAddr,
+                                       uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxIntDataResolutionBfSet(adi_adrv9025_Device_t*   device,
+                                           adrv9025_BfOrxChanAddr_e baseAddr,
+                                           uint8_t                  bfValue);
+
+int32_t adrv9025_OrxIntDataResolutionBfGet(adi_adrv9025_Device_t*   device,
+                                           adrv9025_BfOrxChanAddr_e baseAddr,
+                                           uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxIntEmbedSlicerBfSet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t                  bfValue);
+
+int32_t adrv9025_OrxIntEmbedSlicerBfGet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxIntEmbedSlicerNumberBfSet(adi_adrv9025_Device_t*   device,
+                                              adrv9025_BfOrxChanAddr_e baseAddr,
+                                              uint8_t                  bfValue);
+
+int32_t adrv9025_OrxIntEmbedSlicerNumberBfGet(adi_adrv9025_Device_t*   device,
+                                              adrv9025_BfOrxChanAddr_e baseAddr,
+                                              uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxIntEmbedSlicerPosBfSet(adi_adrv9025_Device_t*   device,
+                                           adrv9025_BfOrxChanAddr_e baseAddr,
+                                           uint8_t                  bfValue);
+
+int32_t adrv9025_OrxIntEmbedSlicerPosBfGet(adi_adrv9025_Device_t*   device,
+                                           adrv9025_BfOrxChanAddr_e baseAddr,
+                                           uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxIntEvenParityBfSet(adi_adrv9025_Device_t*   device,
+                                       adrv9025_BfOrxChanAddr_e baseAddr,
+                                       uint8_t                  bfValue);
+
+int32_t adrv9025_OrxIntEvenParityBfGet(adi_adrv9025_Device_t*   device,
+                                       adrv9025_BfOrxChanAddr_e baseAddr,
+                                       uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxIntParitySupportBfSet(adi_adrv9025_Device_t*   device,
+                                          adrv9025_BfOrxChanAddr_e baseAddr,
+                                          uint8_t                  bfValue);
+
+int32_t adrv9025_OrxIntParitySupportBfGet(adi_adrv9025_Device_t*   device,
+                                          adrv9025_BfOrxChanAddr_e baseAddr,
+                                          uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxIntSlicerLsbOnQBfSet(adi_adrv9025_Device_t*   device,
+                                         adrv9025_BfOrxChanAddr_e baseAddr,
+                                         uint8_t                  bfValue);
+
+int32_t adrv9025_OrxIntSlicerLsbOnQBfGet(adi_adrv9025_Device_t*   device,
+                                         adrv9025_BfOrxChanAddr_e baseAddr,
+                                         uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxMaxSlicerOverrideBfSet(adi_adrv9025_Device_t*   device,
+                                           adrv9025_BfOrxChanAddr_e baseAddr,
+                                           uint8_t                  bfValue);
+
+int32_t adrv9025_OrxOrx1AgcGainIndexBfGet(adi_adrv9025_Device_t*   device,
+                                          adrv9025_BfOrxChanAddr_e baseAddr,
+                                          uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxOrx1AgcManualGainIndexBfSet(adi_adrv9025_Device_t*   device,
+                                                adrv9025_BfOrxChanAddr_e baseAddr,
+                                                uint8_t                  bfValue);
+
+int32_t adrv9025_OrxOrx1AgcManualGainIndexBfGet(adi_adrv9025_Device_t*   device,
+                                                adrv9025_BfOrxChanAddr_e baseAddr,
+                                                uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxOrx1AgcSetupBfSet(adi_adrv9025_Device_t*   device,
+                                      adrv9025_BfOrxChanAddr_e baseAddr,
+                                      uint8_t                  bfValue);
+
+int32_t adrv9025_OrxOrx1AgcSetupBfGet(adi_adrv9025_Device_t*   device,
+                                      adrv9025_BfOrxChanAddr_e baseAddr,
+                                      uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxOrx2AgcGainIndexBfGet(adi_adrv9025_Device_t*   device,
+                                          adrv9025_BfOrxChanAddr_e baseAddr,
+                                          uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxOrx2AgcManualGainIndexBfSet(adi_adrv9025_Device_t*   device,
+                                                adrv9025_BfOrxChanAddr_e baseAddr,
+                                                uint8_t                  bfValue);
+
+int32_t adrv9025_OrxOrx2AgcManualGainIndexBfGet(adi_adrv9025_Device_t*   device,
+                                                adrv9025_BfOrxChanAddr_e baseAddr,
+                                                uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxOrx2AgcSetupBfSet(adi_adrv9025_Device_t*   device,
+                                      adrv9025_BfOrxChanAddr_e baseAddr,
+                                      uint8_t                  bfValue);
+
+int32_t adrv9025_OrxOrx2AgcSetupBfGet(adi_adrv9025_Device_t*   device,
+                                      adrv9025_BfOrxChanAddr_e baseAddr,
+                                      uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxRxTempGainCompBfSet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t                  bfValue);
+
+int32_t adrv9025_OrxRxTempGainCompBfGet(adi_adrv9025_Device_t*   device,
+                                        adrv9025_BfOrxChanAddr_e baseAddr,
+                                        uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxRxdpSlicerPinCntrlGpioSelectBfGet(adi_adrv9025_Device_t*   device,
+                                                      adrv9025_BfOrxChanAddr_e baseAddr,
+                                                      uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxRxdpSlicerPositionBfGet(adi_adrv9025_Device_t*   device,
+                                            adrv9025_BfOrxChanAddr_e baseAddr,
+                                            uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxSlicerPinControlStepBfSet(adi_adrv9025_Device_t*   device,
+                                              adrv9025_BfOrxChanAddr_e baseAddr,
+                                              uint8_t                  bfValue);
+
+int32_t adrv9025_OrxSlicerPinControlStepBfGet(adi_adrv9025_Device_t*   device,
+                                              adrv9025_BfOrxChanAddr_e baseAddr,
+                                              uint8_t*                 bfValue);
+
+int32_t adrv9025_OrxStatic3bitSlicerModeEnBfSet(adi_adrv9025_Device_t*   device,
+                                                adrv9025_BfOrxChanAddr_e baseAddr,
+                                                uint8_t                  bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_orx_types.h

@@ -0,0 +1,58 @@
+/**
+ * \file adrv9025_bf_orx_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transciever device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_ORX_TYPES_H__
+#define __ADRV9025_BF_ORX_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfOrxChanAddr
+{
+     ADRV9025_BF_ALL_ORX_CHANNELS    =    0x600,
+     ADRV9025_BF_ORX_CH0    =    0x1A00,
+     ADRV9025_BF_ORX_CH1    =    0x1C00
+} adrv9025_BfOrxChanAddr_e;
+
+/**
+ * \brief Enumeration for fpExponentBits
+ */
+typedef enum adrv9025_BfOrxFpExponentBits
+{
+    ADRV9025_BF_ORX_RX1_EXP_2            =    0,  /*!< Two bits of exponent    */
+    ADRV9025_BF_ORX_RX1_EXP_3            =    1,  /*!< Three bits of exponent  */
+    ADRV9025_BF_ORX_RX1_EXP_4            =    2,  /*!< Four bits of exponent   */
+    ADRV9025_BF_ORX_RX1_EXP_5            =    3   /*!< Five bits of exponent   */
+} adrv9025_BfOrxFpExponentBits_e;
+/**
+ * \brief Enumeration for fpRoundMode
+ */
+typedef enum adrv9025_BfOrxFpRoundMode
+{
+    ADRV9025_BF_ORX_ROUNDTIESTOEVEN      =    0,  /*!< No description provided */
+    ADRV9025_BF_ORX_ROUNDTOWARDSPOSITIVE =    1,  /*!< No description provided */
+    ADRV9025_BF_ORX_ROUNDTOWARDSNEGATIVE =    2,  /*!< No description provided */
+    ADRV9025_BF_ORX_ROUNDTOWARDSZERO     =    3,  /*!< No description provided */
+    ADRV9025_BF_ORX_ROUNDTIESTOAWAY      =    4   /*!< No description provided */
+} adrv9025_BfOrxFpRoundMode_e;
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ADRV9025_BF_ORX_TYPES_H__ */
+
+/*  EOF: adrv9025_bf_orx_types.h */
+

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_pll_mem_map.h

@@ -0,0 +1,51 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_pll_mem_map.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_PLL_MEM_MAP_H__
+#define __ADRV9025_BF_PLL_MEM_MAP_H__
+#include "./../../private/include/adrv9025_bf_pll_mem_map_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_PllMemMapAuxAdcReadyBfGet(adi_adrv9025_Device_t*         device,
+                                           adrv9025_BfPllMemMapChanAddr_e baseAddr,
+                                           uint8_t*                       bfValue);
+
+int32_t adrv9025_PllMemMapRx12SelLo2BfGet(adi_adrv9025_Device_t*         device,
+                                          adrv9025_BfPllMemMapChanAddr_e baseAddr,
+                                          uint8_t*                       bfValue);
+
+int32_t adrv9025_PllMemMapRx34SelLo2BfGet(adi_adrv9025_Device_t*         device,
+                                          adrv9025_BfPllMemMapChanAddr_e baseAddr,
+                                          uint8_t*                       bfValue);
+
+int32_t adrv9025_PllMemMapSynLockBfGet(adi_adrv9025_Device_t*         device,
+                                       adrv9025_BfPllMemMapChanAddr_e baseAddr,
+                                       uint8_t*                       bfValue);
+
+int32_t adrv9025_PllMemMapTx12SelLo2BfGet(adi_adrv9025_Device_t*         device,
+                                          adrv9025_BfPllMemMapChanAddr_e baseAddr,
+                                          uint8_t*                       bfValue);
+
+int32_t adrv9025_PllMemMapTx34SelLo2BfGet(adi_adrv9025_Device_t*         device,
+                                          adrv9025_BfPllMemMapChanAddr_e baseAddr,
+                                          uint8_t*                       bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_pll_mem_map_types.h

@@ -0,0 +1,153 @@
+/**
+ * \file adrv9025_bf_pll_mem_map_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transciever device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_PLL_MEM_MAP_TYPES_H__
+#define __ADRV9025_BF_PLL_MEM_MAP_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfPllMemMapChanAddr
+{
+     ADRV9025_BF_ALL_PLLS    =    0x800,
+     ADRV9025_BF_AUX_PLL    =    0x2600,
+     ADRV9025_BF_CLK_PLL    =    0x2800,
+     ADRV9025_BF_RF1_PLL    =    0x2A00,
+     ADRV9025_BF_RF2_PLL    =    0x6400
+} adrv9025_BfPllMemMapChanAddr_e;
+
+/**
+ * \brief Enumeration for calper
+ */
+typedef enum adrv9025_BfPllMemMapCalper
+{
+    ADRV9025_BF_PLL_MEM_MAP_CALPER1              =    0,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CALPER2              =    1,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CALPER4              =    2,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CALPER8              =    3,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CALPER16             =    4,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CALPER32             =    5,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CALPER64             =    6,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CALPER128            =    7   /*!< No description provided */
+} adrv9025_BfPllMemMapCalper_e;
+/**
+ * \brief Enumeration for caltyp
+ */
+typedef enum adrv9025_BfPllMemMapCaltyp
+{
+    ADRV9025_BF_PLL_MEM_MAP_IDLE                 =    0,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_ICAL                 =    1,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_TCAL                 =    2,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CTCAL                =    3,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CRCAL                =    4,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_ICALC                =    5,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_TCALC                =    6,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_CTCALC               =    7   /*!< No description provided */
+} adrv9025_BfPllMemMapCaltyp_e;
+/**
+ * \brief Enumeration for icalwait
+ */
+typedef enum adrv9025_BfPllMemMapIcalwait
+{
+    ADRV9025_BF_PLL_MEM_MAP_ICALWAIT_1K          =    0,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_ICALWAIT_2K          =    1,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_ICALWAIT_4K          =    2,  /*!< No description provided */
+    ADRV9025_BF_PLL_MEM_MAP_ICALWAIT_8K          =    3   /*!< No description provided */
+} adrv9025_BfPllMemMapIcalwait_e;
+/**
+ * \brief Enumeration for mcsPulseDelayDigSerdes
+ */
+typedef enum adrv9025_BfPllMemMapMcsPulseDelayDigSerdes
+{
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_DELAY_DIG_SERDES_2 =    0,  /*!< mcs_pulse_delay_dig_serdes = 2 prescaler clocks */
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_DELAY_DIG_SERDES_3 =    1,  /*!< mcs_pulse_delay_dig_serdes = 3 prescaler clocks */
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_DELAY_DIG_SERDES_4 =    2,  /*!< mcs_pulse_delay_dig_serdes = 4 prescaler clocks */
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_DELAY_DIG_SERDES_5 =    3   /*!< mcs_pulse_delay_dig_serdes = 5 prescaler clocks */
+} adrv9025_BfPllMemMapMcsPulseDelayDigSerdes_e;
+/**
+ * \brief Enumeration for mcsPulseWidthDigSerdes
+ */
+typedef enum adrv9025_BfPllMemMapMcsPulseWidthDigSerdes
+{
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_WIDTH_DIG_SERDES_2 =    0,  /*!< mcs_pulse_delay_dig_serdes = 2 prescaler clocks */
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_WIDTH_DIG_SERDES_3 =    1,  /*!< mcs_pulse_delay_dig_serdes = 3 prescaler clocks */
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_WIDTH_DIG_SERDES_4 =    2,  /*!< mcs_pulse_delay_dig_serdes = 4 prescaler clocks */
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_WIDTH_DIG_SERDES_5 =    3   /*!< mcs_pulse_delay_dig_serdes = 5 prescaler clocks */
+} adrv9025_BfPllMemMapMcsPulseWidthDigSerdes_e;
+/**
+ * \brief Enumeration for mcsSerdesAlign
+ */
+typedef enum adrv9025_BfPllMemMapMcsSerdesAlign
+{
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_ALIGN_DIG_SERDES_2 =    0, /*!< mcs_pulse_delay_dig_serdes = 2 prescaler clocks */
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_ALIGN_DIG_SERDES_3 =    1, /*!< mcs_pulse_delay_dig_serdes = 3 prescaler clocks */
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_ALIGN_DIG_SERDES_4 =    2, /*!< mcs_pulse_delay_dig_serdes = 4 prescaler clocks */
+    ADRV9025_BF_PLL_MEM_MAP_MCS_PULSE_ALIGN_DIG_SERDES_5 =    3   /*!< mcs_pulse_delay_dig_serdes = 5 prescaler clocks */
+} adrv9025_BfPllMemMapMcsSerdesAlign_e;
+/**
+ * \brief Enumeration for qthr
+ */
+typedef enum adrv9025_BfPllMemMapQthr
+{
+    ADRV9025_BF_PLL_MEM_MAP_QTHR0                        =    0,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR1                        =    1,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR2                        =    2,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR3                        =    3,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR4                        =    4,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR5                        =    5,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR6                        =    6,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR7                        =    7,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR8                        =    8,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR9                        =    9,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR10                       =   10,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR11                       =   11,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR12                       =   12,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR13                       =   13,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR14                       =   14,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_QTHR15                       =   15   /*!< No description provided                         */
+} adrv9025_BfPllMemMapQthr_e;
+/**
+ * \brief Enumeration for tsprsc
+ */
+typedef enum adrv9025_BfPllMemMapTsprsc
+{
+    ADRV9025_BF_PLL_MEM_MAP_TPRSC_1                      =    0,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_TPRSC_2                      =    1,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_TPRSC_4                      =    2,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_TPRSC_8                      =    3,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_TPRSC_16                     =    4,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_TPRSC_32                     =    5,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_TPRSC_64                     =    6,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_TPRSC_128                    =    7   /*!< No description provided                         */
+} adrv9025_BfPllMemMapTsprsc_e;
+/**
+ * \brief Enumeration for vcoCalInitDel
+ */
+typedef enum adrv9025_BfPllMemMapVcoCalInitDel
+{
+    ADRV9025_BF_PLL_MEM_MAP_VCOCCAL_DEL_32               =    0,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_VCOCCAL_DEL_64               =    1,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_VCOCCAL_DEL_128              =    2,  /*!< No description provided                         */
+    ADRV9025_BF_PLL_MEM_MAP_VCOCCAL_DEL_256              =    3   /*!< No description provided                         */
+} adrv9025_BfPllMemMapVcoCalInitDel_e;
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ADRV9025_BF_PLL_MEM_MAP_TYPES_H__
+
+/*  EOF: adrv9025_bf_pll_mem_map_types.h */
+

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_rx_types.h

@@ -0,0 +1,60 @@
+/**
+ * \file adrv9025_bf_rx_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transciever device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_RX_TYPES_H__
+#define __ADRV9025_BF_RX_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfRxChanAddr
+{
+     ADRV9025_BF_ALL_RX_CHANNELS =    0x200,
+     ADRV9025_BF_RX_CH0          =    0x1200,
+     ADRV9025_BF_RX_CH1          =    0x1400,
+     ADRV9025_BF_RX_CH2          =    0x1600,
+     ADRV9025_BF_RX_CH3          =    0x1800
+} adrv9025_BfRxChanAddr_e;
+
+/**
+ * \brief Enumeration for fpExponentBits
+ */
+typedef enum adrv9025_BfRxFpExponentBits
+{
+    ADRV9025_BF_RX_RX1_EXP_2 =    0,  /*!< Two bits of exponent   */
+    ADRV9025_BF_RX_RX1_EXP_3 =    1,  /*!< Three bits of exponent */
+    ADRV9025_BF_RX_RX1_EXP_4 =    2,  /*!< Four bits of exponent  */
+    ADRV9025_BF_RX_RX1_EXP_5 =    3   /*!< Five bits of exponent  */
+} adrv9025_BfRxFpExponentBits_e;
+/**
+ * \brief Enumeration for fpRoundMode
+ */
+typedef enum adrv9025_BfRxFpRoundMode
+{
+    ADRV9025_BF_RX_ROUNDTIESTOEVEN      =    0,  /*!< No description provided */
+    ADRV9025_BF_RX_ROUNDTOWARDSPOSITIVE =    1,  /*!< No description provided */
+    ADRV9025_BF_RX_ROUNDTOWARDSNEGATIVE =    2,  /*!< No description provided */
+    ADRV9025_BF_RX_ROUNDTOWARDSZERO     =    3,  /*!< No description provided */
+    ADRV9025_BF_RX_ROUNDTIESTOAWAY      =    4   /*!< No description provided */
+} adrv9025_BfRxFpRoundMode_e;
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ADRV9025_BF_RX_TYPES_H__ */
+
+/*  EOF: adrv9025_bf_rx_types.h */
+

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_tx.h

@@ -0,0 +1,423 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_tx.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_TX_H__
+#define __ADRV9025_BF_TX_H__
+#include "./../../private/include/adrv9025_bf_tx_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_TxArmOverrideControlBfSet(adi_adrv9025_Device_t*  device,
+                                           adrv9025_BfTxChanAddr_e baseAddr,
+                                           uint8_t                 bfValue);
+
+int32_t adrv9025_TxArmOverrideControlBfGet(adi_adrv9025_Device_t*  device,
+                                           adrv9025_BfTxChanAddr_e baseAddr,
+                                           uint8_t*                bfValue);
+
+int32_t adrv9025_TxCfrBasePulse21bBfSet(adi_adrv9025_Device_t*  device,
+                                        adrv9025_BfTxChanAddr_e baseAddr,
+                                        uint8_t                 bfValue);
+
+int32_t adrv9025_TxCfrBasePulse21bBfGet(adi_adrv9025_Device_t*  device,
+                                        adrv9025_BfTxChanAddr_e baseAddr,
+                                        uint8_t*                bfValue);
+
+int32_t adrv9025_TxCfrHalfPulseLenBfGet(adi_adrv9025_Device_t*  device,
+                                        adrv9025_BfTxChanAddr_e baseAddr,
+                                        uint16_t*               bfValue);
+
+int32_t adrv9025_TxDpdActClkEnableBfSet(adi_adrv9025_Device_t*  device,
+                                        adrv9025_BfTxChanAddr_e baseAddr,
+                                        uint8_t                 bfValue);
+
+int32_t adrv9025_TxDpdActClkEnableBfGet(adi_adrv9025_Device_t*  device,
+                                        adrv9025_BfTxChanAddr_e baseAddr,
+                                        uint8_t*                bfValue);
+
+int32_t adrv9025_TxJesdDfrmMaskBfSet(adi_adrv9025_Device_t*  device,
+                                     adrv9025_BfTxChanAddr_e baseAddr,
+                                     uint8_t                 bfValue);
+
+int32_t adrv9025_TxJesdDfrmMaskBfGet(adi_adrv9025_Device_t*  device,
+                                     adrv9025_BfTxChanAddr_e baseAddr,
+                                     uint8_t*                bfValue);
+
+int32_t adrv9025_TxNcoTestEnableBfSet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint8_t                 bfValue);
+
+int32_t adrv9025_TxNcoTestEnableBfGet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionAprEnBfSet(adi_adrv9025_Device_t*  device,
+                                          adrv9025_BfTxChanAddr_e baseAddr,
+                                          uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionAprEnBfGet(adi_adrv9025_Device_t*  device,
+                                          adrv9025_BfTxChanAddr_e baseAddr,
+                                          uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionAveragePeakRatioBfGet(adi_adrv9025_Device_t*  device,
+                                                     adrv9025_BfTxChanAddr_e baseAddr,
+                                                     uint16_t*               bfValue);
+
+int32_t adrv9025_TxPaProtectionAveragePowerBfGet(adi_adrv9025_Device_t*  device,
+                                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                                 uint16_t*               bfValue);
+
+int32_t adrv9025_TxPaProtectionAvgThresholdBfSet(adi_adrv9025_Device_t*  device,
+                                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                                 uint16_t                bfValue);
+
+int32_t adrv9025_TxPaProtectionAvgThresholdBfGet(adi_adrv9025_Device_t*  device,
+                                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                                 uint16_t*               bfValue);
+
+int32_t adrv9025_TxPaProtectionAvgpowerEnBfSet(adi_adrv9025_Device_t*  device,
+                                               adrv9025_BfTxChanAddr_e baseAddr,
+                                               uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionAvgpowerEnBfGet(adi_adrv9025_Device_t*  device,
+                                               adrv9025_BfTxChanAddr_e baseAddr,
+                                               uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionAvgpowerErrorBfGet(adi_adrv9025_Device_t*  device,
+                                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                                  uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionAvgpowerErrorClearBfSet(adi_adrv9025_Device_t*  device,
+                                                       adrv9025_BfTxChanAddr_e baseAddr,
+                                                       uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionAvgpowerErrorClearRequiredBfSet(adi_adrv9025_Device_t*  device,
+                                                               adrv9025_BfTxChanAddr_e baseAddr,
+                                                               uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionAvrgDurBfSet(adi_adrv9025_Device_t*  device,
+                                            adrv9025_BfTxChanAddr_e baseAddr,
+                                            uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionAvrgDurBfGet(adi_adrv9025_Device_t*  device,
+                                            adrv9025_BfTxChanAddr_e baseAddr,
+                                            uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionErrorPowerBfGet(adi_adrv9025_Device_t*  device,
+                                               adrv9025_BfTxChanAddr_e baseAddr,
+                                               uint16_t*               bfValue);
+
+int32_t adrv9025_TxPaProtectionGainRampDownEnBfSet(adi_adrv9025_Device_t*  device,
+                                                   adrv9025_BfTxChanAddr_e baseAddr,
+                                                   uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionGainRampDownEnBfGet(adi_adrv9025_Device_t*  device,
+                                                   adrv9025_BfTxChanAddr_e baseAddr,
+                                                   uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionGainRampUpEnBfSet(adi_adrv9025_Device_t*  device,
+                                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                                 uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionGainRampUpEnBfGet(adi_adrv9025_Device_t*  device,
+                                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                                 uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionGainStepDownEnBfSet(adi_adrv9025_Device_t*  device,
+                                                   adrv9025_BfTxChanAddr_e baseAddr,
+                                                   uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionInputSelBfSet(adi_adrv9025_Device_t*  device,
+                                             adrv9025_BfTxChanAddr_e baseAddr,
+                                             uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionInputSelBfGet(adi_adrv9025_Device_t*  device,
+                                             adrv9025_BfTxChanAddr_e baseAddr,
+                                             uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakCountBfSet(adi_adrv9025_Device_t*  device,
+                                              adrv9025_BfTxChanAddr_e baseAddr,
+                                              uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakCountBfGet(adi_adrv9025_Device_t*  device,
+                                              adrv9025_BfTxChanAddr_e baseAddr,
+                                              uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakDurBfSet(adi_adrv9025_Device_t*  device,
+                                            adrv9025_BfTxChanAddr_e baseAddr,
+                                            uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakDurBfGet(adi_adrv9025_Device_t*  device,
+                                            adrv9025_BfTxChanAddr_e baseAddr,
+                                            uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakThresholdBfSet(adi_adrv9025_Device_t*  device,
+                                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                                  uint16_t                bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakThresholdBfGet(adi_adrv9025_Device_t*  device,
+                                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                                  uint16_t*               bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakpowerEnBfSet(adi_adrv9025_Device_t*  device,
+                                                adrv9025_BfTxChanAddr_e baseAddr,
+                                                uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakpowerEnBfGet(adi_adrv9025_Device_t*  device,
+                                                adrv9025_BfTxChanAddr_e baseAddr,
+                                                uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakpowerErrorBfGet(adi_adrv9025_Device_t*  device,
+                                                   adrv9025_BfTxChanAddr_e baseAddr,
+                                                   uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakpowerErrorClearBfSet(adi_adrv9025_Device_t*  device,
+                                                        adrv9025_BfTxChanAddr_e baseAddr,
+                                                        uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionPeakpowerErrorClearRequiredBfSet(adi_adrv9025_Device_t*  device,
+                                                                adrv9025_BfTxChanAddr_e baseAddr,
+                                                                uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionRampMaxAttenuationBfSet(adi_adrv9025_Device_t*  device,
+                                                       adrv9025_BfTxChanAddr_e baseAddr,
+                                                       uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionRampMaxAttenuationBfGet(adi_adrv9025_Device_t*  device,
+                                                       adrv9025_BfTxChanAddr_e baseAddr,
+                                                       uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionRampStepDurationBfSet(adi_adrv9025_Device_t*  device,
+                                                     adrv9025_BfTxChanAddr_e baseAddr,
+                                                     uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionRampStepDurationBfGet(adi_adrv9025_Device_t*  device,
+                                                     adrv9025_BfTxChanAddr_e baseAddr,
+                                                     uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionRampStepSizeBfSet(adi_adrv9025_Device_t*  device,
+                                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                                 uint8_t                 bfValue);
+
+int32_t adrv9025_TxPaProtectionRampStepSizeBfGet(adi_adrv9025_Device_t*  device,
+                                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                                 uint8_t*                bfValue);
+
+int32_t adrv9025_TxPaProtectionTxAttenStepBfSet(adi_adrv9025_Device_t*  device,
+                                                adrv9025_BfTxChanAddr_e baseAddr,
+                                                uint8_t                 bfValue);
+
+int32_t adrv9025_TxPllJesdProtClrBfSet(adi_adrv9025_Device_t*  device,
+                                       adrv9025_BfTxChanAddr_e baseAddr,
+                                       uint8_t                 bfValue);
+
+int32_t adrv9025_TxPllJesdProtClrReqdBfSet(adi_adrv9025_Device_t*  device,
+                                           adrv9025_BfTxChanAddr_e baseAddr,
+                                           uint8_t                 bfValue);
+
+int32_t adrv9025_TxPllJesdProtEventBfGet(adi_adrv9025_Device_t*  device,
+                                         adrv9025_BfTxChanAddr_e baseAddr,
+                                         uint8_t*                bfValue);
+
+int32_t adrv9025_TxPllUnlockMaskBfSet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint8_t                 bfValue);
+
+int32_t adrv9025_TxPllUnlockMaskBfGet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint8_t*                bfValue);
+
+int32_t adrv9025_TxSpi2TxAttenGpioSelectBfSet(adi_adrv9025_Device_t*  device,
+                                              adrv9025_BfTxChanAddr_e baseAddr,
+                                              uint8_t                 bfValue);
+
+int32_t adrv9025_TxSpi2TxAttenGpioSelectBfGet(adi_adrv9025_Device_t*  device,
+                                              adrv9025_BfTxChanAddr_e baseAddr,
+                                              uint8_t*                bfValue);
+
+int32_t adrv9025_TxSrlIrqBfGet(adi_adrv9025_Device_t*  device,
+                               adrv9025_BfTxChanAddr_e baseAddr,
+                               uint8_t*                bfValue);
+
+int32_t adrv9025_TxSrlIrqEnBfSet(adi_adrv9025_Device_t*  device,
+                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                 uint8_t                 bfValue);
+
+int32_t adrv9025_TxSrlIrqEnBfGet(adi_adrv9025_Device_t*  device,
+                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                 uint8_t*                bfValue);
+
+int32_t adrv9025_TxSrlSlewOffsetBfSet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint8_t                 bfValue);
+
+int32_t adrv9025_TxSrlSlewOffsetBfGet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint8_t*                bfValue);
+
+int32_t adrv9025_TxSrlStatBfGet(adi_adrv9025_Device_t*  device,
+                                adrv9025_BfTxChanAddr_e baseAddr,
+                                uint16_t*               bfValue);
+
+int32_t adrv9025_TxSrlStatEnBfSet(adi_adrv9025_Device_t*  device,
+                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                  uint8_t                 bfValue);
+
+int32_t adrv9025_TxSrlStatEnBfGet(adi_adrv9025_Device_t*  device,
+                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                  uint8_t*                bfValue);
+
+int32_t adrv9025_TxSrlStatModeBfSet(adi_adrv9025_Device_t*  device,
+                                    adrv9025_BfTxChanAddr_e baseAddr,
+                                    uint8_t                 bfValue);
+
+int32_t adrv9025_TxSrlTableSelBfSet(adi_adrv9025_Device_t*  device,
+                                    adrv9025_BfTxChanAddr_e baseAddr,
+                                    uint8_t                 bfValue);
+
+int32_t adrv9025_TxSrlTableSelBfGet(adi_adrv9025_Device_t*  device,
+                                    adrv9025_BfTxChanAddr_e baseAddr,
+                                    uint8_t*                bfValue);
+
+int32_t adrv9025_TxTpcDecrAttenGpioSelectBfSet(adi_adrv9025_Device_t*  device,
+                                               adrv9025_BfTxChanAddr_e baseAddr,
+                                               uint8_t                 bfValue);
+
+int32_t adrv9025_TxTpcDecrAttenGpioSelectBfGet(adi_adrv9025_Device_t*  device,
+                                               adrv9025_BfTxChanAddr_e baseAddr,
+                                               uint8_t*                bfValue);
+
+int32_t adrv9025_TxTpcIncrAttenGpioSelectBfSet(adi_adrv9025_Device_t*  device,
+                                               adrv9025_BfTxChanAddr_e baseAddr,
+                                               uint8_t                 bfValue);
+
+int32_t adrv9025_TxTpcIncrAttenGpioSelectBfGet(adi_adrv9025_Device_t*  device,
+                                               adrv9025_BfTxChanAddr_e baseAddr,
+                                               uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxAttenConfigBfSet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxAttenConfigBfGet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxAttenModeBfSet(adi_adrv9025_Device_t*  device,
+                                    adrv9025_BfTxChanAddr_e baseAddr,
+                                    uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxAttenUpdGpioEnBfSet(adi_adrv9025_Device_t*  device,
+                                         adrv9025_BfTxChanAddr_e baseAddr,
+                                         uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxAttenUpdGpioEnBfGet(adi_adrv9025_Device_t*  device,
+                                         adrv9025_BfTxChanAddr_e baseAddr,
+                                         uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxAttenUpdGpioSelectBfSet(adi_adrv9025_Device_t*  device,
+                                             adrv9025_BfTxChanAddr_e baseAddr,
+                                             uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxAttenUpdGpioSelectBfGet(adi_adrv9025_Device_t*  device,
+                                             adrv9025_BfTxChanAddr_e baseAddr,
+                                             uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxAttenuationBfSet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint16_t                bfValue);
+
+int32_t adrv9025_TxTxAttenuationBfGet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint16_t*               bfValue);
+
+int32_t adrv9025_TxTxDataRampDownOnJesdDfrmIrqBfSet(adi_adrv9025_Device_t*  device,
+                                                    adrv9025_BfTxChanAddr_e baseAddr,
+                                                    uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxDataRampDownOnJesdDfrmIrqBfGet(adi_adrv9025_Device_t*  device,
+                                                    adrv9025_BfTxChanAddr_e baseAddr,
+                                                    uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxDataRampDownOnPllUnlockBfSet(adi_adrv9025_Device_t*  device,
+                                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                                  uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxDataRampDownOnPllUnlockBfGet(adi_adrv9025_Device_t*  device,
+                                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                                  uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxDpNcoEnableBfSet(adi_adrv9025_Device_t*  device,
+                                      adrv9025_BfTxChanAddr_e baseAddr,
+                                      uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxDpNcoFtwBfSet(adi_adrv9025_Device_t*  device,
+                                   adrv9025_BfTxChanAddr_e baseAddr,
+                                   uint32_t                bfValue);
+
+int32_t adrv9025_TxTxDpNcoFtwBfGet(adi_adrv9025_Device_t*  device,
+                                   adrv9025_BfTxChanAddr_e baseAddr,
+                                   uint32_t*               bfValue);
+
+int32_t adrv9025_TxTxDpNcoFtwUpdateBfSet(adi_adrv9025_Device_t*  device,
+                                         adrv9025_BfTxChanAddr_e baseAddr,
+                                         uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxEnableBfSet(adi_adrv9025_Device_t*  device,
+                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                 uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxEnableBfGet(adi_adrv9025_Device_t*  device,
+                                 adrv9025_BfTxChanAddr_e baseAddr,
+                                 uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxIncrDecrWordBfSet(adi_adrv9025_Device_t*  device,
+                                       adrv9025_BfTxChanAddr_e baseAddr,
+                                       uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxIncrDecrWordBfGet(adi_adrv9025_Device_t*  device,
+                                       adrv9025_BfTxChanAddr_e baseAddr,
+                                       uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxNcoGainBfSet(adi_adrv9025_Device_t*  device,
+                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                  uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxNcoGainBfGet(adi_adrv9025_Device_t*  device,
+                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                  uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxPinModeBfSet(adi_adrv9025_Device_t*  device,
+                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                  uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxPinModeBfGet(adi_adrv9025_Device_t*  device,
+                                  adrv9025_BfTxChanAddr_e baseAddr,
+                                  uint8_t*                bfValue);
+
+int32_t adrv9025_TxTxAttenuationEarlyDelayCounterForAnalogBfSet(adi_adrv9025_Device_t*  device,
+                                                                adrv9025_BfTxChanAddr_e baseAddr,
+                                                                uint8_t                 bfValue);
+
+int32_t adrv9025_TxTxAttenuationEarlyDelayCounterForAnalogBfGet(adi_adrv9025_Device_t*  device,
+                                                                adrv9025_BfTxChanAddr_e baseAddr,
+                                                                uint8_t*                bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_tx_types.h

@@ -0,0 +1,38 @@
+/**
+ * \file adrv9025_bf_tx_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_TX_TYPES_H__
+#define __ADRV9025_BF_TX_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfTxChanAddr
+{
+    ADRV9025_BF_ALL_TX_CHANNELS = 0x400,
+    ADRV9025_BF_TX_CH0 = 0x1E00,
+    ADRV9025_BF_TX_CH1 = 0x2000,
+    ADRV9025_BF_TX_CH2 = 0x2200,
+    ADRV9025_BF_TX_CH3 = 0x2400
+} adrv9025_BfTxChanAddr_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ADRV9025_BF_TX_TYPES_H__ */
+
+/*  EOF: adrv9025_bf_tx_types.h */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_txdac_mem_map.h

@@ -0,0 +1,47 @@
+/**
+ * \file Automatically generated file: adrv9025_bf_txdac_mem_map.h
+ *
+ * \brief Contains BitField functions to support ADRV9025 transceiver device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_TXDAC_MEM_MAP_H__
+#define __ADRV9025_BF_TXDAC_MEM_MAP_H__
+#include "./../../private/include/adrv9025_bf_txdac_mem_map_types.h"
+#include "adi_adrv9025.h"
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+int32_t adrv9025_TxdacMemMapTxdacFscBoostIBfSet(adi_adrv9025_Device_t*                 device,
+                                                adrv9025_BfTxdacMemMapChanAddr_e       baseAddr,
+                                                adrv9025_BfTxdacMemMapTxdacFscBoostI_e bfValue);
+
+int32_t adrv9025_TxdacMemMapTxdacFscBoostIBfGet(adi_adrv9025_Device_t*                  device,
+                                                adrv9025_BfTxdacMemMapChanAddr_e        baseAddr,
+                                                adrv9025_BfTxdacMemMapTxdacFscBoostI_e* bfValue);
+
+int32_t adrv9025_TxdacMemMapTxdacFscBoostQBfSet(adi_adrv9025_Device_t*                 device,
+                                                adrv9025_BfTxdacMemMapChanAddr_e       baseAddr,
+                                                adrv9025_BfTxdacMemMapTxdacFscBoostQ_e bfValue);
+
+int32_t adrv9025_TxdacMemMapTxdacFscTuneIBfSet(adi_adrv9025_Device_t*           device,
+                                               adrv9025_BfTxdacMemMapChanAddr_e baseAddr,
+                                               uint8_t                          bfValue);
+
+int32_t adrv9025_TxdacMemMapTxdacFscTuneQBfSet(adi_adrv9025_Device_t*           device,
+                                               adrv9025_BfTxdacMemMapChanAddr_e baseAddr,
+                                               uint8_t                          bfValue);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_bf_txdac_mem_map_types.h

@@ -0,0 +1,400 @@
+/**
+ * \file adrv9025_bf_txdac_mem_map_types.h Automatically generated file with generator ver 0.0.1.0.
+ *
+ * \brief Contains BitField functions to support ADRV9025 transciever device.
+ *
+ * ADRV9025 BITFIELD VERSION: 0.0.0.1
+ */
+
+/**
+ * Disclaimer Legal Disclaimer
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef __ADRV9025_BF_TXDAC_MEM_MAP_TYPES_H__
+#define __ADRV9025_BF_TXDAC_MEM_MAP_TYPES_H__
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+typedef enum adrv9025_BfTxdacMemMapChanAddr
+{
+     ADRV9025_BF_ALL_TXDAC    =    0x1000,
+     ADRV9025_BF_TXDAC_CH1    =    0x7400,
+     ADRV9025_BF_TXDAC_CH2    =    0x7600,
+     ADRV9025_BF_TXDAC_CH3    =    0x7800,
+     ADRV9025_BF_TXDAC_CH0    =    0x7A00
+} adrv9025_BfTxdacMemMapChanAddr_e;
+
+/**
+ * \brief Enumeration for txdacCalAddrI
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCalAddrI
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISBREF     =    0,  /*!< ISB_REF (Reference For Calibration, Does not affect INL/DNL)       */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB0       =    1,  /*!< ISB0                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB1       =    2,  /*!< ISB1                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB2       =    3,  /*!< ISB2                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB3       =    4,  /*!< ISB3                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB4       =    5,  /*!< ISB4                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB5       =    6,  /*!< ISB5                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB6       =    7,  /*!< ISB6                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB7       =    8,  /*!< ISB7                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB8       =    9,  /*!< ISB8                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB9       =   10,  /*!< ISB9                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB10      =   11,  /*!< ISB10                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB11      =   12,  /*!< ISB11                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB12      =   13,  /*!< ISB12                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB13      =   14,  /*!< ISB13                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISB14      =   15,  /*!< ISB14                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_LSBSUM     =   16,  /*!< LSB Sum                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED0    =   17,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED1    =   18,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED2    =   19,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED3    =   20,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED4    =   21,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED5    =   22,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED6    =   23,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSBCOMPPOS =   24,  /*!< MSB Comparator Positive                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSBCOMPNEG =   25,  /*!< MSB Comparator Negative                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISBCOMPPOS =   26,  /*!< ISB Comparator Positive                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_ISBCOMPNEG =   27,  /*!< ISB Comparator Negative                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED7    =   28,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED8    =   29,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_UNUSED9    =   30,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSBREF     =   31,  /*!< MSB Reference (Reference for Calibration, Does not affect INL/DNL) */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSBGAIN    =   32,  /*!< MSB Gain (Fullscale Current Adjustment, Does not affect INL/DNL)   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB0       =   33,  /*!< MSB0                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB1       =   34,  /*!< MSB1                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB2       =   35,  /*!< MSB2                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB3       =   36,  /*!< MSB3                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB4       =   37,  /*!< MSB4                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB5       =   38,  /*!< MSB5                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB6       =   39,  /*!< MSB6                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB7       =   40,  /*!< MSB7                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB8       =   41,  /*!< MSB8                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB9       =   42,  /*!< MSB9                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB10      =   43,  /*!< MSB10                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB11      =   44,  /*!< MSB11                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB12      =   45,  /*!< MSB12                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB13      =   46,  /*!< MSB13                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB14      =   47,  /*!< MSB14                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB15      =   48,  /*!< MSB15                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB16      =   49,  /*!< MSB16                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB17      =   50,  /*!< MSB17                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB18      =   51,  /*!< MSB18                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB19      =   52,  /*!< MSB19                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB20      =   53,  /*!< MSB20                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB21      =   54,  /*!< MSB21                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB22      =   55,  /*!< MSB22                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB23      =   56,  /*!< MSB23                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB24      =   57,  /*!< MSB24                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB25      =   58,  /*!< MSB25                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB26      =   59,  /*!< MSB26                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB27      =   60,  /*!< MSB27                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB28      =   61,  /*!< MSB28                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB29      =   62,  /*!< MSB29                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_CALADDR_MSB30      =   63   /*!< MSB30                                                              */
+} adrv9025_BfTxdacMemMapTxdacCalAddrI_e;
+/**
+ * \brief Enumeration for txdacCalAddrQ
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCalAddrQ
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISBREF     =    0,  /*!< ISB_REF (Reference For Calibration, Does not affect INL/DNL)       */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB0       =    1,  /*!< ISB0                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB1       =    2,  /*!< ISB1                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB2       =    3,  /*!< ISB2                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB3       =    4,  /*!< ISB3                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB4       =    5,  /*!< ISB4                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB5       =    6,  /*!< ISB5                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB6       =    7,  /*!< ISB6                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB7       =    8,  /*!< ISB7                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB8       =    9,  /*!< ISB8                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB9       =   10,  /*!< ISB9                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB10      =   11,  /*!< ISB10                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB11      =   12,  /*!< ISB11                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB12      =   13,  /*!< ISB12                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB13      =   14,  /*!< ISB13                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISB14      =   15,  /*!< ISB14                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_LSBSUM     =   16,  /*!< LSB Sum                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED0    =   17,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED1    =   18,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED2    =   19,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED3    =   20,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED4    =   21,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED5    =   22,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED6    =   23,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSBCOMPPOS =   24,  /*!< MSB Comparator Positive                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSBCOMPNEG =   25,  /*!< MSB Comparator Negative                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISBCOMPPOS =   26,  /*!< ISB Comparator Positive                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_ISBCOMPNEG =   27,  /*!< ISB Comparator Negative                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED7    =   28,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED8    =   29,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_UNUSED9    =   30,  /*!< Unassigned                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSBREF     =   31,  /*!< MSB Reference (Reference for Calibration, Does not affect INL/DNL) */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSBGAIN    =   32,  /*!< MSB Gain (Fullscale Current Adjustment, Does not affect INL/DNL)   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB0       =   33,  /*!< MSB0                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB1       =   34,  /*!< MSB1                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB2       =   35,  /*!< MSB2                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB3       =   36,  /*!< MSB3                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB4       =   37,  /*!< MSB4                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB5       =   38,  /*!< MSB5                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB6       =   39,  /*!< MSB6                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB7       =   40,  /*!< MSB7                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB8       =   41,  /*!< MSB8                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB9       =   42,  /*!< MSB9                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB10      =   43,  /*!< MSB10                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB11      =   44,  /*!< MSB11                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB12      =   45,  /*!< MSB12                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB13      =   46,  /*!< MSB13                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB14      =   47,  /*!< MSB14                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB15      =   48,  /*!< MSB15                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB16      =   49,  /*!< MSB16                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB17      =   50,  /*!< MSB17                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB18      =   51,  /*!< MSB18                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB19      =   52,  /*!< MSB19                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB20      =   53,  /*!< MSB20                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB21      =   54,  /*!< MSB21                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB22      =   55,  /*!< MSB22                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB23      =   56,  /*!< MSB23                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB24      =   57,  /*!< MSB24                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB25      =   58,  /*!< MSB25                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB26      =   59,  /*!< MSB26                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB27      =   60,  /*!< MSB27                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB28      =   61,  /*!< MSB28                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB29      =   62,  /*!< MSB29                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_CALADDR_MSB30      =   63   /*!< MSB30                                                              */
+} adrv9025_BfTxdacMemMapTxdacCalAddrQ_e;
+/**
+ * \brief Enumeration for txdacCalDebugI
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCalDebugI
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CAL_IDAC_NORMAL         =    0,  /*!< State machine operates normally and performs I DAC calibration.                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CAL_IDAC_DEBUG          =    1   /*!< State machine ONLY performs a SAR operation of the CALDAC specified by txdac_cal_addr_i, then saves the SAR value to the specified CALDAC. */
+} adrv9025_BfTxdacMemMapTxdacCalDebugI_e;
+/**
+ * \brief Enumeration for txdacCalDebugQ
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCalDebugQ
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CAL_QDAC_NORMAL         =    0,  /*!< State machine operates normally and performs Q DAC calibration.                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CAL_QDAC_DEBUG          =    1   /*!< State machine ONLY performs a SAR operation of the CALDAC specified by txdac_cal_addr_q, then saves the SAR value to the specified CALDAC. */
+} adrv9025_BfTxdacMemMapTxdacCalDebugQ_e;
+/**
+ * \brief Enumeration for txdacCalStartI
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCalStartI
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CAL_START_I_DISABLE     =    0,  /*!< Calibration state machine is immediately stopped and reset.                                                                                */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CAL_START_I_TRIGGER     =    1   /*!< 0 to 1 transition starts DAC calibration.                                                                                                  */
+} adrv9025_BfTxdacMemMapTxdacCalStartI_e;
+/**
+ * \brief Enumeration for txdacCalStartQ
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCalStartQ
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CAL_START_Q_DISABLE     =    0,  /*!< Calibration state machine is immediately stopped and reset.                                                                                */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CAL_START_Q_TRIGGER     =    1   /*!< 0 to 1 transition starts DAC calibration.                                                                                                  */
+} adrv9025_BfTxdacMemMapTxdacCalStartQ_e;
+/**
+ * \brief Enumeration for txdacCalclkDiv
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCalclkDiv
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_OFF              =    0,  /*!< Calibration clock is OFF                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV17            =    1,  /*!< DAC clock divided by 2^17                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV16            =    2,  /*!< DAC clock divided by 2^16                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV15            =    3,  /*!< DAC clock divided by 2^15                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV14            =    4,  /*!< DAC clock divided by 2^14                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV13            =    5,  /*!< DAC clock divided by 2^13                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV12            =    6,  /*!< DAC clock divided by 2^12                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV11            =    7,  /*!< DAC clock divided by 2^11                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV10            =    8,  /*!< DAC clock divided by 2^10                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV9             =    9,  /*!< DAC clock divided by 2^9                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV8             =   10,  /*!< DAC clock divided by 2^8                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV7             =   11,  /*!< DAC clock divided by 2^7                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV6             =   12,  /*!< DAC clock divided by 2^6                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV6_13          =   13,  /*!< DAC clock divided by 2^6                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV6_14          =   14,  /*!< DAC clock divided by 2^6                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALCLK_DIV6_15          =   15   /*!< DAC clock divided by 2^6                                                                                                                   */
+} adrv9025_BfTxdacMemMapTxdacCalclkDiv_e;
+/**
+ * \brief Enumeration for txdacCaldacFsc
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCaldacFsc
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALDAC_STEP_0P04        =    0,  /*!< 0.04 LSB Step Size (0.67x)                                                                                                                 */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALDAC_STEP_0P06        =    1,  /*!< 0.06 LSB Step Size (1x)                                                                                                                    */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALDAC_STEP_0P08        =    2,  /*!< 0.08 LSB Step Size (1.33x)                                                                                                                 */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALDAC_STEP_0P12        =    3   /*!< 0.12 LSB Step Size (2x)                                                                                                                    */
+} adrv9025_BfTxdacMemMapTxdacCaldacFsc_e;
+/**
+ * \brief Enumeration for txdacCaldacOffset
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCaldacOffset
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALDAC_OFFSET_0P0       =    0,  /*!< Offset = 0 LSB                                                                                                                             */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALDAC_OFFSET_3P5       =    1,  /*!< Offset = 3.5 LSB                                                                                                                           */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALDAC_OFFSET_4P0       =    2,  /*!< Offset = 4 LSB                                                                                                                             */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALDAC_OFFSET_4P5       =    3,  /*!< Offset = 4.5 LSB                                                                                                                           */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CALDAC_OFFSET_5P0       =    4   /*!< Offset = 5 LSB                                                                                                                             */
+} adrv9025_BfTxdacMemMapTxdacCaldacOffset_e;
+/**
+ * \brief Enumeration for txdacCmCtrl
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCmCtrl
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CM_240MV                =    0,  /*!< Vcommon = 240mV                                                                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CM_270MV                =    1,  /*!< Vcommon = 270mV                                                                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CM_300MV                =    2,  /*!< Vcommon = 300mV                                                                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CM_330MV                =    3,  /*!< Vcommon = 330mV                                                                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CM_360MV                =    4,  /*!< Vcommon = 360mV                                                                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CM_390MV                =    5,  /*!< Vcommon = 390mV                                                                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CM_420MV                =    6,  /*!< Vcommon = 420mV                                                                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_CM_450MV                =    7   /*!< Vcommon = 450mV                                                                                                                            */
+} adrv9025_BfTxdacMemMapTxdacCmCtrl_e;
+/**
+ * \brief Enumeration for txdacCompGainIsb
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCompGainIsb
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_GAIN_ISB_LOW       =    0,  /*!< Low Accuracy, Fast Settling                                                                                                                */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_GAIN_ISB_HIGH      =    1   /*!< High Accuracy, Slow Settling                                                                                                               */
+} adrv9025_BfTxdacMemMapTxdacCompGainIsb_e;
+/**
+ * \brief Enumeration for txdacCompGainMsb
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCompGainMsb
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_GAIN_MSB_LOWER     =    0,  /*!< Low Accuracy, Fast Settling                                                                                                                */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_GAIN_MSB_LOW       =    1,  /*!< Medium Accuracy/Settling                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_GAIN_MSB_HIGH      =    2,  /*!< Not Allowed                                                                                                                                */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_GAIN_MSB_HIGHER    =    3   /*!< High Accuracy, Slow Settling                                                                                                               */
+} adrv9025_BfTxdacMemMapTxdacCompGainMsb_e;
+/**
+ * \brief Enumeration for txdacCompIsbavg
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCompIsbavg
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_ISBAVG_1           =    0,  /*!< run SAR once                                                                                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_ISBAVG_2           =    1,  /*!< average 2 SAR runs                                                                                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_ISBAVG_4           =    2,  /*!< average 4 SAR runs                                                                                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_ISBAVG_8           =    3,  /*!< average 8 SAR runs                                                                                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_ISBAVG_16          =    4,  /*!< average 16 SAR runs                                                                                                                        */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_ISBAVG_32          =    5,  /*!< average 32 SAR runs                                                                                                                        */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_ISBAVG_64          =    6,  /*!< average 64 SAR runs                                                                                                                        */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_ISBAVG_128         =    7   /*!< average 128 SAR runs                                                                                                                       */
+} adrv9025_BfTxdacMemMapTxdacCompIsbavg_e;
+/**
+ * \brief Enumeration for txdacCompMsbavg
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacCompMsbavg
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_MSBAVG_1           =    0,  /*!< run SAR once                                                                                                                               */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_MSBAVG_2           =    1,  /*!< average 2 SAR runs                                                                                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_MSBAVG_4           =    2,  /*!< average 4 SAR runs                                                                                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_MSBAVG_8           =    3,  /*!< average 8 SAR runs                                                                                                                         */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_MSBAVG_16          =    4,  /*!< average 16 SAR runs                                                                                                                        */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_MSBAVG_32          =    5,  /*!< average 32 SAR runs                                                                                                                        */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_MSBAVG_64          =    6,  /*!< average 64 SAR runs                                                                                                                        */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_COMP_MSBAVG_128         =    7   /*!< average 128 SAR runs                                                                                                                       */
+} adrv9025_BfTxdacMemMapTxdacCompMsbavg_e;
+/**
+ * \brief Enumeration for txdacFscBoostI
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacFscBoostI
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_FSC4MA             =    0,  /*!< FSC = 4mA                                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_IDAC_FSC5P6MA           =    1   /*!< FSC = 5.6mA                                                                                                                                */
+} adrv9025_BfTxdacMemMapTxdacFscBoostI_e;
+/**
+ * \brief Enumeration for txdacFscBoostQ
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacFscBoostQ
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_FSC4MA             =    0,  /*!< FSC = 4mA                                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_QDAC_FSC5P6MA           =    1   /*!< FSC = 5.6mA                                                                                                                                */
+} adrv9025_BfTxdacMemMapTxdacFscBoostQ_e;
+/**
+ * \brief Enumeration for txdacPowerdownClkdiv
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacPowerdownClkdiv
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_OFF               =    0,  /*!< Powerdown state machine clock is OFF                                                                                                       */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV17             =    1,  /*!< DAC clock divided by 2^17                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV16             =    2,  /*!< DAC clock divided by 2^16                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV15             =    3,  /*!< DAC clock divided by 2^15                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV14             =    4,  /*!< DAC clock divided by 2^14                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV13             =    5,  /*!< DAC clock divided by 2^13                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV12             =    6,  /*!< DAC clock divided by 2^12                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV11             =    7,  /*!< DAC clock divided by 2^11                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV10             =    8,  /*!< DAC clock divided by 2^10                                                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV9              =    9,  /*!< DAC clock divided by 2^9                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV8              =   10,  /*!< DAC clock divided by 2^8                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV7              =   11,  /*!< DAC clock divided by 2^7                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV6              =   12,  /*!< DAC clock divided by 2^6                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV6_13           =   13,  /*!< DAC clock divided by 2^6                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV6_14           =   14,  /*!< DAC clock divided by 2^6                                                                                                                   */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_PDCLK_DIV6_15           =   15   /*!< DAC clock divided by 2^6                                                                                                                   */
+} adrv9025_BfTxdacMemMapTxdacPowerdownClkdiv_e;
+/**
+ * \brief Enumeration for txdacSelCalToPin
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacSelCalToPin
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_ISBREF_TO_PIN           =    0,  /*!< isb_ref                                                                                                                                    */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_ISB_TO_PIN              =    1,  /*!< isb                                                                                                                                        */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_MSBREF_TO_PIN           =    2,  /*!< msb_ref                                                                                                                                    */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_MSB_TO_PIN              =    3   /*!< msb                                                                                                                                        */
+} adrv9025_BfTxdacMemMapTxdacSelCalToPin_e;
+/**
+ * \brief Enumeration for txdacStartupMansel
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacStartupMansel
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_STARTUP_SEL_DACCLK      =    0,  /*!< Normal mode: use txdac_powerdown_clkdiv to generate clock                                                                                  */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_STARTUP_SEL_SPI         =    1   /*!< Debug mode: use txdac_startup_manclk to directly drive the clock                                                                           */
+} adrv9025_BfTxdacMemMapTxdacStartupMansel_e;
+/**
+ * \brief Enumeration for txdacThrowIsbCtrl
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacThrowIsbCtrl
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_ISBTHROW_0UA            =    0,  /*!< 0% ISB throw away current (worst performance)                                                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_ISBTHROW_600UA          =    1,  /*!< 33% ISB throw away current (worse performance)                                                                                             */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_ISBTHROW_1200UA         =    2,  /*!< 66% ISB throw away current (better performance)                                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_ISBTHROW_1800UA         =    3   /*!< 100% ISB throw away current (best performance)                                                                                             */
+} adrv9025_BfTxdacMemMapTxdacThrowIsbCtrl_e;
+/**
+ * \brief Enumeration for txdacThrowLsbCtrl
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacThrowLsbCtrl
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_LSBTHROW_0UA            =    0,  /*!< 0% LSB throw away current (worst performance)                                                                                              */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_LSBTHROW_400UA          =    1,  /*!< 33% LSB throw away current (worse performance)                                                                                             */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_LSBTHROW_800UA          =    2,  /*!< 66% LSB throw away current (better performance)                                                                                            */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_LSBTHROW_1200UA         =    3   /*!< 100% LSB throw away current (best performance)                                                                                             */
+} adrv9025_BfTxdacMemMapTxdacThrowLsbCtrl_e;
+/**
+ * \brief Enumeration for txdacWalkPeriod
+ */
+typedef enum adrv9025_BfTxdacMemMapTxdacWalkPeriod
+{
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_WALK_PERIOD_20          =    0,  /*!< Update rate = DAC clock divided by 2^20                                                                                                    */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_WALK_PERIOD_23          =    1,  /*!< Update rate = DAC clock divided by 2^23                                                                                                    */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_WALK_PERIOD_26          =    2,  /*!< Update rate = DAC clock divided by 2^26                                                                                                    */
+    ADRV9025_BF_TXDAC_MEM_MAP_TXDAC_WALK_PERIOD_29          =    3   /*!< Update rate = DAC clock divided by 2^29                                                                                                    */
+} adrv9025_BfTxdacMemMapTxdacWalkPeriod_e;
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ADRV9025_BF_TXDAC_MEM_MAP_TYPES_H__
+
+/*  EOF: adrv9025_bf_txdac_mem_map_types.h */
+

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_cals.h

@@ -0,0 +1,68 @@
+/**
+ * \file adrv9025_cals.h
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+/**
+ * \file adrv9025_cals.h
+ * \brief Contains ADRV9025 calibration related private function prototypes for
+ *        adrv9025_cals.c
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADRV9025_CALS_H_
+#define _ADRV9025_CALS_H_
+
+#include "adi_adrv9025.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ADRV9025_INITOVERRIDE 0xFFFFFFFF
+
+/**
+* \brief Private Helper function to return ARM Calibration error strings.
+*
+*  This is a private function and is automatically called by the API.  
+*
+* \param device Structure pointer to the ADRV9025 data structure containing settings
+* \param errCode Error code that allows looking up
+*        a ARM specific error message.
+*
+* \retval Returns a character array with the error message specified by
+*         errCode.
+*/
+const char* adrv9025_CalsErrMsgGet(adi_adrv9025_Device_t* device,
+                                   uint32_t               errCode);
+
+/**
+* \brief Private Helper function to validate initcal structure.
+*
+* \param device Structure pointer to the ADRV9025 data structure containing settings
+* \param initCals Structure pointer to ADRV9025 initcal settings.
+*
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adrv9025_InitCalStructureCheck(adi_adrv9025_Device_t*   device,
+                                       adi_adrv9025_InitCals_t* initCals);
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_cpu.h

@@ -0,0 +1,315 @@
+/**
+* Copyright 2015 - 2020 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+# ifndef _ADRV_9025_CPU_H_
+#define _ADRV_9025_CPU_H_
+
+#include <stdint.h>
+#include "adi_adrv9025_types.h"
+#include "adi_adrv9025_cpu_types.h"
+#include "../../private/include/adrv9025_cpu_macros.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* \brief Private Helper function to initialize cpu's data structure
+*
+*  This is a private function and is automatically called by the API.
+*
+* \param device Structure pointer to the ADRV9025 data structure containing settings
+*        
+* \retval Returns a character array with the error message specified by
+*         errCode.
+*/
+void adrv9025_CpuInitialize(
+    adi_adrv9025_Device_t* device);
+
+/**
+* \brief Private Helper function to get a CPU's key addresses
+*
+*  This is a private function and is automatically called by the API.
+*
+* \param cpu Structure pointer to the ADRV9025's CPU data structure containing settings
+* \param cpuType type of cpu
+* \param size size of memory to check starting from addr
+*        
+* \retval Returns a character array with the error message specified by
+*         errCode.
+*/
+adi_adrv9025_CpuAddr_t* adrv9025_CpuAddrGet(
+    adi_adrv9025_Cpu_t*    cpu,
+    adi_adrv9025_CpuType_e cpuType);
+
+/**
+* \brief Private Helper function to validate cpu memory address before read/write operation
+*
+*  This is a private function and is automatically called by the API.
+*
+* \param cpu Structure pointer to the ADRV9025's CPU data structure containing settings
+* \param addr memory address to check
+* \param size size of memory to check starting from addr
+*        
+* \retval Returns a character array with the error message specified by
+*         errCode.
+*/
+uint8_t adrv9025_CpuValidateMemoryAddr(
+    adi_adrv9025_Cpu_t* cpu,
+    uint32_t            addr,
+    uint32_t            size);
+
+/**
+* \brief Macro to disable spi streaming in case of an error.
+*
+* \param device Device variable of which spi streaming bit to be restored
+* \param recoveryAction Action to be tested against ADI_COMMON_ACT_NO_ACTION
+*/
+#define ADRV9025_SPI_STREAM_DISABLE_ON_ERROR(device, recoveryAction) \
+    if(recoveryAction != ADI_COMMON_ACT_NO_ACTION) \
+    { device->spiSettings.enSpiStreaming = 0; \
+      adrv9025_SpiCfgSet(device, &device->spiSettings); \
+      ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_API_FAIL, device->common.error.newAction, NULL, "Failed to set SPI Config"); \
+      ADI_ERROR_RETURN(device->common.error.newAction);}
+
+/**
+* \brief Macro to disable spi streaming.
+*
+* \param device Device variable of which spi streaming bit to be restored
+*/
+#define ADRV9025_SPI_STREAM_DISABLE(device) \
+    device->spiSettings.enSpiStreaming = 0; \
+    adrv9025_SpiCfgSet(device, &device->spiSettings); \
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_API_FAIL, device->common.error.newAction, NULL, "Failed to set SPI Config"); \
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+/**
+* \brief Macro to enable spi streaming.
+* When spi streaming is enabled API will write full DMA words
+* as A A D D D D packages
+*
+* \param device Device variable of which spi streaming bit to be restored
+*/
+#define ADRV9025_SPI_STREAM_ENABLE(device) \
+    device->spiSettings.enSpiStreaming = 1; \
+    device->spiSettings.autoIncAddrUp = 1; \
+    adrv9025_SpiCfgSet(device, &device->spiSettings); \
+    ADI_ERROR_REPORT(&device->common, ADI_COMMON_ERRSRC_API, ADI_COMMON_ERR_API_FAIL, device->common.error.newAction, NULL, "Failed to set SPI Config"); \
+    ADI_ERROR_RETURN(device->common.error.newAction);
+
+/**
+* \brief Write to the ADRV9025 CPU program or data memory
+*
+* The user must make sure the memory addresses are valid.
+*
+* \pre This function is private and is not called directly by the user.
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param device Structure pointer to the ADRV9025 data structure containing settings
+* \param address The 32-bit CPU address to write
+* \param data Byte array (uint8_t) containing data to be written to CPU memory
+* \param byteCount Number of bytes in the data array to be written
+* \param autoInc is boolean flag to enable or disable auto-increment of CPU register address
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adrv9025_CpuDmaMemWrite(
+    adi_adrv9025_Device_t* device,
+    uint32_t               address,
+    const uint8_t          data[],
+    uint32_t               byteCount,
+    uint8_t                autoIncrement);
+
+/**
+* \brief Read from the ADRV9025 CPU program or data memory
+*
+* The user must make sure the memory addresses are valid.
+*
+* \pre This function is private and is not called directly by the user.
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param device Structure pointer to the ADRV9025 data structure containing settings
+* \param address The 32bit CPU address to read from.
+* \param returnData Byte(uint8_t) array containing the data read from the CPU memory.
+* \param byteCount Number of bytes in the returnData array.
+* \param autoIncrement is boolean flag to enable or disable auto-increment of CPU register address
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adrv9025_CpuDmaMemRead(
+    adi_adrv9025_Device_t* device,
+    uint32_t               address,
+    uint8_t                returnData[],
+    uint32_t               byteCount,
+    uint8_t                autoIncrement);
+
+/**
+* \brief Private Helper function to return CPU error strings based on the error code.
+*
+*  This is a private function and is automatically called by the API.
+*
+* \param device Structure pointer to the ADRV9025 data structure containing settings
+* \param errCode Error code for looking up CPU a specific error message from a table.
+*        
+* \retval Returns a character array with the error message specified by
+*         errCode.
+*/
+const char* adrv9025_CpuErrCodeToString(
+    adi_adrv9025_Device_t* device,
+    uint32_t               errCode);
+
+/**
+* \brief Private Helper function to process detected errors reported from the
+*        cpu to determine recovery action.
+*
+*  This is a private function and is automatically called by the API.
+*
+* \param device Pointer to device data structure identifying desired device instance
+* \param cpuType type of cpu to be checked
+* \param errHdl Error Handler type
+* \param detErr Error detected to be processed by handler (CPU opcode << 16 | CPU object ID <<8 | CPU cmdStatusByte)
+* \param recoveryAction current Recovery Action,
+* \param recAction new Recovery Action to be returned should error handler determine an error
+*
+* \retval uint32_t Value representing the latest recovery Action following processing of detected cpu error.
+*/
+int32_t adrv9025_CpuCmdErrorHandler(
+    adi_adrv9025_Device_t* device,
+    adi_adrv9025_CpuType_e cpuType,
+    int32_t                errHdl,
+    uint32_t               detErr,
+    int32_t                recoveryAction);
+
+/**
+* \brief Writes the ADRV9025 CPU configuration settings
+*
+* \pre This function is called automatically during adi_adrv9025_CpuStart(), and
+*      this function must be called after loading the CPU firmware.
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep{init-> (most members)}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device settings data structure
+* \param init Pointer to the ADRV9025 initialization settings data structure
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adrv9025_CpuAdcProfilesWrite(
+    adi_adrv9025_Device_t*            device,
+    const adi_adrv9025_AdcProfiles_t* adcProfiles);
+
+/**
+* \brief Loads the ADC profile data into CPU memory
+*
+* This function writes ADC profile into the CPU data memory before
+* loading the CPU firmware.  When the CPU firmware is loaded and begins
+* to initialize, the CPU init sequence copies the ADC profiles from CPU
+* memory and loads them into the CPU firmware internal data strucutures.
+*
+* \pre This function is called during device after downloading CPU code
+*
+*
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+*
+* \param device Pointer to the ADRV9025 device settings data structure
+* \param adcProfiles Pointer to the ADRV9025 ADC profile data structure
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adrv9025_CpuProfileWrite(
+    adi_adrv9025_Device_t*     device,
+    const adi_adrv9025_Init_t* init);
+
+/**
+* \brief Private helper function to return CPU System error code
+*
+*  This is a private function and is automatically called by the API.  BBIC
+*  should use the adi_adrv9025_CpuSystemErrorGet function.
+*
+* \param device Pointer to the ADRV9025 device settings data structure
+* \param cpuType Type of cpu
+* \param systemErrCode Return systemErrCode read from device
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adrv9025_CpuSystemErrCodeGet(adi_adrv9025_Device_t* device,
+                                     adi_adrv9025_CpuType_e cpuType,
+                                     uint16_t*              systemErrCode);
+
+/**
+* \brief Private helper function to enter serdes test mode
+*
+*  This is a private function that should be used to put the arm into serdes test mode
+*
+* \param device Pointer to the ADRV9025 device settings data structure
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adrv9025_CpuSerdesTestModeEnter(adi_adrv9025_Device_t *device);
+
+/**
+* \brief Private helper function to exit serdes test mode
+*
+*  This is a private function that should be used to exit serdes test mode
+*
+* \param device Pointer to the ADRV9025 device settings data structure
+*
+* \retval ADI_COMMON_ACT_WARN_RESET_LOG Recovery action for log reset
+* \retval ADI_COMMON_ACT_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_COMMON_ACT_ERR_RESET_INTERFACE Recovery action for SPI reset required
+* \retval ADI_COMMON_ACT_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adrv9025_CpuSerdesTestModeExit(adi_adrv9025_Device_t *device);
+    
+/**
+* \brief This function sets the Deserializer configuration.
+* This function is used to load the correct setting for the desCfg configuration which is in the init structure depending on the device ID.
+* 
+* \dep_begin
+* \dep{device->common.devHalInfo}
+* \dep_end
+* 
+* \param device Pointer to the ADRV9025 data structure
+* \param init Pointer to init data structure
+*
+* \retval ADI_ADRV9025_RESET_LOG Recovery action for log reset
+* \retval ADI_ADRV9025_ERR_CHECK_PARAM Recovery action for bad parameter check
+* \retval ADI_ADRV9025_NO_ACTION Function completed successfully, no action required
+*/
+int32_t adrv9025_JesdDesCfgSet(adi_adrv9025_Device_t *device,
+                               adi_adrv9025_Init_t   *init);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ADRV_9025_CPU_H_ */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_cpu_error_mapping.h

@@ -0,0 +1,545 @@
+/**
+* \file adrv9025_arm_error_mapping.h
+* \brief Contains ARM error tables
+*
+* \note This file was autogenerated. DO NOT MODIFY.
+*
+* ADRV9025 API Version: 6.4.0.14
+*/
+
+/**
+* Copyright 2015 - 2022 Analog Devices Inc.
+* Released under the ADRV9025 API license, for more information
+* see the "LICENSE.pdf" file in this zip file.
+*/
+
+#ifndef _ADRV9025_ARM_ERROR_MAPPING_H_
+#define _ADRV9025_ARM_ERROR_MAPPING_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The firmware revision required for this API */
+#define ADRV9025_ERROR_TABLE_EXPECTED_FW_MAJOR_REV 6u
+#define ADRV9025_ERROR_TABLE_EXPECTED_FW_MINOR_REV 4u
+#define ADRV9025_ERROR_TABLE_EXPECTED_FW_MAINT_REV 0u
+#define ADRV9025_ERROR_TABLE_EXPECTED_FW_BUILD_NUM 6u
+
+typedef struct adrv9025_arm_api_error
+{
+    const uint32_t errcode;
+    const char* const errstr;
+} adrv9025_arm_api_error_t;
+
+const adrv9025_arm_api_error_t adrv9025_error_table_ArmBootStatus[] =
+{
+    { 0UL, "Used to put API in wait for ARM state" },
+    { 1UL, "ARM booted with no failure" },
+    { 2UL, "ARM Firmware checksum error" },
+    { 3UL, "ARM data memory error" },
+    { 4UL, "Stream image checksum error" },
+    { 5UL, "Device profile checksum error" },
+    { 6UL, "Bootup clkgen setup error" },
+    { 7UL, "Bootup Jesd setup error" },
+    { 8UL, "Power init setup error" },
+    { 9UL, "Jtag build status ready indication" },
+    { 10UL, "Bootup clock LOGEN error" },
+    { 11UL, "Error initializing RxQEC hardware" },
+    { 12UL, "Failed to create Health monitor timers" },
+    { 13UL, "ADC RCAL error" },
+    { 14UL, "Stream Run error" },
+    { 15UL, "Bootup clkgen setup after RCAL error" },
+    { 16UL, "LDO configured incorrectly" },
+    { 17UL, "Invalid Efuse Channel Config Error" },
+    { 18UL, "ARM-D booted with no failure" },
+    { 19UL, "ARM-D Firmware checksum error" },
+    { 20UL, "ARM-D did not boot, unknown reason" }
+};
+
+const adrv9025_arm_api_error_t adrv9025_error_table_CmdCtrlMboxCmdError[] =
+{
+    { 0UL, "No Error" },
+    { 1UL, "Nested Mailbox command" },
+    { 2UL, "Command not supported" },
+    { 3UL, "Invalid state" },
+    { 4UL, "Timed out waiting on busy bit" },
+    { 5UL, "Timed out waiting on status bit" },
+    { 6UL, "Reserved 3" },
+    { 7UL, "Command error" }
+};
+
+const adrv9025_arm_api_error_t adrv9025_error_table_ErrorCode[] =
+{
+    { 0x0000UL, "No Error" },
+    { 0x0001UL, "TXBBF:TX is disabled" },
+    { 0x0002UL, "TXBBF:Calibration timed-out" },
+    { 0x0003UL, "TXBBF:Calibration results are invalid" },
+    { 0x0004UL, "TXBBF:PFIR Set/Read verification failed" },
+    { 0x0005UL, "TXBBF:DAC Image capacitor estimate too high" },
+    { 0x0006UL, "TXBBF:DAC Image capacitor estimate too low" },
+    { 0x0007UL, "TXBBF:DAC Image capacitor estimate above maximum" },
+    { 0x0008UL, "TXBBF:Control command not supported" },
+    { 0x0009UL, "TXBBF:Invalid filter frequency." },
+    { 0x0101UL, "ADCTuner:Calibration Timed-out" },
+    { 0x0102UL, "ADCTuner:Invalid channel" },
+    { 0x0103UL, "ADCTuner:Self-Test Error" },
+    { 0x0104UL, "ADCTuner:Param Profile Select Error" },
+    { 0x0201UL, "TIARx:CAL aborted" },
+    { 0x0202UL, "TIARx:No solution for RX" },
+    { 0x0203UL, "TIARx:RX Stream error" },
+    { 0x0204UL, "TIARx:Cal tone error" },
+    { 0x0205UL, "TIARx:Control command not supported" },
+    { 0x0206UL, "TIARx:Flatness error for RX" },
+    { 0x0207UL, "TIARx:Sig Present error for RX" },
+    { 0x0208UL, "TIARx:ADC Cal Not run error for RX" },
+    { 0x0301UL, "TIAORx:CAL aborted" },
+    { 0x0302UL, "TIAORx:No solution for ORX" },
+    { 0x0303UL, "TIAORx:ORX Stream error" },
+    { 0x0304UL, "TIAORx:Cal tone error" },
+    { 0x0305UL, "TIAORx:Control command not supported" },
+    { 0x0306UL, "TIAORx:Flatness error for ORX" },
+    { 0x0307UL, "TIAORx:Sig Present error for ORX" },
+    { 0x0308UL, "TIAORx:ADC Cal Not run error for ORX" },
+    { 0x0401UL, "TIALBRx:CAL aborted" },
+    { 0x0402UL, "TIALBRx:No solution for LBRX" },
+    { 0x0403UL, "TIALBRx:LBRX Stream error" },
+    { 0x0404UL, "TIALBRx:Cal tone error" },
+    { 0x0405UL, "TIALBRx:Control command not supported" },
+    { 0x0406UL, "TIALBRx:Flatness error for LBRX" },
+    { 0x0407UL, "TIALBRx:Sig Present error for LBRX" },
+    { 0x0408UL, "TIALBRx:ADC Cal Not run error for LBRX" },
+    { 0x0501UL, "DCOffsetRx:Calibration timed out" },
+    { 0x0502UL, "DCOffsetRx:RXON HI stream errored out" },
+    { 0x0503UL, "DCOffsetRx:RXON LOW stream errored out" },
+    { 0x0504UL, "DCOffsetRx:Undefined API function called" },
+    { 0x0601UL, "DCOffsetORx:Calibration timed out" },
+    { 0x0602UL, "DCOffsetORx:ORXON HI stream errored out" },
+    { 0x0603UL, "DCOffsetORx:ORXON LOW stream errored out" },
+    { 0x0604UL, "DCOffsetORx:Undefined API function called" },
+    { 0x0701UL, "DCOffsetLBRx:Calibration timed out" },
+    { 0x0702UL, "DCOffsetLBRx:LBRXON HI stream errored out" },
+    { 0x0703UL, "DCOffsetLBRx:LBRXON LOW stream errored out" },
+    { 0x0801UL, "FlashCal:Calibration aborted" },
+    { 0x0802UL, "FlashCal:Calibration timed-out" },
+    { 0x0803UL, "FlashCal:No channel is selected" },
+    { 0x0804UL, "FlashCal:Rx is disabled" },
+    { 0x0805UL, "FlashCal:ORx is disabled" },
+    { 0x0806UL, "FlashCal:Final cal result failed threshold test" },
+    { 0x0807UL, "FlashCal:Restored data during warm boot is invalid" },
+    { 0x0808UL, "FlashCal:Stream reported an error trying to enable Rx/ORx ADCs" },
+    { 0x0901UL, "PathDelay:Did not detect a measurable pathdelay" },
+    { 0x0902UL, "PathDelay:Measured TX power is too low" },
+    { 0x0903UL, "PathDelay:Measured correlated power too low" },
+    { 0x0904UL, "PathDelay:TXQEC pathdelay peak is not strong (bad PFIR?)" },
+    { 0x0905UL, "PathDelay:No loopback is enabled for pathdelay" },
+    { 0x0A01UL, "TxLOLIntInit:Pathdelay invalid" },
+    { 0x0A02UL, "TxLOLIntInit:Data capture timed-out due to HW setup" },
+    { 0x0A03UL, "TxLOLIntInit:Batch time too small" },
+    { 0x0A04UL, "TxLOLIntInit:Offset LO not enabled" },
+    { 0x0A05UL, "TxLOLIntInit:Data capture was aborted" },
+    { 0x0A06UL, "TxLOLIntInit:Data capture timed-out" },
+    { 0x0A07UL, "TxLOLIntInit:Data capture failed due to channel pause" },
+    { 0x0A08UL, "TxLOLIntInit:No data was captured" },
+    { 0x0B0AUL, "TxLOLIntInit:Wrong baseband is active" },
+    { 0x0B01UL, "TxLOLExtInit:Initial Cal did not run first" },
+    { 0x0B02UL, "TxLOLExtInit:Pathdelay invalid" },
+    { 0x0B03UL, "TxLOLExtInit:Data capture error due to HW" },
+    { 0x0B04UL, "TxLOLExtInit:Batch time too small" },
+    { 0x0B05UL, "TxLOLExtInit:Data capture was aborted" },
+    { 0x0B06UL, "TxLOLExtInit:Data capture timed-out" },
+    { 0x0B07UL, "TxLOLExtInit:No data was captured" },
+    { 0x0B08UL, "TxLOLExtInit:No Orx assigned to the TX channel" },
+    { 0x0B09UL, "TxLOLExtInit:Orx assigned to the TX channel, is not configured" },
+    { 0x0B0AUL, "TxLOLExtInit:Wrong baseband is active" },
+    { 0x0C01UL, "TxQECInit:TX is disabled" },
+    { 0x0C02UL, "TxQECInit:LBRX is disabled" },
+    { 0x0C03UL, "TxQECInit:No pathdelay estimate present" },
+    { 0x0C04UL, "TxQECInit:Offset LO not enabled" },
+    { 0x0C05UL, "TxQECInit:Channel estimate never reached variance" },
+    { 0x0C06UL, "TxQECInit:Channel estimate calculation error" },
+    { 0x0C07UL, "TxQECInit:Correlation capture timed-out or was aborted" },
+    { 0x0C08UL, "TxQECInit:Correlation capture timed-out or was aborted" },
+    { 0x0C09UL, "TxQECInit:Correlation capture error" },
+    { 0x0C0AUL, "TxQECInit:Tone measurement error" },
+    { 0x0C0BUL, "TxQECInit:No signal present" },
+    { 0x0C0CUL, "TxQECInit:Need estimate for coarse change transition point" },
+    { 0x0C0DUL, "TxQECInit:Decrementing fine phase, coarse value railed" },
+    { 0x0C0EUL, "TxQECInit:Incrementing fine phase, coarse value railed" },
+    { 0x0C0FUL, "TxQECInit:Tone measurement saturated error" },
+    { 0x0D01UL, "LBRxLODelay:TX is disabled" },
+    { 0x0D02UL, "LBRxLODelay:LBRX is disabled" },
+    { 0x0D03UL, "LBRxLODelay:PLL setup error" },
+    { 0x0D04UL, "LBRxLODelay:Data Capture Error" },
+    { 0x0D05UL, "LBRxLODelay:Coarse phase estimate Error" },
+    { 0x0D06UL, "LBRxLODelay:Fine phase estimate Error" },
+    { 0x0D07UL, "LBRxLODelay:Output phase error too large (self-test)" },
+    { 0x0D08UL, "LBRxLODelay:Data Capture Abort Error" },
+    { 0x0D09UL, "LBRxLODelay:Loop-back tone signal power too weak" },
+    { 0x0E01UL, "LBRxTCAL:LBRX TCAL RxQec3 obs image power error" },
+    { 0x0E02UL, "LBRxTCAL:LBRX TCAL RxQec3 obs insufficient power error" },
+    { 0x0E03UL, "LBRxTCAL:LBRX TCAL RxQec3 obs numerical error" },
+    { 0x0E04UL, "LBRxTCAL:LBRX TCAL RxQec3 obs no new data" },
+    { 0x0E05UL, "LBRxTCAL:LBRX TCAL data capture error" },
+    { 0x0E06UL, "LBRxTCAL:Hclip error" },
+    { 0x0F01UL, "RxLODelay:RX is disabled" },
+    { 0x0F02UL, "RxLODelay:Data Capture Error" },
+    { 0x1001UL, "RxTCAL:RxQec3 obs image power error" },
+    { 0x1002UL, "RxTCAL:RxQec3 obs insufficient power error" },
+    { 0x1003UL, "RxTCAL:RxQec3 obs numerical error" },
+    { 0x1004UL, "RxTCAL:RxQec3 obs no new data" },
+    { 0x1005UL, "RxTCAL:Data capture error" },
+    { 0x1006UL, "RxTCAL:Hclip error" },
+    { 0x1101UL, "ORXLODelay:ORX is disabled" },
+    { 0x1102UL, "ORXLODelay:Data Capture Error" },
+    { 0x1201UL, "ORxTCAL:RxQec3 obs image power error" },
+    { 0x1202UL, "ORxTCAL:RxQec3 obs insufficient power error" },
+    { 0x1203UL, "ORxTCAL:RxQec3 obs numerical error" },
+    { 0x1204UL, "ORxTCAL:RxQec3 obs no new data" },
+    { 0x1205UL, "ORxTCAL:data capture error" },
+    { 0x1206UL, "ORxTCAL:Hclip error" },
+    { 0x1301UL, "TxDAC:DAC supply clock error" },
+    { 0x1302UL, "TxDAC:DAC channel I not powered up" },
+    { 0x1303UL, "TxDAC:DAC channel Q not powered up" },
+    { 0x1304UL, "TxDAC:DAC channel I calibration didn't finish" },
+    { 0x1305UL, "TxDAC:DAC channel Q calibration didn't finish" },
+    { 0x1306UL, "TxDAC:DAC channel I saturated" },
+    { 0x1307UL, "TxDAC:DAC channel Q saturated" },
+    { 0x1308UL, "TxDAC:DAC channel I clock not powered down" },
+    { 0x1309UL, "TxDAC:DAC channel Q clock not powered down" },
+    { 0x1401UL, "DPDExt:DPD hardware is being used by other cals" },
+    { 0x1402UL, "DPDExt:Stream Error" },
+    { 0x1403UL, "DPDExt:Tx transition occurs during capture" },
+    { 0x1404UL, "DPDExt:Global peak copy didn't complete in time" },
+    { 0x1405UL, "DPDExt:Failed to create external DPD task" },
+    { 0x1406UL, "DPDExt:Failed to create the event group" },
+    { 0x1407UL, "DPDExt:The given model number is beyond number of models supported" },
+    { 0x1408UL, "DPDExt:Recieved a new model update command while one is in progress" },
+    { 0x1801UL, "TxAttenDelay:Invalid value" },
+    { 0x1802UL, "TxAttenDelay:Invalid NCO power level" },
+    { 0x1803UL, "TxAttenDelay:Calibration failed to start" },
+    { 0x1804UL, "TxAttenDelay:Calibration value too low" },
+    { 0x1805UL, "TxAttenDelay:Calibration value too high" },
+    { 0x1806UL, "TxAttenDelay:Max deviation in cal results reached" },
+    { 0x1807UL, "TxAttenDelay:Calibration timed-out" },
+    { 0x1901UL, "TxAtten:Log timeout error" },
+    { 0x1902UL, "TxAtten:Log read error" },
+    { 0x1903UL, "TxAtten:Gain table error" },
+    { 0x1904UL, "TxAtten:Rxqec hw log error" },
+    { 0x1905UL, "TxAtten:Rxqec hw log error" },
+    { 0x1906UL, "TxAtten:Phase measurement tone is OOB, not NCO shiftable for Phase measurement" },
+    { 0x1907UL, "TxAtten:Phase measurement curve fit error" },
+    { 0x1908UL, "TxAtten:Tx LO and Aux LO are not synchronized" },
+    { 0x1A01UL, "RxGainDelay:Tone power too low" },
+    { 0x1A02UL, "RxGainDelay:Calibration failed to start" },
+    { 0x1A03UL, "RxGainDelay:Calibration value too low" },
+    { 0x1A04UL, "RxGainDelay:Calibration value too high" },
+    { 0x1A05UL, "RxGainDelay:Max deviation in cal results reached" },
+    { 0x1A06UL, "RxGainDelay:Calibration timed-out" },
+    { 0x1B01UL, "RxPhaseInit:log timeout error" },
+    { 0x1B02UL, "RxPhaseInit:log read error" },
+    { 0x1B03UL, "RxPhaseInit:gain table error" },
+    { 0x1B04UL, "RxPhaseInit:rxqec hw log error" },
+    { 0x1B05UL, "RxPhaseInit:rxqec hw log error" },
+    { 0x1E01UL, "SERDES:Lane is powered down" },
+    { 0x1E02UL, "SERDES:Control command not supported" },
+    { 0x1E03UL, "SERDES:Best rset value not found" },
+    { 0x1E04UL, "SERDES:Set Cal args Error" },
+    { 0x1E05UL, "SERDES:Invalid temperature" },
+    { 0x1E06UL, "SERDES:ALC calibration timeout" },
+    { 0x1E07UL, "SERDES: Failed to create serdes semaphore" },
+    { 0x1E08UL, "SERDES: Failed to take serdes semaphore" },
+    { 0x1D01UL, "TxCFR:configuration error" },
+    { 0x1D02UL, "TxCFR:unknown programming pulse mode" },
+    { 0x1D03UL, "TxCFR:input rate exceeds max supported" },
+    { 0x1D04UL, "TxCFR:control command not supported" },
+    { 0x3001UL, "RxQECTrack:data capture error" },
+    { 0x3002UL, "RxQECTrack:observation clipping, indicating setup error" },
+    { 0x3003UL, "RxQECTrack:correction update semaphore error" },
+    { 0x3004UL, "RxQECTrack:model has diverged and has been reset" },
+    { 0x3201UL, "TxLOLTrack:Capture error" },
+    { 0x3202UL, "TxLOLTrack:Capture abort error" },
+    { 0x3203UL, "TxLOLTrack:Overflow warning" },
+    { 0x3204UL, "TxLOLTrack:Pathdelay invalid" },
+    { 0x3205UL, "TxLOLTrack:LOL Internal init calibration not done" },
+    { 0x3206UL, "TxLOLTrack:No data was captured" },
+    { 0x3207UL, "TxLOLTrack:No Orx assigned to the TX channel" },
+    { 0x3208UL, "TxLOLTrack:Not all batches were run" },
+    { 0x3209UL, "TxLOLTrack:Orx assigned to the TX channel, is not configured" },
+    { 0x320AUL, "TxLOLTrack:Capture timed-out" },
+    { 0x320BUL, "TxLOLTrack:Dummy capture failed" },
+    { 0x320CUL, "TxLOLTrack:LOL External init calibration not done" },
+    { 0x320DUL, "TxLOLTrack:Performed channel reset due to PLL changes" },
+    { 0x320EUL, "TxLOLTrack:Wrong baseband is active" },
+    { 0x3301UL, "TxQECTrack:Correlation capture error" },
+    { 0x3302UL, "TxQECTrack:Correlation capture error" },
+    { 0x3303UL, "TxQECTrack:Initial calibration not done" },
+    { 0x3304UL, "TxQECTrack:No signal present" },
+    { 0x3305UL, "TxQECTrack:Channel variance is invalid" },
+    { 0x3306UL, "TxQECTrack:Correlation output buffer is null" },
+    { 0x3307UL, "TxQECTrack:Correlation output buffer is not full" },
+    { 0x3308UL, "TxQECTrack:Capture timed-out" },
+    { 0x3309UL, "TxQECTrack:Capture ended with no solution" },
+    { 0x320AUL, "TxQECTrack:Wrong baseband is active" },
+    { 0x3401UL, "DPDTrack:reserved" },
+    { 0x3402UL, "DPDTrack:reserved" },
+    { 0x3403UL, "DPDTrack:Pathdelay not setup yet" },
+    { 0x3404UL, "DPDTrack:reserved" },
+    { 0x3405UL, "DPDTrack:ORx signal is too small" },
+    { 0x3406UL, "DPDTrack:ORx signal is saturating" },
+    { 0x3407UL, "DPDTrack:TX signal is too small" },
+    { 0x3408UL, "DPDTrack:TX signal is saturating" },
+    { 0x3409UL, "DPDTrack:reserved" },
+    { 0x340AUL, "DPDTrack:Too many AM-AM outliers" },
+    { 0x340BUL, "DPDTrack:DPD coefficients unavailable" },
+    { 0x340CUL, "DPDTrack:DPD data capture loop time out" },
+    { 0x340DUL, "DPDTrack:Unity model unavailable error" },
+    { 0x340EUL, "DPDTrack:DPD LDL negative diagonal or INF detected" },
+    { 0x340FUL, "DPDTrack:Maximum partial partitions reached" },
+    { 0x3410UL, "DPDTrack:RPC send failed" },
+    { 0x3411UL, "DPDTrack:Unknown RPC message received" },
+    { 0x3412UL, "DPDTrack:Timed out waiting for RPC message" },
+    { 0x3413UL, "DPDTrack:Could not create mutex" },
+    { 0x3414UL, "DPDTrack:ACT I assignment conflict error" },
+    { 0x3415UL, "DPDTrack:ACT K assignment exceed limit error" },
+    { 0x3416UL, "DPDTrack:ACT multiplier row assignment conflict error" },
+    { 0x3417UL, "DPDTrack:ACT LUT out of range error" },
+    { 0x3418UL, "DPDTrack:ACT no free multiplier error" },
+    { 0x3419UL, "DPDTrack:ACT write LUT error" },
+    { 0x341AUL, "DPDTrack:DPD hardware is being used by other cals" },
+    { 0x341BUL, "DPDTrack:DPD data capture error" },
+    { 0x341CUL, "DPDTrack:DPD x-correlation error" },
+    { 0x341DUL, "DPDTrack:DPD stability error occurs" },
+    { 0x341EUL, "DPDTrack:DPD cholesky diagonal term too small" },
+    { 0x341FUL, "DPDTrack:DPD-CLGC synchronization error" },
+    { 0x3420UL, "DPDTrack:ACT LUT Entry Saturated" },
+    { 0x3421UL, "DPDTrack:DPD data capture timeout error" },
+    { 0x3422UL, "DPDTrack:Message Send RPC send failed" },
+    { 0x3423UL, "DPDTrack:Do Reset RPC send failed" },
+    { 0x3424UL, "DPDTrack:Message Get RPC send failed" },
+    { 0x3501UL, "CLGCTrack:Correlation capture error" },
+    { 0x3502UL, "CLGCTrack:Correlation capture abort error" },
+    { 0x3503UL, "CLGCTrack:Pathdelay not found error" },
+    { 0x3504UL, "CLGCTrack:Fail to apply tx atten error" },
+    { 0x3505UL, "CLGCTrack:Tx atten limit error" },
+    { 0x3506UL, "CLGCTrack:Convergence limit error" },
+    { 0x3507UL, "CLGCTrack:PA protection error" },
+    { 0x3508UL, "CLGCTrack:CLGC-DPD synchronization error" },
+    { 0x3509UL, "CLGCTrack:Tx power level too low error" },
+    { 0x350AUL, "CLGCTrack:ORx power level too low error" },
+    { 0x350BUL, "CLGCTrack:Tx power measurement error" },
+    { 0x350CUL, "CLGCTrack:ORx power measurement error" },
+    { 0x350DUL, "CLGCTrack:Data capture timeout caused by invalid tx-to-orx mapping" },
+    { 0x3701UL, "HD2Track: HD2 correction filter mapping error" },
+    { 0x3801UL, "Initial calibration not done" },
+    { 0x3802UL, "Serdes lane powered down" },
+    { 0x3803UL, "Capture error" },
+    { 0x3804UL, "Cal exit requested" },
+    { 0x3804UL, "Status request argument invalid" },
+    { 0x6001UL, "GPIOCtrl:Given signal ID is invalid" },
+    { 0x6002UL, "GPIOCtrl:The given GPIO number is invalid" },
+    { 0x6B01UL, "Loopfilter:PLL Selected invalid" },
+    { 0x6B02UL, "Loopfilter:Input Selected invalid" },
+    { 0x7701UL, "SRL:Slew Rate Limiter detected overload" },
+    { 0x7702UL, "SRL:Init cals can't run when SRL is enabled" },
+    { 0x7703UL, "SRL:Operation failed because SRL violation is in active progress" },
+    { 0x7E01UL, "CaptureORx:Capture timed-out" },
+    { 0x7E02UL, "CaptureORx:Number of samples not a power of 2" },
+    { 0x7E03UL, "CaptureORx:Invalid TX input channel mask" },
+    { 0x7E04UL, "CaptureORx:Invalid ORX input channel mask" },
+    { 0x7E05UL, "CaptureORx:Required TX stream is disabled" },
+    { 0x7E06UL, "CaptureORx:Required ORX stream is disabled" },
+    { 0x7E07UL, "CaptureORx:For playback" },
+    { 0x8001UL, "DeviceProfile:Checksum error" },
+    { 0x8002UL, "DeviceProfile:Missing data for enabled channel" },
+    { 0x8003UL, "DeviceProfile:ADC tuner profile checksum error" },
+    { 0x8301UL, "Scheduler:A cal timed out while waiting for Scheduler to abort a data capture" },
+    { 0x8302UL, "Scheduler:An invalid cal ID is passed to the Scheduler" },
+    { 0x8303UL, "Scheduler:Scheduler received a PAUSED event that it was not expecting" },
+    { 0x8101UL, "RadioEvent:TXCAL_ENADIS command cannot be issued as a pin is mapped to control it" },
+    { 0xB001UL, "NCO:Invalid input parameters" },
+    { 0xB101UL, "Stream:Invalid input parameters" },
+    { 0xB102UL, "Stream:Timer expired waiting for stream completion" },
+    { 0xB103UL, "Stream:Triggered stream reported an error" },
+    { 0xB104UL, "Stream:Failed checksum verification" },
+    { 0xB105UL, "Stream:Reported a FIFO error" },
+    { 0xB106UL, "Stream:Reported an external timer error" },
+    { 0xB107UL, "Stream:Reported an invalid instruction" },
+    { 0xB108UL, "Stream:Reported an invalid AHB address" },
+    { 0xB109UL, "Stream:Reported an invalid stream number" },
+    { 0xB10AUL, "Stream:Reported a stack overflow" },
+    { 0xB10BUL, "Stream:Reported a timeout error" },
+    { 0xB10CUL, "Stream:Reported a check instruction error" },
+    { 0xB10DUL, "Stream:Reported an invalid SPI address" },
+    { 0xB10EUL, "Stream:Previous Stream didn't finish" },
+    { 0xB10FUL, "Stream:Undefined Error" },
+    { 0xB201UL, "PFIR:Invalid configuration" },
+    { 0xB301UL, "JESD:Framer lane overlap" },
+    { 0xB302UL, "JESD:Deframer lane overlap" },
+    { 0xB303UL, "JESD:Framer number too larger" },
+    { 0xB304UL, "JESD:Deframer number too larger" },
+    { 0xB305UL, "JESD:Framer S is not a power of 2" },
+    { 0xB306UL, "JESD:Deframer M not a power of 2" },
+    { 0xB307UL, "JESD:Number of framer lanes must be more than 0" },
+    { 0xB308UL, "JESD:No enabled deframer lanes" },
+    { 0xB309UL, "JESD:Framer number of converters (M) set to 0" },
+    { 0xB30AUL, "JESD:Framer number of converters is not a power of 2" },
+    { 0xB30BUL, "JESD:Framer sample rate divide ratio not power of 2" },
+    { 0xB30CUL, "JESD:Deframer sample rate divide ratio not power of 2" },
+    { 0xB30DUL, "JESD:Framer0 must be enabled" },
+    { 0xB30EUL, "JESD:bitRepeatRatio is not a power of 2" },
+    { 0xB30FUL, "JESD:bitSplitRatio is not a power of 2" },
+    { 0xB310UL, "JESD:Framer pclk divide ratio not a power of 2" },
+    { 0xB311UL, "JESD:Failed to configure line clock" },
+    { 0xB312UL, "JESD:Serdes PLL invalid input parameters" },
+    { 0xB313UL, "JESD:Serdes PLL failed to calibrate or lock" },
+    { 0xB314UL, "JESD:Driver not initialized" },
+    { 0xB315UL, "JESD:Framer lane clock invalid" },
+    { 0xB316UL, "JESD:Deframer lane clock invalid" },
+    { 0xB317UL, "JESD:Unsupported configuration" },
+    { 0xB318UL, "JESD:Framer sample rate is zero" },
+    { 0xB319UL, "JESD:Deframer sample rate is zero" },
+    { 0xB31AUL, "JESD:Invalid TX config detected by Jesd h/w block" },
+    { 0xB31BUL, "JESD:Invalid RX config detected by Jesd h/w block" },
+    { 0xB31CUL, "JESD:Invalid Framer Sample Xbar entry" },
+    { 0xB31DUL, "JESD:Framer fast pclk divide ratio not integer" },
+    { 0xB31EUL, "JESD:Framer pclk divide ratio not integer" },
+    { 0xB31FUL, "JESD:Invalid Framer Sync Pad configuration" },
+    { 0xB320UL, "JESD:Invalid Deframer Sync Pad configuration" },
+    { 0xB321UL, "JESD:Deframer S is not a power of 2" },
+    { 0xB322UL, "JESD:Framer link sharing configuration invalid" },
+    { 0xB323UL, "JESD:Serdes Master Reset active" },
+    { 0xB324UL, "JESD:Invalid Deframer Sample Xbar entry" },
+    { 0xB325UL, "JESD:Invalid Framer link layer mode of operation" },
+    { 0xB326UL, "JESD:Invalid Deframer link layer mode of operation" },
+    { 0xB327UL, "JESD:Framer link sharing number of converters (M) invalid" },
+    { 0xB401UL, "RxQECHWDrv:Error configuring RxQEC core clocks" },
+    { 0xB402UL, "RxQECHWDrv:Error configuring RxQEC channel clocks" },
+    { 0xB403UL, "RxQECHWDrv:QFIR overflow error, unable to represent desired filter in hardware" },
+    { 0xB404UL, "RxQECHWDrv:LOC overflor error, unable to represent desired phase coefficient in hardware" },
+    { 0xB405UL, "RxQECHWDrv:CFIR overflor error, unable to represent desired filter in hardware" },
+    { 0xB406UL, "RxQECHWDrv:Error while attempting to halt an OBS engine" },
+    { 0xB407UL, "RxQECHWDrv:Attempted to use an observation engine that was already allocated to another cal" },
+    { 0xB408UL, "RxQECHWDrv:Attempted to release an observation engine that was allocated to another cal" },
+    { 0xB409UL, "RxQECHWDrv:Error configuring RxQEC observation profiles" },
+    { 0xB40AUL, "RxQECHWDrv:Observation data FIFO full" },
+    { 0xB501UL, "TxAttenDrv:Wrong SPI mode for operation" },
+    { 0xB502UL, "TxAttenDrv:Invalid HP attenuation value" },
+    { 0xB503UL, "TxAttenDrv:Invalid digital attenuation value" },
+    { 0xB504UL, "TxAttenDrv:Set attenuation state using invalid structure" },
+    { 0xB601UL, "TxQECDrv:NCO synchronization timed-out" },
+    { 0xB602UL, "TxQECDrv:NCO Set frequency is invalid" },
+    { 0xB603UL, "TxQECDrv:Txqec correlator didn't finish" },
+    { 0xB604UL, "TxQECDrv:NCO Offset LO Sync is inactive" },
+    { 0xB605UL, "TxQECDrv:NCO Offset LO is not synced" },
+    { 0x7F01UL, "TestMode:Invalid test task requested" },
+    { 0xF001UL, "TestModeClkPll:Not in CLKPLL_SWEEP Test Mode" },
+    { 0xF002UL, "TestModeClkPll:Frequency is out of range" },
+    { 0xF003UL, "TestModeClkPll:BW parameter is out of range" },
+    { 0xF101UL, "TestModeTxBBF:Not in TXBBF_3DB_SWEEP Test Mode" },
+    { 0xF201UL, "TestModeTIA:Not in TIA_3DB_SWEEP Test Mode" },
+    { 0xF202UL, "TestModeTIA:Frequency is out of range" },
+    { 0xF203UL, "TestModeTIA:Invalid Channel Type" },
+    { 0xF301UL, "TestModeLBRx:Not in LOOPBACK Ctrl Test Mode" },
+    { 0xF302UL, "TestModeLBRx:Invalid Channel Type" },
+    { 0xF401UL, "TestModeCBus:Not in CBUS R/W Ctrl Test Mode" },
+    { 0xF402UL, "TestModeCBus:Invalid address Type" },
+    { 0xFA01UL, "TestModeSerdes:Mode not supported on this platform" },
+    { 0xFA02UL, "TestModeSerdes:Not in Serdes Test Mode" },
+    { 0xFC01UL, "TestModeSerdes:Mode not supported on this platform" },
+    { 0xFC02UL, "TestModeSerdes:Not in Serdes BG Cals Test Mode" },
+    { 0xFF01UL, "System:PLL Synth Lock Failed" },
+    { 0xFF02UL, "System:PLL Charge Pump Calibration error" },
+    { 0xFF03UL, "System:PLL Calculation error" },
+    { 0xFF04UL, "System:PLL input freq out of range" },
+    { 0xFF05UL, "System:PLL Invalid PLL type" },
+    { 0xFF06UL, "System:SysClk parameter out of range" },
+    { 0xFF07UL, "System:HSDig calculations did not match API settings" },
+    { 0xFF08UL, "System:Rx Setup Error" },
+    { 0xFF09UL, "System:Orx Setup Error" },
+    { 0xFF0AUL, "System:Tx Setup Error" },
+    { 0xFF0BUL, "System:SysPLL Flagged an error." },
+    { 0xFF0CUL, "System:Logen range error." },
+    { 0xFF0DUL, "System:Logen bad path error." },
+    { 0xFF0EUL, "System:MCS did not complete" },
+    { 0xFF0FUL, "System:SERDES PLL Synth Lock Failed" },
+    { 0xFF10UL, "System:SERDES PLL Invalid Input Parameter" },
+    { 0xFF11UL, "System:Init cal invalid sequenct length" },
+    { 0xFF12UL, "System:RF PLL Frequency not set" },
+    { 0xFF13UL, "System:Tone path not configured" },
+    { 0xFF14UL, "System:Init cal interrupted by ABORT command" },
+    { 0xFF15UL, "System:Init cal warm boot checksum error" },
+    { 0xFF16UL, "System:Init cal invalid channel mask error" },
+    { 0xFF17UL, "System:Profile checksum failed or bad profile wrt to EFUSE" },
+    { 0xFF18UL, "System:Clock generation error" },
+    { 0xFF19UL, "System:JESD Error" },
+    { 0xFF1AUL, "System:Stream checksum failed" },
+    { 0xFF1BUL, "System:Could not create the task" },
+    { 0xFF1CUL, "System:Could not create the event" },
+    { 0xFF1DUL, "System:Could not create the Queue" },
+    { 0xFF1EUL, "System:Could not create the timer" },
+    { 0xFF1FUL, "System:Failed to post the message" },
+    { 0xFF20UL, "System:Failed to receive the message" },
+    { 0xFF21UL, "System:GP Timer driver error" },
+    { 0xFF22UL, "System:Mailbox critical error" },
+    { 0xFF23UL, "System:Health monitoring timer timedout" },
+    { 0xFF24UL, "System:Commands sent to task that does not exist" },
+    { 0xFF25UL, "System:Invalid message passed to ctrl task" },
+    { 0xFF26UL, "System:Invalid mailbox command passed to ctrl task" },
+    { 0xFF27UL, "System:The given cal does not support the control function" },
+    { 0xFF28UL, "System:The given cal does not support the set config function" },
+    { 0xFF29UL, "System:The given cal does not support the get config function" },
+    { 0xFF2AUL, "System:The given cal does not support the get status function" },
+    { 0xFF2BUL, "System:The given channel is not enabled in the profile" },
+    { 0xFF2CUL, "System:The given target configuration object is invalid" },
+    { 0xFF2DUL, "System:The given configuration size is invalid" },
+    { 0xFF2EUL, "System:The given configuration offset is invalid" },
+    { 0xFF2FUL, "System:The config cannot be updated in current state of module" },
+    { 0xFF30UL, "System:AUX PLL NORMAL VCO failed to start" },
+    { 0xFF31UL, "System:AUX PLL NORMAL VCO to complete" },
+    { 0xFF32UL, "System:AUX PLL FAST VCO failed to start" },
+    { 0xFF33UL, "System:AUX PLL FAST VCO failed to complete" },
+    { 0xFF34UL, "System:PLL Temperature Time Out error" },
+    { 0xFF35UL, "System:PLL Not Enabled" },
+    { 0xFF36UL, "System:PLL Phase Sync Invalide Setting error" },
+    { 0xFF37UL, "System:PLL Phase Sync cal timeout error" },
+    { 0xFF38UL, "System:SERDES PLL Invalid divM value" },
+    { 0xFF39UL, "System:SERDES PLL Invalid rxdivrate value" },
+    { 0xFF3AUL, "System:JTAG Debug Build Error Code" },
+    { 0xFF3BUL, "System:Internal MCS did not complete" },
+    { 0xFF3CUL, "System:DDC calculations were out of bounds" },
+    { 0xFF3DUL, "System:DDC Invalid band selected for Get_DCC parameters" },
+    { 0xFF3EUL, "System:WDT config invalid (most likely in Debug mode = no WDT)" },
+    { 0xFF3FUL, "System:AHB slice error" },
+    { 0xFF40UL, "System:LDO Bypass not configured correctly" },
+    { 0xFF41UL, "System:AUX Adc timed out" },
+    { 0xFF42UL, "System:Semaphore take operation failure" },
+    { 0xFF43UL, "System:RF1 PLL NORMAL VCO failed to start" },
+    { 0xFF44UL, "System:RF1 PLL NORMAL VCO to complete" },
+    { 0xFF45UL, "System:RF1 PLL FAST VCO failed to start" },
+    { 0xFF46UL, "System:RF1 PLL FAST VCO failed to complete" },
+    { 0xFF47UL, "System:RF2 PLL NORMAL VCO failed to start" },
+    { 0xFF48UL, "System:RF2 PLL NORMAL VCO to complete" },
+    { 0xFF49UL, "System:RF2 PLL FAST VCO failed to start" },
+    { 0xFF4AUL, "System:RF2 PLL FAST VCO failed to complete" },
+    { 0xFF4BUL, "System:SERDES PLL Invalid value of B parameter" },
+    { 0xFF4CUL, "System:SERDES PLL Invalid value of refClkIn" },
+    { 0xFF4DUL, "System:Pre init cal AUX:Synth Lock Failed" },
+    { 0xFF4EUL, "System:Post init cal AUX Synth Lock Failed" },
+    { 0xFF4FUL, "System:Pre Init cal TxQEC NCO lock failed" },
+    { 0xFF50UL, "System:Post Init cal TxQEC NCO lock failed" },
+    { 0xFF51UL, "System:DualBand Configuration Error" },
+    { 0xFF52UL, "System:Semaphore create error" },
+    { 0xFF53UL, "System:Semaphore give error" },
+    { 0xFF54UL, "System:Tx Tracking cals cannot be scheduled" },
+    { 0xFF55UL, "System:Core stream external timer error" },
+    { 0xFF56UL, "System:Unable to read EFUSE" },
+    { 0xFF57UL, "System:ARMD did not complete booting" },
+    { 0xFF58UL, "System:pll and jesd gain ramp down event active" }
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_cpu_macros.h

@@ -0,0 +1,277 @@
+/**
+ * \file adrv9025_cpu_macros.h
+ * \brief Contains ADRV9025 API miscellaneous macro definitions for CPU
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADRV_9025_CPU_MACROS_H_
+#define _ADRV_9025_CPU_MACROS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define ADRV9025_CPU_JESD_FRAMERB_OFFSET                  0x28
+#define ADRV9025_CPU_JESD_DEFRAMERB_OFFSET                0x50
+
+/* The mailbox interface 3 bit error flag has a subset of error flags
+* that are common to all cpu commands.
+*/
+#define ADRV9025_CPU_NUM_COMMON_ERR_FLAGS                 0x04
+#define ADRV9025_CPU_NUM_COMMON_SET_ERR_FLAGS             0x05
+#define ADRV9025_CPU_NUM_COMMON_GET_ERR_FLAGS             0x05
+
+/* Cpu Error Flag Source */
+#define ADRV9025_CPU_EFSRC_INITCALS                       0x10
+#define ADRV9025_CPU_EFSRC_SETRFPLL                       0x20
+#define ADRV9025_CPU_EFSRC_SETPENDING                     0x30
+#define ADRV9025_CPU_EFSRC_SETGPIOCTRL                    0x40
+#define ADRV9025_CPU_EFSRC_BOOTUP                         0x100
+
+#define ADRV9025_CPU_ABORT_OPCODE                         0x00
+#define ADRV9025_CPU_RUNINIT_OPCODE                       0x02
+#define ADRV9025_CPU_RADIOON_OPCODE                       0x04
+#define ADRV9025_CPU_SET_OPCODE                           0x0A
+#define ADRV9025_CPU_GET_OPCODE                           0x0C
+#define ADRV9025_CPU_TEST_OPCODE                          0x0E
+#define ADRV9025_CPU_STREAM_TRIGGER_OPCODE                0x1F
+
+#define ADRV9025_CPU_ORX1_TX_SEL0_SIGNALID                0x00
+#define ADRV9025_CPU_ORX1_TX_SEL1_SIGNALID                0x01
+#define ADRV9025_CPU_ORX2_TX_SEL0_SIGNALID                0x02
+#define ADRV9025_CPU_ORX2_TX_SEL1_SIGNALID                0x03
+#define ADRV9025_CPU_ORX3_TX_SEL0_SIGNALID                0x04
+#define ADRV9025_CPU_ORX3_TX_SEL1_SIGNALID                0x05
+#define ADRV9025_CPU_ORX4_TX_SEL0_SIGNALID                0x06
+#define ADRV9025_CPU_ORX4_TX_SEL1_SIGNALID                0x07
+#define ADRV9025_CPU_TX12CAL_ENA_SIGNALID                 0x08
+#define ADRV9025_CPU_TX34CAL_ENA_SIGNALID                 0x09
+#define ADRV9025_CPU_CAL_UPDATE0_SIGNALID                 0x0A
+#define ADRV9025_CPU_CAL_UPDATE1_SIGNALID                 0x0B
+#define ADRV9025_CPU_CAL_UPDATE2_SIGNALID                 0x0C
+#define ADRV9025_CPU_RF_PLL_FREQ_HOP_SIGNALID             0x0D
+#define ADRV9025_CPU_EXT_DPD_CAPTURE_TRIG_SIGNALID        0x0E
+#define ADRV9025_CPU_EXT_DPD_MODEL_SEL0_SIGNALID          0x0F
+#define ADRV9025_CPU_EXT_DPD_MODEL_SEL1_SIGNALID          0x10
+#define ADRV9025_CPU_EXT_DPD_CAPTURE_DONE_SIGNALID        0x11
+
+#define ADRV9025_CPU_OBJECTID_TXBBF_INIT                  0x00
+#define ADRV9025_CPU_OBJECTID_ADCTUNER_INIT               0x01
+#define ADRV9025_CPU_OBJECTID_TIA_INIT                    0x02
+#define ADRV9025_CPU_OBJECTID_ORXTIA_INIT                 0x03
+#define ADRV9025_CPU_OBJECTID_LBRXTIA_INIT                0x04
+#define ADRV9025_CPU_OBJECTID_DCOFFSET_INIT               0x05
+#define ADRV9025_CPU_OBJECTID_ORXDCOFFSET_INIT            0x06
+#define ADRV9025_CPU_OBJECTID_LBRXDCOFFSET_INIT           0x07
+#define ADRV9025_CPU_OBJECTID_ADCFLASH_INIT               0x08
+#define ADRV9025_CPU_OBJECTID_PATHDELAY_INIT              0x09
+#define ADRV9025_CPU_OBJECTID_TXLOLINT_INIT               0x0A
+#define ADRV9025_CPU_OBJECTID_TXLOLEXT_INIT               0x0B
+#define ADRV9025_CPU_OBJECTID_TXQEC_INIT                  0x0C
+#define ADRV9025_CPU_OBJECTID_LBLODELAY_INIT              0x0D
+#define ADRV9025_CPU_OBJECTID_LBRXTCAL_INIT               0x0E
+#define ADRV9025_CPU_OBJECTID_RXLODELAY_INIT              0x0F
+#define ADRV9025_CPU_OBJECTID_RXTCAL_INIT                 0x10
+#define ADRV9025_CPU_OBJECTID_ORXLODELAY_INIT             0x11
+#define ADRV9025_CPU_OBJECTID_ORXTCAL_INIT                0x12
+#define ADRV9025_CPU_OBJECTID_TXDAC_INIT                  0x13
+#define ADRV9025_CPU_OBJECTID_DPD_INIT                    0x14
+#define ADRV9025_CPU_OBJECTID_CLGC_INIT                   0x15
+#define ADRV9025_CPU_OBJECTID_VSWR_INIT                   0x16
+#define ADRV9025_CPU_OBJECTID_HD2_INIT                    0x17
+#define ADRV9025_CPU_OBJECTID_TXATTENDELAY_INIT           0x18
+#define ADRV9025_CPU_OBJECTID_TXATTENTABLECAL_INIT        0x19
+#define ADRV9025_CPU_OBJECTID_RXGAINDELAY_INIT            0x1A
+#define ADRV9025_CPU_OBJECTID_RXGAINPHASECAL_INIT         0x1B
+#define ADRV9025_CPU_OBJECTID_CFR_INIT                    0x1D
+
+#define ADRV9025_CPU_OBJECTID_RXQEC_TRACKING              0x30
+#define ADRV9025_CPU_OBJECTID_ORXQEC_TRACKING             0x31
+#define ADRV9025_CPU_OBJECTID_TXLOL_TRACKING              0x32
+#define ADRV9025_CPU_OBJECTID_TXQEC_TRACKING              0x33
+#define ADRV9025_CPU_OBJECTID_DPD_TRACKING                0x34
+#define ADRV9025_CPU_OBJECTID_CLGC_TRACKING               0x35
+#define ADRV9025_CPU_OBJECTID_VSWR_TRACKING               0x36
+#define ADRV9025_CPU_OBJECTID_RXHD2_TRACKING              0x37
+#define ADRV9025_CPU_OBJECTID_DES_TRACKING                0x38
+
+#define ADRV9025_CPU_OBJECTID_TEMP_SENSOR                 0x40
+#define ADRV9025_CPU_OBJECTID_RSSI                        0x41
+#define ADRV9025_CPU_OBJECTID_CAL_STATUS                  0x42
+#define ADRV9025_CPU_OBJECTID_INITCAL_STATUS              0x43
+#define ADRV9025_CPU_OBJECTID_GO_GET_GP_INT_SOURCE        0x46
+#define ADRV9025_CPU_OBJECTID_TRACKING_CALS_STATE         0x47
+#define ADRV9025_CPU_OBJECTID_BANDSWITCH_STAT             0x4B
+
+#define ADRV9025_CPU_OBJECTID_GPIO_CTRL                   0x60
+#define ADRV9025_CPU_OBJECTID_TX_ORX_MAPPING              0x4A
+#define ADRV9025_CPU_OBJECTID_TXCAL_ENA_DIS               0x62
+#define ADRV9025_CPU_OBJECTID_RFPLL_LO_FREQUENCY          0x63
+#define ADRV9025_CPU_OBJECTID_MCS_DONE                    0x64
+#define ADRV9025_CPU_OBJECTID_TRACKING_CAL_ENABLE         0x65
+#define ADRV9025_CPU_OBJECTID_TRACKING_CAL_CTRL           0x66
+#define ADRV9025_CPU_OBJECTID_TRACKING_CAL_PENDING        0x67
+#define ADRV9025_CPU_OBJECTID_TRACKING_CAL_UPDATE         0x68
+#define ADRV9025_CPU_OBJECTID_CPU_EXCEPTION               0x69
+#define ADRV9025_CPU_OBJECTID_PLL_LOOP_BW                 0x6B
+#define ADRV9025_CPU_OBJECTID_CONFIG                      0x6F
+#define ADRV9025_CPU_OBJECTID_MCS                         0x70
+#define ADRV9025_CPU_OBJECTID_TX_NCO                      0x71
+#define ADRV9025_CPU_OBJECTID_EXT_DPD_ENABLE_DISABLE      0x73
+#define ADRV9025_CPU_OBJECTID_EXT_DPD_CAPTURE_TRIG        0x74
+#define ADRV9025_CPU_OBJECTID_EXT_DPD_CAPTURE_DONE        0x75
+#define ADRV9025_CPU_OBJECTID_EXT_DPD_MODEL_SELECT        0x76
+#define ADRV9025_CPU_OBJECTID_SRL_CONFIG                  0x77
+#define ADRV9025_CPU_OBJECTID_SRL_STATISTICS              0x78
+#define ADRV9025_CPU_OBJECTID_GS_RX_DDC                   0x79
+#define ADRV9025_CPU_OBJECTID_CAPTURE_ORX                 0x7E
+#define ADRV9025_CPU_OBJECTID_GS_TEST_MODE                0x7F
+
+#define ADRV9025_CPU_OBJECTID_DEVICE_PROFILE              0x80
+#define ADRV9025_CPU_OBJECTID_RADIO_CONTROL               0x81
+#define ADRV9025_CPU_OBJECTID_INITIAL_CAL_SEQUENCE        0x82
+#define ADRV9025_CPU_OBJECTID_CAL_SCHEDULER               0x83
+#define ADRV9025_CPU_OBJECTID_HEALTH_MONITORING           0x84
+#define ADRV9025_CPU_OBJECTID_ECC_CONFIGURATION           0x85
+#define ADRV9025_CPU_OBJECTID_SYSTEM_INFO                 0x86
+#define ADRV9025_CPU_OBJECTID_EXT_DPD_CAPTURE             0x88
+#define ADRV9025_CPU_OBJECTID_EXT_DPD_MODEL               0x89
+#define ADRV9025_CPU_OBJECTID_EXT_DPD_SWAP_MODE_EN        0x8A
+#define ADRV9025_CPU_OBJECTID_EXT_DPD_GAIN_MONITOR        0x8B
+#define ADRV9025_CPU_OBJECTID_DUALBANDCFG                 0x8D
+#define ADRV9025_CPU_OBJECTID_EXT_DPD_MULTIMODEL          0x8E
+
+#define ADRV9025_CPU_OBJECTID_NCO_DRIVER                  0xB0
+#define ADRV9025_CPU_OBJECTID_STREAM_DRIVER               0xB1
+#define ADRV9025_CPU_OBJECTID_PFIR_DRIVER                 0xB2
+#define ADRV9025_CPU_OBJECTID_JESD_DRIVER                 0xB3
+#define ADRV9025_CPU_OBJECTID_RXQEC_DRIVER                0xB4
+#define ADRV9025_CPU_OBJECTID_TXATTEN_DRIVER              0xB5
+#define ADRV9025_CPU_OBJECTID_TXQEC_DRIVER                0xB6
+
+#define ADRV9025_CPU_OBJECTID_TM_SERDES_TASK_VERT_ISI     0x04
+
+#define ADRV9025_CPU_OBJECTID_TM_CLKPLL_SWEEP             0xF0
+#define ADRV9025_CPU_OBJECTID_TM_TTXBFF_3DB_SWEEP         0xF1
+#define ADRV9025_CPU_OBJECTID_TM_TIA_3DB_SWEEP            0xF2
+#define ADRV9025_CPU_OBJECTID_TM_LPBK_CTRL                0xF3
+#define ADRV9025_CPU_OBJECTID_TM_SERDES                   0xFA
+#define ADRV9025_CPU_OBJECTID_TM_EXIT                     0xFE
+#define ADRV9025_CPU_OBJECTID_SYSTEM_CONFIG               0xFF
+
+/* CPU-C memory map */
+#define ADRV9025_CPU_C_ADDR_PROG_START                    0x01018000
+#define ADRV9025_CPU_C_ADDR_PROG_END                      0x0104FFFF
+#define ADRV9025_CPU_C_ADDR_DATA_START                    0x20028000
+#define ADRV9025_CPU_C_ADDR_DATA_END                      0x2004FFFF
+#define ADRV9025_CPU_C_ADDR_VERSION                       0x01018240
+#define ADRV9025_CPU_C_ADDR_CFR_PULSE                     0x010182A8
+#define ADRV9025_CPU_C_ADDR_DEV_PROFILE                   0x01018274
+#define ADRV9025_CPU_C_ADDR_ADC_PROFILE                   0x01018278
+#define ADRV9025_CPU_C_ADDR_DEBUG_PTR                     0x0101827C
+#define ADRV9025_CPU_C_ADDR_BUILD_CHKSUM                  0x01047FFC
+#define ADRV9025_CPU_C_ADDR_CALC_CHKSUM_PTR               0x01018270
+#define ADRV9025_CPU_C_ADDR_MAILBOX_SET                   0x20028000
+#define ADRV9025_CPU_C_ADDR_MAILBOX_GET                   0x20028100
+#define ADRV9025_CPU_C_ADDR_MAILBOX_RUN_INIT              0x20028200
+#define ADRV9025_CPU_C_ADDR_MAILBOX_FHM                   0x20028208
+
+/* CPU-D memory map */
+#define ADRV9025_CPU_D_INVALID_ADDRESS                    0xFFFFFFFF
+#define ADRV9025_CPU_D_ADDR_PROG_START                    0x01000000
+#define ADRV9025_CPU_D_ADDR_PROG_END                      0x01017FFF
+#define ADRV9025_CPU_D_ADDR_DATA_START                    0x20000000
+#define ADRV9025_CPU_D_ADDR_DATA_END                      0x20027FFF
+#define ADRV9025_CPU_D_ADDR_VERSION                       0x01000240
+#define ADRV9025_CPU_D_ADDR_CFR_PULSE                     ADRV9025_CPU_D_INVALID_ADDRESS /* ARM-D doesn't have this address */
+#define ADRV9025_CPU_D_ADDR_DEBUG_PTR                     ADRV9025_CPU_D_INVALID_ADDRESS /* ARM-D doesn't have this address */
+#define ADRV9025_CPU_D_ADDR_BUILD_CHKSUM                  ADRV9025_CPU_D_INVALID_ADDRESS /* ARM-D doesn't have this address */
+#define ADRV9025_CPU_D_ADDR_CALC_CHKSUM_PTR               ADRV9025_CPU_D_INVALID_ADDRESS /* ARM-D doesn't have this address */
+#define ADRV9025_CPU_D_ADDR_MAILBOX_SET                   ADRV9025_CPU_D_INVALID_ADDRESS /* ARM-D doesn't have this address */
+#define ADRV9025_CPU_D_ADDR_MAILBOX_GET                   ADRV9025_CPU_D_INVALID_ADDRESS /* ARM-D doesn't have this address */
+#define ADRV9025_CPU_D_ADDR_MAILBOX_RUN_INIT              ADRV9025_CPU_D_INVALID_ADDRESS /* ARM-D doesn't have this address */
+#define ADRV9025_CPU_D_ADDR_MAILBOX_FHM                   ADRV9025_CPU_D_INVALID_ADDRESS /* ARM-D doesn't have this address */
+
+/* ARM average temperature measurement */
+#define ADRV9025_CPU_ADDR_AVG_TEMP_ADDR                   0x010002B0
+
+/*StringVersion address in ARM*/
+#define ADRV9025_CPU_ADDR_STREAM_VERSION                    0x2004E808
+/* Cpu MailBox */
+#define ADRV9025_CPU_ADDR_MAILBOX_STATUS_OFFSET           0x00
+#define ADRV9025_CPU_MAILBOX_STATUS_OK                    0x00
+#define ADRV9025_CPU_ADDR_MAILBOX_ERROR_OFFSET            0x01
+#define ADRV9025_CPU_MAILBOX_ERROR_DEVICE_PROFILE         0x00
+#define ADRV9025_CPU_MAILBOX_ERROR_ADC_PROFILE            0x01
+#define ADRV9025_CPU_MAILBOX_ERROR_VCOFREGKHZ             0x02
+#define ADRV9025_CPU_MAILBOX_ERROR_HSDIGHZ_API            0x03
+#define ADRV9025_CPU_MAILBOX_ERROR_DEVICECLOCKHZ          0x04
+#define ADRV9025_CPU_MAILBOX_ERROR_RXOUTPUTRATEHZ         0x05
+#define ADRV9025_CPU_MAILBOX_ERROR_TXINPUTRATEHZ          0x06
+#define ADRV9025_CPU_MAILBOX_ERROR_ORXOUTPUTRATEHZ        0x07
+
+#define ADRV9025_CPU_ADC_PROFILE_SIZE                     56
+/* number of uint16_t words per ADC profile */
+
+#define ADRV9025_CPU_ADCP_ROFILE_NUM_CAP_COND_CURR_VALUES 16
+#define ADRV9025_CPU_ADC_PROFILE_NUM_BIAS_VBG_VALUES      22
+#define ADRV9025_CPU_ADC_PROFILE_NUM_DACG_VALUES          2
+#define ADRV9025_CPU_ADC_PROFILE_NUM_ES1_VALUES           1
+#define ADRV9025_CPU_ADC_PROFILE_NUM_ALTG_VALUES          1
+
+/* Firmware Status */
+#define ADRV9025_CPU_FW_STATUS_POWERUP                    0
+#define ADRV9025_CPU_FW_STATUS_READY                      1
+#define ADRV9025_CPU_FW_STATUS_FW_CHECKSUM_ERROR          2
+#define ADRV9025_CPU_FW_STATUS_DATA_MEMORY_ERROR          3
+#define ADRV9025_CPU_FW_STATUS_STREAM_CHECKSUM_ERROR      4
+#define ADRV9025_CPU_FW_STATUS_PROFILE_ERROR              5
+#define ADRV9025_CPU_FW_STATUS_CLKPLL_PROGRAMING_ERROR    6
+#define ADRV9025_CPU_FW_STATUS_JESD_SETUP_CONFIG_ERROR    7
+#define ADRV9025_CPU_FW_STATUS_POWER_UP_INIT_ERROR        8
+#define ADRV9025_CPU_FW_STATUS_CPU_DEBUG_READY            9
+#define ADRV9025_CPU_FW_STATUS_CLKLOGEN_ERROR             10
+#define ADRV9025_CPU_FW_STATUS_RXQEC_HARDWARE_ERROR       11
+#define ADRV9025_CPU_FW_STATUS_HW_TIMER_ERROR             12
+#define ADRV9025_CPU_FW_STATUS_ADC_RCAL_ERROR             13
+#define ADRV9025_CPU_FW_STATUS_STREAM_RUNTIME_ERROR       14
+#define ADRV9025_CPU_FW_STATUS_BOOT_CLKGEN_RCAL_ERROR     15
+#define ADRV9025_CPU_FW_STATUS_BOOT_LDO_CONFIG_ERROR      16
+#define ADRV9025_CPU_FW_STATUS_INVCHN_CONFIG_ERROR        17
+#define ADRV9025_CPU_D_FW_STATUS_CHECKSUM_ERROR           19
+#define ADRV9025_CPU_D_FW_STATUS_BOOT_ERROR               20
+
+#define ADRV9025_CPU_OPCODE_MASK                          0xFFFF0000
+#define ADRV9025_CPU_OPCODE_SHIFT                         16
+#define ADRV9025_CPU_OBJ_ID_MASK                          0x0000FF00
+#define ADRV9025_CPU_OBJ_ID_SHIFT                         8
+#define ADRV9025_CPU_ERROR_MASK                           0x000000FF
+#define ADRV9025_CPU_ERROR_SHIFT                          1
+
+#define ADRV9025_CPU_CMD_ERRCODE(armOpCode, armObjId, armErrorFlag)  \
+    ((armOpCode << ADRV9025_CPU_OPCODE_SHIFT) |                      \
+     (armObjId << ADRV9025_CPU_OBJ_ID_SHIFT) |                       \
+     armErrorFlag)
+
+#define ADRV9025_CPU_OPCODE_VALID(a) \
+    (((a) != 0) && (((a) % 2) || ((a) > 30)))
+
+#define ADRV9025_MAX_CPUS 2u
+#define ADRV9025_MAX_CPU_FW_PATH 128u
+#define ADRV9025_CPU_FW_PATH_SEP ';'
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ADRV_9025_CPU__MACROS_H_ */

driver/rfic/rf/adrv9025/c_src/devices/adrv9025/private/include/adrv9025_crc32.h

@@ -0,0 +1,45 @@
+/**
+ * \file adrv9025_crc32.h
+ *
+ * ADRV9025 API Version: 6.4.0.14
+ */
+
+/**
+ * Copyright 2015 - 2020 Analog Devices Inc.
+ * Released under the ADRV9025 API license, for more information
+ * see the "LICENSE.pdf" file in this zip file.
+ */
+
+#ifndef _ADRV9025_CRC32_H_
+#define _ADRV9025_CRC32_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* \brief       Run Cyclic Redundancy Check on the specified block of memory in chunk.
+*
+* \details     CRC32 algorithm, operating on 8-bit words
+*
+* Parameters:
+* \param buf - array of bytes on which CRC is run
+* \param bufLen - length of the input array in bytes
+* \param seedCrc - Seed for the next block of memory, use 0 for initial seedCrc.
+* \param finalCrc - 0: return the CRC use for seedSrc. 1: return the final CRC32.
+*
+* \retval     32-bit checksum
+*
+*
+*******************************************************************************
+*/
+uint32_t adrv9025_Crc32ForChunk(const uint8_t buf[],
+                                uint32_t      bufLen,
+                                uint32_t      seedCrc,
+                                uint8_t       finalCrc);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif