/********************************************************************* * * Filename: ucp_js_subcrg.h * * Created: 2021-11-11 09:34:35 AM * Last Modified: 2022-06-21 02:57:28 PM * Author: LiPin , lip2014@ia.ac.cn * Organization: Beijing Smart Logic Technology Co., Ltd. * * Description: * * ********************************************************************/ #ifndef __JS_JECS_SUBCRG__ #define __JS_JECS_SUBCRG__ //The JESD And SRIO SUBCRG Base Addr #define JS_CRG_BASE 0x05F10000 //The ECPRI And SRIO SUBCRG Base Addr #define JECS_CRG_BASE 0x08430000 //The JESD LVDS Base Addr #define JESD_LVDS_BASE 0x05F20000 //--------------------------------------JS SYSTEM-------------------------------// //JESD And SRIO SubCtrl Reg Addr #define JS_CRG_CLK_SEL (JS_CRG_BASE + 4*0) //RW #define JS_CRG_DPLL0_CTRL_0 (JS_CRG_BASE + 4*1) //RW #define JS_CRG_DPLL0_CTRL_1 (JS_CRG_BASE + 4*2) //RW #define JS_CRG_DPLL1_CTRL_0 (JS_CRG_BASE + 4*3) //RW #define JS_CRG_DPLL1_CTRL_1 (JS_CRG_BASE + 4*4) //RW #define JS_CRG_SAM0_CLK_CTRL (JS_CRG_BASE + 4*5) //RW #define JS_CRG_SAM1_CLK_CTRL (JS_CRG_BASE + 4*6) //RW #define JS_CRG_SAM2_CLK_CTRL (JS_CRG_BASE + 4*7) //RW #define JS_CRG_CHA0_CLK_CTRL (JS_CRG_BASE + 4*8) //RW #define JS_CRG_CHA1_CLK_CTRL (JS_CRG_BASE + 4*9) //RW #define JS_CRG_CHA2_CLK_CTRL (JS_CRG_BASE + 4*10) //RW #define JS_CRG_SAM3_CLK_CTRL (JS_CRG_BASE + 4*11) //RW #define JS_CRG_DPLL_PMA_CTRL (JS_CRG_BASE + 4*12) //RW #define JS_CRG_DPLL_CLK_CTRL (JS_CRG_BASE + 4*13) //RW #define JS_CRG_JESD0_TIME_CTRL (JS_CRG_BASE + 4*14) //RW #define JS_CRG_JESD1_TIME_CTRL (JS_CRG_BASE + 4*15) //RW #define JS_CRG_JESD2_TIME_CTRL (JS_CRG_BASE + 4*16) //RW #define JS_CRG_JESD3_TIME_CTRL (JS_CRG_BASE + 4*17) //RW #define JS_CRG_JESD4_TIME_CTRL (JS_CRG_BASE + 4*18) //RW #define JS_CRG_JESD5_TIME_CTRL (JS_CRG_BASE + 4*19) //RW #define JS_CRG_JESD6_TIME_CTRL (JS_CRG_BASE + 4*20) //RW #define JS_CRG_JESD7_TIME_CTRL (JS_CRG_BASE + 4*21) //RW #define JS_CRG_JESD8_TIME_CTRL (JS_CRG_BASE + 4*22) //RW #define JS_CRG_JESD9_TIME_CTRL (JS_CRG_BASE + 4*23) //RW #define JS_CRG_JESD10_TIME_CTRL (JS_CRG_BASE + 4*24) //RW #define JS_CRG_JESD11_TIME_CTRL (JS_CRG_BASE + 4*25) //RW #define JS_CRG_DPLL0_DSKEW_CTRL (JS_CRG_BASE + 4*26) //RO #define JS_CRG_DPLL1_DSKEW_CTRL (JS_CRG_BASE + 4*27) //RO #define JS_CRG_PHY_TX_RSTN_JS_CTRL_0 (JS_CRG_BASE + 4*28) //RW #define JS_CRG_PHY_TX_RSTN_JS_CTRL_1 (JS_CRG_BASE + 4*29) //RW #define JS_CRG_PHY_TX_RSTN_JS_CTRL_2 (JS_CRG_BASE + 4*30) //RW #define JS_CRG_PHY_TX_RSTN_JS_CTRL_3 (JS_CRG_BASE + 4*31) //RW #define JS_CRG_PHY_RX_RSTN_JS_CTRL_0 (JS_CRG_BASE + 4*32) //RW #define JS_CRG_PHY_RX_RSTN_JS_CTRL_1 (JS_CRG_BASE + 4*33) //RW #define JS_CRG_PHY_RX_RSTN_JS_CTRL_2 (JS_CRG_BASE + 4*34) //RW #define JS_CRG_PHY_RX_RSTN_JS_CTRL_3 (JS_CRG_BASE + 4*35) //RW #define JS_CRG_CHA3_CLK_CTRL (JS_CRG_BASE + 4*36) //RW #define JS_CRG_SAM_CHA6_RST_CTRL (JS_CRG_BASE + 4*37) //RW #define JS_CRG_SAM_CHA7_RST_CTRL (JS_CRG_BASE + 4*38) //RW #define JS_CRG_PHY_TX_RSTN_JECS_CTRL_3 (JS_CRG_BASE + 4*39) //RW #define JS_CRG_RFC_TMR_CLK_CTRL (JS_CRG_BASE + 4*40) //RW #define JS_CRG_RFC_TMR_RST_CTRL (JS_CRG_BASE + 4*41) //RW #define JS_CRG_PHY_RX_RSTN_JECS_CTRL_2 (JS_CRG_BASE + 4*42) //RW #define JS_CRG_PHY_RX_RSTN_JECS_CTRL_3 (JS_CRG_BASE + 4*43) //RW #define JS_CRG_PHY_RX_RST_JS_CTRL_0 (JS_CRG_BASE + 4*46) //RW #define JS_CRG_PHY_RX_RST_JS_CTRL_1 (JS_CRG_BASE + 4*47) //RW #define JS_CRG_PHY_RX_RST_JS_CTRL_2 (JS_CRG_BASE + 4*48) //RW #define JS_CRG_PHY_RX_RST_JS_CTRL_3 (JS_CRG_BASE + 4*49) //RW #define JS_CRG_PHY_RX_RST_JECS_CTRL_0 (JS_CRG_BASE + 4*50) //RW #define JS_CRG_PHY_RX_RST_JECS_CTRL_1 (JS_CRG_BASE + 4*51) //RW #define JS_CRG_PHY_RX_RST_JECS_CTRL_2 (JS_CRG_BASE + 4*52) //RW #define JS_CRG_PHY_RX_RST_JECS_CTRL_3 (JS_CRG_BASE + 4*53) //RW #define JS_CRG_PHY_EQ_RSTN_JS_CTRL_0 (JS_CRG_BASE + 4*54) //RW #define JS_CRG_PHY_EQ_RSTN_JS_CTRL_1 (JS_CRG_BASE + 4*55) //RW #define JS_CRG_PHY_EQ_RSTN_JS_CTRL_2 (JS_CRG_BASE + 4*56) //RW #define JS_CRG_PHY_EQ_RSTN_JS_CTRL_3 (JS_CRG_BASE + 4*57) //RW #define JS_CRG_PHY_EQ_RSTN_JECS_CTRL_0 (JS_CRG_BASE + 4*58) //RW #define JS_CRG_PHY_EQ_RSTN_JECS_CTRL_1 (JS_CRG_BASE + 4*59) //RW #define JS_CRG_PHY_EQ_RSTN_JECS_CTRL_2 (JS_CRG_BASE + 4*60) //RW #define JS_CRG_PHY_EQ_RSTN_JECS_CTRL_3 (JS_CRG_BASE + 4*61) //RW #define JS_CRG_PHY_PWR_ON_RST_JS_CTRL (JS_CRG_BASE + 4*62) //RW #define JS_CRG_PHY_PWR_ON_RST_JECS_CTRL (JS_CRG_BASE + 4*63) //RW #define JS_CRG_SRIO_PWR_ON_RST_JS_CTRL (JS_CRG_BASE + 4*64) //RW #define JS_CRG_SRIO_PWR_ON_RST_JECS_CTRL (JS_CRG_BASE + 4*65) //RW #define JS_CRG_SAM_CHA0_RST_CTRL (JS_CRG_BASE + 4*66) //RW #define JS_CRG_SAM_CHA1_RST_CTRL (JS_CRG_BASE + 4*67) //RW #define JS_CRG_SAM_CHA2_RST_CTRL (JS_CRG_BASE + 4*68) //RW #define JS_CRG_SAM_CHA3_RST_CTRL (JS_CRG_BASE + 4*69) //RW #define JS_CRG_SAM_CHA4_RST_CTRL (JS_CRG_BASE + 4*70) //RW #define JS_CRG_SAM_CHA5_RST_CTRL (JS_CRG_BASE + 4*71) //RW #define JS_CRG_TMR_EN_SAM_CLK_SEL (JS_CRG_BASE + 4*72) //RW #define JS_CRG_JESD_CLK_CFG (JS_CRG_BASE + 4*73) //RW #define JS_CRG_SYSREF_CFG (JS_CRG_BASE + 4*74) //RW //--------------------------------------JECS SYSTEM-------------------------------// //JESD ECPRI CPRI SRIO Subcrg Reg Addr #define JECS_CRG_PLL_CTL_REG0 (JECS_CRG_BASE + 4*0) #define JECS_CRG_PLL_CTL_REG1 (JECS_CRG_BASE + 4*1) #define JECS_CRG_PLL_CTL_REG2 (JECS_CRG_BASE + 4*2) #define JECS_CRG_PLL_CTL_REG3 (JECS_CRG_BASE + 4*3) #define JECS_CRG_PLL_CTL_REG4 (JECS_CRG_BASE + 4*4) #define JECS_CRG_PLLSEL (JECS_CRG_BASE + 4*5) #define JECS_CRG_CLK_CTRL0 (JECS_CRG_BASE + 4*6) #define JECS_CRG_CLK_CTRL1 (JECS_CRG_BASE + 4*7) #define JECS_CRG_CLK_CTRL2 (JECS_CRG_BASE + 4*8) #define JECS_CRG_CLK_CTRL3 (JECS_CRG_BASE + 4*9) #define JECS_CRG_CLK_CTRL4 (JECS_CRG_BASE + 4*10) #define JECS_CRG_CLK_CTRL5 (JECS_CRG_BASE + 4*11) #define ECPRI_ACLK_CFG_REG (JECS_CRG_BASE + 4*11) #define JECS_CRG_CLK_CTRL6 (JECS_CRG_BASE + 4*12) #define JECS_CRG_CLK_CTRL7 (JECS_CRG_BASE + 4*13) #define JECS_CRG_CLK_CTRL8 (JECS_CRG_BASE + 4*14) #define JECS_CRG_CLK_CTRL9 (JECS_CRG_BASE + 4*15) #define JECS_CRG_CLK_CTRL10 (JECS_CRG_BASE + 4*16) #define JECS_CRG_CLK_CTRL11 (JECS_CRG_BASE + 4*17) #define JECS_CRG_PLL0_LOCK_CTRL (JECS_CRG_BASE + 4*18) #define JECS_CRG_MANTICORE0_RST_CTRL (JECS_CRG_BASE + 4*19) #define JECS_CRG_MANTICORE1_RST_CTRL (JECS_CRG_BASE + 4*20) #define JECS_CRG_MANTICORE2_RST_CTRL (JECS_CRG_BASE + 4*21) #define JECS_CRG_MANTICORE3_RST_CTRL (JECS_CRG_BASE + 4*22) #define JECS_CRG_MANTICORE4_RST_CTRL (JECS_CRG_BASE + 4*23) #define JECS_CRG_MANTICORE5_RST_CTRL (JECS_CRG_BASE + 4*59) #define JECS_CRG_MANTICORE6_RST_CTRL (JECS_CRG_BASE + 4*60) #define JECS_CRG_MANTICORE7_RST_CTRL (JECS_CRG_BASE + 4*63) #define JECS_CRG_MANTICORE8_RST_CTRL (JECS_CRG_BASE + 4*64) #define JECS_CRG_PMA0_RST_CTRL (JECS_CRG_BASE + 4*24) #define JECS_CRG_PMA1_RST_CTRL (JECS_CRG_BASE + 4*25) #define JECS_CRG_PMA2_RST_CTRL (JECS_CRG_BASE + 4*26) #define JECS_CRG_PMA3_RST_CTRL (JECS_CRG_BASE + 4*27) #define JECS_CRG_PMA4_RST_CTRL (JECS_CRG_BASE + 4*28) #define JECS_CRG_PMA5_RST_CTRL (JECS_CRG_BASE + 4*29) #define JECS_CRG_PMA6_RST_CTRL (JECS_CRG_BASE + 4*30) #define JECS_CRG_PMA7_RST_CTRL (JECS_CRG_BASE + 4*31) #define JECS_CRG_PMA8_RST_CTRL (JECS_CRG_BASE + 4*32) #define JECS_CRG_PMA9_RST_CTRL (JECS_CRG_BASE + 4*33) #define JECS_CRG_PMA10_RST_CTRL (JECS_CRG_BASE + 4*34) #define JECS_CRG_PMA11_RST_CTRL (JECS_CRG_BASE + 4*35) #define JECS_CRG_PMA12_RST_CTRL (JECS_CRG_BASE + 4*36) #define JECS_CRG_PMA13_RST_CTRL (JECS_CRG_BASE + 4*37) #define JECS_CRG_PMA14_RST_CTRL (JECS_CRG_BASE + 4*38) #define JECS_CRG_PMA15_RST_CTRL (JECS_CRG_BASE + 4*39) #define JECS_CRG_PMA16_RST_CTRL (JECS_CRG_BASE + 4*40) #define JECS_CRG_PMA17_RST_CTRL (JECS_CRG_BASE + 4*41) #define ECPRI_RST_CFG_REG (JECS_CRG_BASE + 4*41) #define JECS_CRG_SRIO_ULI_RST_CTRL (JECS_CRG_BASE + 4*43) #define JECS_CRG_STC_RST_CTRL (JECS_CRG_BASE + 4*43) #define JECS_CRG_SRIO_PWR_ON_RST_CTRL (JECS_CRG_BASE + 4*44) #define JECS_CRG_CPRI0_RST_CTRL (JECS_CRG_BASE + 4*45) #define JECS_CRG_CPRI1_RST_CTRL (JECS_CRG_BASE + 4*46) #define JECS_CRG_CPRI2_RST_CTRL (JECS_CRG_BASE + 4*47) #define JECS_CRG_CPRI3_RST_CTRL (JECS_CRG_BASE + 4*48) #define JECS_CRG_CPRI4_RST_CTRL (JECS_CRG_BASE + 4*49) #define JECS_CRG_CPRI5_RST_CTRL (JECS_CRG_BASE + 4*50) #define JECS_CRG_CPRI6_RST_CTRL (JECS_CRG_BASE + 4*51) #define JECS_CRG_CPRI_CDR_CLK_CTRL (JECS_CRG_BASE + 4*52) #define JECS_CRG_CPRI_ALT_CLK_CTRL (JECS_CRG_BASE + 4*53) #define JECS_CRG_CPRI_CORE_CLK_CTRL (JECS_CRG_BASE + 4*54) #define JECS_CRG_CPRI_PCS_CORE_CLK_CTRL (JECS_CRG_BASE + 4*55) #define JECS_CRG_CPRI0_CLK_CTRL (JECS_CRG_BASE + 4*56) #define JECS_CRG_CPRI1_CLK_CTRL (JECS_CRG_BASE + 4*57) #define JECS_CRG_CPRI2_CLK_CTRL (JECS_CRG_BASE + 4*58) #define SYNCE_OUT_CLK_SEL (JECS_CRG_BASE + 4*61) #define JECS_CRG_ECPRI_CPRI_RST (JECS_CRG_BASE + 4*62) //------------------------------------JESD LVDS--------------------------------// //JESD LVDS Reg Addr #define JS_CTRL_LVDS_BIAS_EN (JESD_LVDS_BASE + 4*1) //RW #define JS_CTRL_LVDS_VBIAS_SEL (JESD_LVDS_BASE + 4*2) //RW #define JS_CTRL_LVDS_PULLDN (JESD_LVDS_BASE + 4*3) //RW #define JS_CTRL_LVDS_SCHMITT_EN (JESD_LVDS_BASE + 4*4) //RW #define JS_CTRL_LVDS_RTERM_EN (JESD_LVDS_BASE + 4*5) //RW #define JS_CTRL_LVDS_RTERM_VAL_0 (JESD_LVDS_BASE + 4*6) //RW #define JS_CTRL_LVDS_RTERM_VAL_1 (JESD_LVDS_BASE + 4*7) //RW #define JS_CTRL_LVDS_RTERM_VAL_2 (JESD_LVDS_BASE + 4*8) //RW #define JS_CTRL_LVDS_RTERM_VAL_3 (JESD_LVDS_BASE + 4*9) //RW #define JS_CTRL_LVDS_RXCM_EN (JESD_LVDS_BASE + 4*10) //RW #define JS_CTRL_LVDS_RXEN (JESD_LVDS_BASE + 4*11) //RW #define JS_CTRL_LVDS_TXDRV_0 (JESD_LVDS_BASE + 4*12) //RW #define JS_CTRL_LVDS_TXDRV_1 (JESD_LVDS_BASE + 4*13) //RW #define JS_CTRL_LVDS_TXDRV_2 (JESD_LVDS_BASE + 4*14) //RW #define JS_CTRL_LVDS_TXDRV_3 (JESD_LVDS_BASE + 4*15) //RW #define JS_CTRL_LVDS_TXEN (JESD_LVDS_BASE + 4*16) //RW #define JS_CTRL_LVDS_TX_CM (JESD_LVDS_BASE + 4*17) //RW #define JS_CTRL_LVDS_PMUX_MODE (JESD_LVDS_BASE + 4*18) //RW #endif