/*============================================================================== * Copyright (c) 2011~2012, CPIT. All Rights Reserved. * * MODULE: STC模块驱动 * * FILENAME: stc.h * * DESCRIPTION: Source Code of STC Driver * * Current Version: 1.0 * * HISTORY: * Date CR No Person Description * ---------- ------------ ------ ------------- * 2022-05-21 Li Weihua Initial version. ==============================================================================*/ #ifndef __STC_DRV_H__ #define __STC_DRV_H__ #include "typedef.h" #ifdef __cplusplus extern "C" { #endif #if 0 #pragma align(1) /* set tight packing */ #pragma pack(1) #endif /*============================================================================== Includes and Public Data Declarations ==============================================================================*/ /* 包含系统文件以及定义公用数据文件 */ /*============================================================================== Include Files ==============================================================================*/ /* 包含本地文件 */ /*============================================================================== Constant / Define Declarations ==============================================================================*/ /* 常量定义，并对所定义的常量进行说明 */ /*============================================================================== Global Constant Data Declarations ==============================================================================*/ /*============================================================================== Macro Definitions ==============================================================================*/ /* 宏定义，并对其进行简要说明 */ #define STC_REG_BASE_ADDR (0x08568000) //STC模块基地址 #define STC_REG_LEN (0x08000) #define STC_LTBG_REG_OFFSET 0x1005 #define ECS_SUBCTRL_REG_BASE_ADDR (0x08460000) //ECS_SUBCTRL模块基地址 #define ECS_SUBCTRL_REG_LEN (0x10000) #define ECS_CRG_REG_BASE_ADDR (0x08430000) //ECS_CRG模块基地址 #define ECS_CRG_REG_LEN (0x10000) #define AP_GPIO_PINMUX_REG_BASE_ADDR (0x04450000) //AP_GPIO基地址:0x04450000,AP_GPIO_PINMUX模块基地址0x04458000 #define AP_GPIO_REG_LEN (0x8000) #define AP_GPIO_PINMUX_REG_LEN (0x10000) #define GMAC0_REG_BASE_ADDR (0x01a40000) //GMAC0模块基地址 #define GMAC0_TOD_REG (0xB08) #define GMAC0_REG_LEN (0x10000) #define TMAC_REG_BASE_ADDR (0x09090000) //TMAC模块基地址 #define TMAC0_TOD_REG (0xD08) #define TMAC_REG_LEN (0x100000) #define STC_DEV_NAME "/dev/stc_dev" #define STC_MODULE_MAGIC 'g' #define STC_INT_CFG _IOWR(STC_MODULE_MAGIC, 0x01, uint32_t) #define SECOND2NS 1000000000.000001 #define DEFAULT_RT_VALUE 0x3B9ACA0000000000UL #define DEFAULT_RT_HALF 0x1DCD650000000000UL #define KERNEL2USER_DELAY 9320 //9320ns #define STC_LOCK_CNT 15 #define SNIFFER_LOCK_THRESHOLD 20 //0x1400000000UL //20ns #define SFN_BASE_ADDR 0x0A4f2220UL //0x0A4D7220UL #define SNIFFER_BASE_ADDR 0x0A4f2140UL #define SHARE_MEM_BASE_ADDR 0x009D00000UL #define SHARE_MEM_LEN 0x000800000UL #define BIT0 (0x00000001) #define BIT1 (0x00000002) #define BIT2 (0x00000004) #define BIT3 (0x00000008) #define BIT4 (0x00000010) #define BIT5 (0x00000020) #define BIT6 (0x00000040) #define BIT7 (0x00000080) #define BIT8 (0x00000100) #define BIT9 (0x00000200) #define BIT10 (0x00000400) #define BIT11 (0x00000800) #define BIT12 (0x00001000) #define BIT13 (0x00002000) #define BIT14 (0x00004000) #define BIT15 (0x00008000) #define BIT16 (0x00010000) #define BIT17 (0x00020000) #define BIT18 (0x00040000) #define BIT19 (0x00080000) #define BIT20 (0x00100000) #define BIT21 (0x00200000) #define BIT22 (0x00400000) #define BIT23 (0x00800000) #define BIT24 (0x01000000) #define BIT25 (0x02000000) #define BIT26 (0x04000000) #define BIT27 (0x08000000) #define BIT28 (0x10000000) #define BIT29 (0x20000000) #define BIT30 (0x40000000) #define BIT31 (0x80000000) typedef volatile uint32_t vuint32_t; typedef volatile uint8_t vuint8_t; /*============================================================================== Type Declarations ==============================================================================*/ /* 类型定义，struct、enum等，对每种类型定义作简要说明，如果是重要数据结构，要详细 说明 */ /*STC 寄存器*/ typedef struct { vuint32_t tod_reg_config; /*0*/ vuint32_t tod_reg_int_status; /*4*/ vuint32_t tod_reg_irq_en; /*0x8*/ vuint32_t tod_clr; /*0xc*/ vuint8_t reserve0[0x30]; /*0x10-0x40*/ vuint32_t tod_reg_nf; /*0x40*/ vuint32_t tod_reg_hscc; /*0x44*/ vuint32_t tod_reg_nsf_init_lo; /*0x48*/ vuint32_t tod_reg_nsf_init_hi; /*0x4c*/ vuint32_t tod_reg_ft_lo; /*0x50*/ vuint32_t tod_reg_ft_hi; /*0x54*/ vuint32_t tod_reg_rt_lo; /*0x58*/ vuint32_t tod_reg_rt_hi; /*0x5c*/ vuint32_t tod_reg_su_lo; /*0x60*/ //TOD second lo vuint32_t tod_reg_su_hi; /*0x64*/ //TOD second hi vuint32_t tod_reg_nsf_1pps_lo; /*0x68*/ vuint32_t tod_reg_nsf_1pps_hi; /*0x6c*/ vuint32_t tod_reg_tod_lo; /*0x70*/ vuint32_t tod_reg_tod_mi; /*0x74*/ vuint32_t tod_reg_tod_hi; /*0x78*/ vuint32_t reserve1; /*0x7c*/ vuint32_t ltbg0_reg_r; /*0x80*/ vuint32_t ltbg0_reg_n; /*0x84*/ vuint32_t ltbg0_reg_n1; /*0x88*/ vuint8_t reserve2[116]; /*0x8c-100*/ vuint32_t ctw_reg_timer0_0; /*0x100*/ vuint32_t ctw_reg_timer0_1; /*0x104*/ vuint32_t ctw_reg_timer0_2; /*0x108*/ vuint32_t ctw_reg_timer0_3; /*0x10c*/ vuint32_t ctw_reg_timer1_0; /*0x110*/ vuint32_t ctw_reg_timer1_1; /*0x114*/ vuint32_t ctw_reg_timer1_2; /*0x118*/ vuint32_t ctw_reg_timer1_3; /*0x11c*/ vuint32_t ctw_reg_irq0_0; /*0x120*/ vuint32_t ctw_reg_irq0_1; /*0x124*/ vuint32_t ctw_reg_irq0_2; /*0x128*/ vuint32_t ctw_reg_irq0_3; /*0x12c*/ vuint32_t ctw_reg_irq1_0; /*0x130*/ vuint32_t ctw_reg_irq1_1; /*0x134*/ vuint32_t ctw_reg_irq1_2; /*0x138*/ vuint32_t ctw_reg_irq1_3; /*0x13c*/ vuint32_t ctw_reg_status; /*0x140*/ }arm_stc_regs; #if 0 /*输出到PAD的1PPS信号: jecs_subctrl_reg33:gnss_pps_out*/ typedef enum { GMAC0_1PPS_OUT = 0, /* gmac0 */ GMAC1_1PPS_OUT, /* gmac1 */ RESERVED0_1PPS_OUT, /* Reserved*/ CPRI_GMAC_1PPS_OUT = 3, /* cpri gmac */ TMAC_1PPS_OUT, /* tmac */ STC_1PPS_OUT, /* stc产生的1pps */ TOD_1PPS_OUT, /* stc产生的1pps */ RESERVED_1PPS_OUT /* Reserved*/ } pp1s_output_e; #endif typedef enum { ZERO_FLAG = 0, /*0标志*/ TRUE_FLAG /*1 标志*/ }clk_flag_e; typedef enum { CLK_DISABLE = 0, /* clock unuseable status */ CLK_WARM_UP = 1, /* warm up status */ CLK_TRACKING, /* tracking status */ CLK_HOLD_OVER /* hold over status */ }clk_sync_state_e; /*前传接口类型*/ typedef enum { UCP4008_JESD = 0, /* JESD */ UCP4008_CPRI, /* CPRI */ UCP4008_ECPRI, /* eCPRI */ RESERVED_FH /* Reserved*/ } front_hual_e; /*恢复时钟类型*/ typedef enum { SYNC_ETH_CLK = 25000000, /* 外部同步以太网时钟输入 25M*N*/ CLK_GE_CDR = 125000000, /* 千兆以太网RX时钟，外部输入125MHz */ CLK_CPRI_CDR = 122880000, /* 内部CPRI SERDES恢复时钟输出122.88MHZ*/ CLK_ECPRI_CDR = 156250000, /* 内部eCPRI SERDES恢复时钟输出156.25MHz */ CLK_TMAC_CDR = 156250000 /* 内部TMAC SERDES(PT SERDES)恢复时钟156.25MHz */ } recovery_clk_e; typedef struct { double integral; //累计偏差(积分) double magic_num; //输出系数 PCLK的周期 double p_ratio; //比例系数 double i_ratio; //积分系数 uint8_t status; //是否同步 0:未同步，1同步 uint8_t tracking_cnt; uint16_t holdover_cnt; uint32_t disable_cnt; }pi_struct_s; /*typedef struct { pi_struct_s }adjust_struct_s;*/ typedef struct { pp1s_soure_e pp1s_src; //1pps源 //front_hual_e fh_interface; //前传接口类型 hscc_dump_soure_e hscc_dump_src; //recovery_clk_e recovery_clk; uint32_t synce_flag; //是否有synce时钟 1：有，0：没有 uint32_t synce_clk; //synce时钟频率Hz uint32_t cal_period; //频率校准的频率（每秒校准次数）,单位：Hz uint32_t p_clk; //P_CLK_STC的频率值 uint64_t default_ft; //默认的ft值 double p_clk_period; //P_CLK_STC的周期值 pi_struct_s freq; //频率校准 pi_struct_s phase; //相位校准 clk_sync_state_e state; uint32_t pesudo_flag; }stc_state_s; typedef struct { uint32_t common_alarm; uint32_t hold_over_time; clk_sync_state_e status; }clock_module_status_s; /*错误返回码*/ #define STC_OK (0) /* 函数调用返回成功 */ #define PARAMETER1_ERROR (-1) #define PARAMETER2_ERROR (-2) #define PARAMETER3_ERROR (-3) #define PARAMETER4_ERROR (-4) #define PARAMETER5_ERROR (-5) #define LOGIC_ERROR1 (-6) #define LOGIC_ERROR2 (-7) #define LOGIC_ERROR3 (-8) #define LOGIC_ERROR4 (-9) #define LOGIC_ERROR5 (-10) #define LOGIC_ERROR6 (-11) #define LOGIC_ERROR7 (-12) #define LOGIC_ERROR8 (-13) #define LOGIC_ERROR9 (-14) #define LOGIC_ERROR10 (-15) #define LOGIC_ERROR11 (-16) #define LOGIC_ERROR12 (-17) #define LOGIC_ERROR13 (-18) /*============================================================================== Function Prototypes ==============================================================================*/ int32_t set_clk_mode(clk_flag_e pseudo_flag); int32_t get_clock_module_status(volatile clock_module_status_s* clk_module_status_ptr); stc_state_s* get_stc_state(); arm_stc_regs * get_stc_reg_base(); void set_su_reg(uint64_t value); void * get_ap_gpio_reg_base(); #if 0 #pragma align() /* restore default packing */ #pragma pack() #endif #ifdef __cplusplus } #endif #endif /* __STC_DRV_H__ */