122 lines
3.0 KiB
C
122 lines
3.0 KiB
C
//******************** (C) COPYRIGHT 2022 SmartLogic*******************************
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// FileName : ucp_jesd_gpio.h (ap side)
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// Author : Boheng Lin bhlin919@126.com
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// Date First Issued : 2022-09-08 02:37:50 PM
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// Last Modified :
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// Description :
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// ------------------------------------------------------------
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// Modification History:
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// Version Date Author Modification Description
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//
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//**********************************************************************************
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#ifndef __UCP_JESD_GPIO__
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#define __UCP_JESD_GPIO__
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#include "ucp_api_jesd.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define GPIO_INDEX_MAX (64)
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#define UCP_GPIO(port, pin) ((tUcpGpioRegTable_t *)&pUcpGpioTable[port][pin])
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typedef struct tUcpGpioRegTable_tag {
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uint32_t pinMuxReg;
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uint32_t muxValue;
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uint32_t muxMask;
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uint32_t dirReg;
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uint32_t valueReg;
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uint32_t bitMask;
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} tUcpGpioRegTable_t;
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typedef struct tGpioInfRegTable_tag {
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uint8_t index;
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uint8_t enable;
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uint8_t dir;
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uint8_t value;
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tUcpGpioRegTable_t *gpio;
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} tGpioInfRegTable;
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enum {
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GPIO_PORT0A = 0,
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GPIO_PORT0B,
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GPIO_PORT1A,
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GPIO_PORT1B
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};
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typedef enum eGpioDir_tag {
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GPIO_DIR_IN = 0,
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GPIO_DIR_OUT
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} eGpioDir;
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enum {
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GPIO_INDEX_TRX_TX1 = 0,
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GPIO_INDEX_TRX_TX2,
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GPIO_INDEX_TRX_TX3,
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GPIO_INDEX_TRX_TX4,
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GPIO_INDEX_RF_TX1,
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GPIO_INDEX_RF_TX2,
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GPIO_INDEX_RF_TX3,
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GPIO_INDEX_RF_TX4,
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GPIO_INDEX_SW_TX1,
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GPIO_INDEX_SW_TX2,
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GPIO_INDEX_SW_TX3,
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GPIO_INDEX_SW_TX4,
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GPIO_INDEX_TRX_RX1,
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GPIO_INDEX_TRX_RX2,
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GPIO_INDEX_TRX_RX3,
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GPIO_INDEX_TRX_RX4,
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GPIO_INDEX_RF_RX1,
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GPIO_INDEX_RF_RX2,
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GPIO_INDEX_RF_RX3,
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GPIO_INDEX_RF_RX4,
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GPIO_INDEX_SW_RX1,
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GPIO_INDEX_SW_RX2,
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GPIO_INDEX_SW_RX3,
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GPIO_INDEX_SW_RX4,
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GPIO_INDEX_TRX_ORX1,
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GPIO_INDEX_TRX_ORX2,
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GPIO_INDEX_TRX_ORX3,
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GPIO_INDEX_TRX_ORX4,
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GPIO_INDEX_RF_ORX1,
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GPIO_INDEX_RF_ORX2,
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GPIO_INDEX_RF_ORX3,
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GPIO_INDEX_RF_ORX4,
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GPIO_INDEX_SW_ORX1,
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GPIO_INDEX_SW_ORX2,
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GPIO_INDEX_SW_ORX3,
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GPIO_INDEX_SW_ORX4,
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GPIO_INDEX_TRIGER,
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GPIO_INDEX_TR_MAX
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};
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extern const tUcpGpioRegTable_t *pUcpGpioTable[];
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extern ucp_jesd_TrxGpioCfg_t ucp_jesd_gpioInit (const char *trxGpioConfigFile, uint16_t enLog);
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extern int ucp_jesd_gpioConfig (const int pinIdex, uint8_t dir, uint8_t enable, tUcpGpioRegTable_t *gpio);
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extern int ucp_jesd_gpioSetDir(const int pinIdex, eGpioDir dir);
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extern eGpioDir ucp_jesd_gpioGetDir(const int pinIdex);
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extern int ucp_jesd_gpioSet(const int pinIdex, int value);
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extern int ucp_jesd_gpioGet(const int pinIdex);
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extern void ucp_jesd_gpio_tx (void);
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extern void ucp_jesd_gpio_rx (void);
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extern void ucp_jesd_gpio_on (void);
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extern void ucp_jesd_gpio_off (void);
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extern void ucp_jesd_gpio_orxOn (void);
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extern void ucp_jesd_gpio_orxOff (void);
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extern void ucp_jesd_gpio_trigOn (void);
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extern void ucp_jesd_gpio_trigOff (void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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