164 lines
3.8 KiB
C
164 lines
3.8 KiB
C
//******************** (C) COPYRIGHT 2022 SmartLogic*******************************
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// FileName : ucp_api_rfic.h
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// Author : boheng.lin@smartlogictech.com
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// Date First Issued : 2023-03-04 17:39:00 PM
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// Last Modified :
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// Description :
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// ------------------------------------------------------------
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// Modification History:
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// Version Date Author Modification Description
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//
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//**********************************************************************************
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#ifndef UCP_API_RFIC_H_
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#define UCP_API_RFIC_H_
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#include <stdio.h>
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#include <stdlib.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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//**********************************************************************************
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// system option layer
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extern int32_t UCP_API_RFIC_CellInit(void);
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/**
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* \brief Sets up the cell's default config
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*
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* \param txLo is Transmit local frequency (Unit hz).
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* \param rxLo is Receive local frequency (Unit hz).
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* \param bw is bandwidth (Unit hz).
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* \param initAtt is Initialize attenuation (Unit db, range 0 ~ 20).
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*
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* \retval 0.
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*/
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extern int32_t UCP_API_RFIC_CellSetup(uint64_t txLo, uint64_t rxLo, uint64_t bw, uint16_t initAtt);
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/**
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* \brief Sets up the transceiver's tx rx LO frenq, bandwidth, Initialize attenuation.
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* then process Initialize transceiver
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*
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* \param txLo is Transmit local frequency (Unit hz).
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* \param rxLo is Receive local frequency (Unit hz).
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* \param bw is bandwidth (Unit hz).
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* \param initAtt is Initialize attenuation (Unit db, range 0 ~ 20).
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*
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* \retval 0.
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*/
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extern int32_t UCP_API_RFIC_CellDelete(void);
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//**********************************************************************************
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// chip option layer
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// TRANSCEIVER
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/**
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* \brief transceiver chip hardware reset.
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*
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* \param void.
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*
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* \retval void.
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*/
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extern int32_t UCP_API_TRANSCEIVER_Reset(void);
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/**
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* \brief Sets up the transceiver's tx rx LO frenq, bandwidth, Initialize attenuation.
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* then process Initialize transceiver
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*
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* \param txLo is Transmit local frequency (Unit hz).
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* \param rxLo is Receive local frequency (Unit hz).
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* \param bw is bandwidth (Unit hz).
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* \param initAtt is Initialize attenuation (Unit db, range 0 ~ 20).
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*
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* \retval 0.
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*/
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extern int32_t UCP_API_TRANSCEIVER_Init(uint64_t txLo, uint64_t rxLo, uint64_t bw, uint16_t initAtt);
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/**
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* \brief Sets up the transceiver's MGC Mod.
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*
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* \param en, if set 1, MGC Mode; set 0, AGC Mode.
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*
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* \retval 0.
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*/
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extern int32_t UCP_API_TRANSCEIVER_MGC_Cfg(uint8_t en);
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/**
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* \brief Sets up the transceiver's rx gain at MGC mode.
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*
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* \param gain_db (Unit db, range 0~36, step 0.5db).
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*
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* \retval 0.
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*/
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extern int32_t UCP_API_TRANSCEIVER_Gain_Set(double gain_db);
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/**
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* \brief Get the transceiver's rx gain.
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*
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* \param gain_db (Unit db, range 0~36, step 0.5db).
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*
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* \retval gain_db (Unit db, range 0~36, step 0.5db).
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*/
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extern double UCP_API_TRANSCEIVER_Gain_Get(void);
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/**
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* \brief Set up the transceiver's tx attenuation.
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*
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* \param att_db (Unit db, range 0~20).
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*
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* \retval 0.
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*/
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extern int32_t UCP_API_TRANSCEIVER_Att_Set(uint8_t att_db);
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/**
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* \brief Get the transceiver's tx attenuation.
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*
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* \retval att_db (Unit db, range 0~20).
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*/
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extern uint8_t UCP_API_TRANSCEIVER_Att_Get(void);
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//**********************************************************************************
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// CLOCKGEN
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/**
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* \brief clockGen chip hardware reset.
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*
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* \param void.
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*
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* \retval void.
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*/
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extern void UCP_API_CLOCKGEN_Reset(void);
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/**
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* \brief clockGen chip init function.
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*
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* \param void.
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*
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* \retval void.
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*/
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extern int32_t UCP_API_CLOCKGEN_Init(void);
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/**
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* \brief Get the status of clockGen chip's pll.
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*
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* \param void.
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*
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* \retval lock code.
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*/
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extern uint8_t UCP_API_CLOCKGEN_LockStatus(void);
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/**
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* \brief let the clockGen chip's systemclock one tick.
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*
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* \param void.
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*
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* \retval void.
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*/
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extern void UCP_API_CLOCKGEN_OnePluse(uint8_t enable);
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#ifdef __cplusplus
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}
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#endif
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#endif /* #ifndef UCP_API_RFIC_H_ */
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